| commit | 7ed36e96fd05470e98e7daf648f9cf7f38609670 | [log] [tgz] |
|---|---|---|
| author | Jyri Sarha <jsarha@ti.com> | Wed Sep 03 15:52:34 2014 +0300 |
| committer | Mark Brown <broonie@kernel.org> | Wed Sep 03 15:25:44 2014 +0100 |
| tree | 952e7724b780e50c6dfdbca3c241694afeb01dcf | |
| parent | 94fe356f4c6e600379a9949a419e880dfe896e11 [diff] |
ASoC: tlv320aic31xx: Choose PLL p divider automatically This simplifies aic31xx_divs table. There is no more need for p_val or separate lines for 12 and 24 MHz mclks. Signed-off-by: Jyri Sarha <jsarha@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>