| commit | 88a86aaa613032e0d5cf70a3d0777302ec2ed40b | [log] [tgz] |
|---|---|---|
| author | Maxime Ripard <maxime.ripard@free-electrons.com> | Mon Oct 12 22:21:49 2015 +0200 |
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | Wed Oct 21 22:43:25 2015 +0200 |
| tree | 06628a666d19a6e8ebe6bfd1a2a0f5f128b68bf9 | |
| parent | 6f87abb8cd7dc00701f0a732962420fddbf4b79b [diff] |
ARM: sun7i: Add audio PLL The A20 uses the PLL2 as the audio PLL, which is the parent of all the other audio clocks in the system (i2s, codec, etc.). Add it to the DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>