tree 7e90a6286246da448c67b8a016a638b23c485406
parent a28dbea0ad3bd8144f3348eb5c20fabc2f12b4b5
author Grazvydas Ignotas <notasas@gmail.com> 1285680139 +0300
committer Samuel Ortiz <sameo@linux.intel.com> 1288305004 +0200

mfd: Fix TWL4030 COR bit polarity for BCI SIH block

The chip TRM documentation contradicts itself about this bit, page 174
of swcu050e says bit should be 0 for clear-on-read behavior, while
page 487 says it should be 1. Testing shows it should be 1, so set
the .set_cor flag accordingly. This is needed for upcoming BCI
charging driver to function.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>