commit | 1c046bc1db49e5a42e5c4167ac42cee4c1725a37 | [log] [tgz] |
---|---|---|
author | Jeff McGee <jeff.mcgee@intel.com> | Fri Apr 03 18:13:18 2015 -0700 |
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | Thu Apr 09 15:57:57 2015 +0200 |
tree | b6660632d23c239280f392277d7bfbf4a7d1a266 | |
parent | 5d39525a1f2551a33f7f7380a038837e648ed511 [diff] |
drm/i915/bxt: Support BXT in SSEU device status dump Modify the Gen9 SSEU device status logic to support Broxton. Broxton reuses the Skylake power gate acknowledgment registers but has at most 1 slice and 3 subslices. Broxton supports subslice power gating within its single slice. Signed-off-by: Jeff McGee <jeff.mcgee@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>