commit | 9d0e8d8348d54d60005c6c938b87b94648005d1c | [log] [tgz] |
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author | Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> | Tue Jan 21 15:03:36 2014 -0600 |
committer | Borislav Petkov <bp@suse.de> | Fri Feb 07 15:01:19 2014 +0100 |
tree | 39d2915d2874c3ea9494909288943b193d4c209b | |
parent | e245e3b25f9ef33b166f0f01d19d6418f52ae726 [diff] |
amd64_edac: Fix logic to determine channel for F15 M30h processors Update current channel selection logic to include F15h, M30h memory controllers. Refer F15 M30h BKDG D18F2x110[7:6] (DRAM Controller Select Low) (Link:http://support.amd.com/TechDocs/49125_15h_Models_30h-3Fh_BKDG.pdf) Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> Link: http://lkml.kernel.org/r/1390338216-3873-1-git-send-email-Aravind.Gopalakrishnan@amd.com Signed-off-by: Borislav Petkov <bp@suse.de>