drm/i915: Write PDEs at init instead of enable
We won't be calling enable() for all PPGTTs. We do need to write PDEs
for all PPGTTs however. By moving the writing to init (which is called
for all PPGTTs) we should accomplish this.
ADD NOTE ABOUT PDE restore
TODO: Eventually, we should allocate the page tables on demand.
v2: Rebased on BDW. Only do PDEs for pre-gen8
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index bd92288..2c07795 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -631,8 +631,6 @@
uint32_t ecochk, ecobits;
int i;
- gen6_write_pdes(ppgtt);
-
ecobits = I915_READ(GAC_ECO_BITS);
I915_WRITE(GAC_ECO_BITS, ecobits | ECOBITS_PPGTT_CACHE64B);
@@ -666,8 +664,6 @@
uint32_t ecochk, gab_ctl, ecobits;
int i;
- gen6_write_pdes(ppgtt);
-
ecobits = I915_READ(GAC_ECO_BITS);
I915_WRITE(GAC_ECO_BITS, ecobits | ECOBITS_SNB_BIT |
ECOBITS_PPGTT_CACHE64B);
@@ -906,6 +902,8 @@
kref_init(&ppgtt->ref);
drm_mm_init(&ppgtt->base.mm, ppgtt->base.start,
ppgtt->base.total);
+ if (INTEL_INFO(dev)->gen < 8)
+ gen6_write_pdes(ppgtt);
}
return ret;
@@ -1059,6 +1057,9 @@
vma->bind_vma(vma, obj->cache_level, GLOBAL_BIND);
}
+ if (dev_priv->mm.aliasing_ppgtt)
+ gen6_write_pdes(dev_priv->mm.aliasing_ppgtt);
+
i915_gem_chipset_flush(dev);
}