| commit | a2b16588578f8edd0e39c7a6554b047b13e8ca79 | [log] [tgz] |
|---|---|---|
| author | Rafael Antognolli <rafael.antognolli@intel.com> | Fri Dec 15 16:11:17 2017 -0800 |
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | Tue Dec 19 13:43:26 2017 -0800 |
| tree | 3caca70639014b73e4fa1ea8bb95245bb3da7011 | |
| parent | 01ab0f9216070f3337b3da8953a259072f5bd4f7 [diff] [blame] |
drm/i915: Implement WaDisableEarlyEOT. There seems to be another clock gating issue which the workaround is described as: "WA: Set 0xE4F0[1] = 1 to disable Early EOT of thread." Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171216001117.14232-2-rafael.antognolli@intel.com
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c index b4807497..9856e24 100644 --- a/drivers/gpu/drm/i915/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -1272,6 +1272,9 @@ static int cnl_init_workarounds(struct intel_engine_cs *engine) if (ret) return ret; + /* WaDisableEarlyEOT:cnl */ + WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, DISABLE_EARLY_EOT); + return 0; }