| commit | adf4b00ebf4e183f36d88d5a5a591c532fb0abe9 | [log] [tgz] |
|---|---|---|
| author | Russell King <rmk+kernel@arm.linux.org.uk> | Wed Mar 19 12:18:02 2014 +0000 |
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | Fri May 30 00:50:06 2014 +0100 |
| tree | 55f37d9f98f18f8ae6af62b1d0c19ac900b0c5ef | |
| parent | 8b5c18f05621394eb108d3fbc9bf98b05e8162db [diff] |
ARM: l2c: spear13xx: remove cache size override The cache size should already be present in the L2 cache auxiliary control register: it is part of the integration process to configure the hardware IP. Most platforms get this right, yet still many cargo-cult program, and assume that they always need specifying to the L2 cache code. Remove them so we can find out which really need this. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>