drm/i915: Add more dev ops for MIPI sub encoder
Some panels require one time programming if they do not contain their
own eeprom for basic register initialization. The sequence is
Panel Reset --> Send OTP --> Enable Pixel Stream --> Enable the panel
v2: Based on review comments from Jani and Ville
- Updated the commit message with more details
- Move the new parameters out of this patch
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohan.marimuthu@intel.com>
Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 7b9b350..42ed28a 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -147,6 +147,9 @@
DRM_DEBUG_KMS("\n");
+ if (intel_dsi->dev.dev_ops->panel_reset)
+ intel_dsi->dev.dev_ops->panel_reset(&intel_dsi->dev);
+
temp = I915_READ(MIPI_DEVICE_READY(pipe));
if ((temp & DEVICE_READY) == 0) {
temp &= ~ULPS_STATE_MASK;
@@ -162,6 +165,9 @@
I915_WRITE(MIPI_DEVICE_READY(pipe), temp);
}
+ if (intel_dsi->dev.dev_ops->send_otp_cmds)
+ intel_dsi->dev.dev_ops->send_otp_cmds(&intel_dsi->dev);
+
if (is_cmd_mode(intel_dsi))
I915_WRITE(MIPI_MAX_RETURN_PKT_SIZE(pipe), 8 * 4);
@@ -176,7 +182,8 @@
POSTING_READ(MIPI_PORT_CTRL(pipe));
}
- intel_dsi->dev.dev_ops->enable(&intel_dsi->dev);
+ if (intel_dsi->dev.dev_ops->enable)
+ intel_dsi->dev.dev_ops->enable(&intel_dsi->dev);
}
static void intel_dsi_disable(struct intel_encoder *encoder)