commit c651aae5a7732287c1c9bc974ece4ed798780544
author Suzuki K Poulose <suzuki.poulose@arm.com> Tue Mar 14 18:13:27 2017 +0000
committer Catalin Marinas <catalin.marinas@arm.com> Mon Mar 20 16:30:22 2017 +0000
tree bc3647b41e405e93747c80021850563d6a49d7db
parent cb567e79fa504575cb97fb2f866d2040ed1c92e7

arm64: v8.3: Support for weaker release consistency

ARMv8.3 adds new instructions to support Release Consistent
processor consistent (RCpc) model, which is weaker than the
RCsc model.

Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

arch/arm64/include/asm/sysreg.h

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 69af995..c776bde 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -157,6 +157,7 @@
 #define ID_AA64ISAR0_AES_SHIFT		4
 
 /* id_aa64isar1 */
+#define ID_AA64ISAR1_LRCPC_SHIFT	20
 #define ID_AA64ISAR1_FCMA_SHIFT		16
 #define ID_AA64ISAR1_JSCVT_SHIFT	12