| commit | c97689d8860f086125e7ff9cd730027a0057ca4f | [log] [tgz] |
|---|---|---|
| author | Chris Wilson <chris@chris-wilson.co.uk> | Thu Dec 23 10:40:38 2010 +0000 |
| committer | Chris Wilson <chris@chris-wilson.co.uk> | Tue Jan 11 20:35:41 2011 +0000 |
| tree | 019ab7330af6c975ffba0d7016e0ed6243fbf6b0 | |
| parent | 55249baaa5cd188ebd9acdb047eeaed8092e4a93 [diff] |
agp/intel: Flush the chipset write buffers when changing GTT base Flush the chipset write buffers before and after adjusting the GTT base register, just in case. We only modify this value upon initialisation (boot and resume) so there should be no outstanding writes, however there are always those persistent PGTBL_ER that keep getting reported upon resume. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>