drm/radeon: halt engines before disabling MC (6xx/7xx)
It's better to halt the engines before we disable the MC.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 997707b..abb143c 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -1397,11 +1397,6 @@
r600_print_gpu_status_regs(rdev);
- rv515_mc_stop(rdev, &save);
- if (r600_mc_wait_for_idle(rdev)) {
- dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
- }
-
/* Disable CP parsing/prefetching */
if (rdev->family >= CHIP_RV770)
WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(1) | S_0086D8_CP_PFP_HALT(1));
@@ -1420,6 +1415,11 @@
mdelay(50);
+ rv515_mc_stop(rdev, &save);
+ if (r600_mc_wait_for_idle(rdev)) {
+ dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
+ }
+
if (reset_mask & (RADEON_RESET_GFX | RADEON_RESET_COMPUTE)) {
if (rdev->family >= CHIP_RV770)
grbm_soft_reset |= S_008020_SOFT_RESET_DB(1) |