commit | cd474ba0d6048aeefe6f1066a6bfb5eac36a2a81 | [log] [tgz] |
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author | Alex Deucher <alexander.deucher@amd.com> | Thu Feb 04 10:21:23 2016 -0500 |
committer | Alex Deucher <alexander.deucher@amd.com> | Mon Feb 08 10:37:41 2016 -0500 |
tree | 4854307a6b0b4be42ee7885f27597ca652b51048 | |
parent | 6739b3d7bc18a5373efd863b11831e8f515fffe1 [diff] |
drm/amdgpu: add pcie cap module parameters (v2) Allows the user to force the supported pcie gen and lane config on both the asic and the chipset. Useful for debugging pcie problems and for virtualization where we may not be able to query the pcie bridge caps. Default to: gen: chipset 1/2, asic 1/2/3 lanes: 1/2/4/8/16 v2: fix bare metal case Reviewed-by: monk liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>