| commit | cf1805e65802cf77243e2cdcf1b265240f70eda2 | [log] [tgz] |
|---|---|---|
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | Wed Feb 21 19:31:01 2018 +0200 |
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | Thu Feb 22 17:45:49 2018 +0200 |
| tree | 6569cc8f68c6496887d8cd8746203f24706b585e | |
| parent | f7a02ad7d16b24908b9fddbd6176b1c1a2b35058 [diff] [blame] |
drm/i915: Clean up fbc vs. plane checks
Let's record the information whether a plane can do fbc or not under
struct inte_plane.
v2: Rebase due to i9xx_plane_id
Handle BDW/HSW correctly
v3: Move inte_fbc_init() back since we depend on it happening
even with i915.disable_display, and populate
fbc->possible_framebuffer_bits directly from the
plane init code instead
v4: Add note about plane A being tied to pipe A on HSW+
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180221173101.19385-1-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180221160235.11134-5-ville.syrjala@linux.intel.com
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 8088121..f87e81d 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -853,6 +853,7 @@ struct intel_plane { enum plane_id id; enum pipe pipe; bool can_scale; + bool has_fbc; int max_downscale; uint32_t frontbuffer_bit;