commit | d775f26b295a0a303f7a73d7da46e04296484fe7 | [log] [tgz] |
---|---|---|
author | Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> | Fri May 18 19:13:37 2018 +0530 |
committer | David S. Miller <davem@davemloft.net> | Fri May 18 13:54:48 2018 -0400 |
tree | 6173edee4d7650284e93c23880791941a399428f | |
parent | 44a63b137f7b6e4c7bd6c9cc21615941cb36509d [diff] |
cxgb4: fix offset in collecting TX rate limit info Correct the indirect register offsets in collecting TX rate limit info in UP CIM logs. Also, T5 doesn't support these indirect register offsets, so remove them from collection logic. Fixes: be6e36d916b1 ("cxgb4: collect TX rate limit info in UP CIM logs") Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>