| commit | d92f842bb30f52beedad63a4a850b39ca0dbc45f | [log] [tgz] |
|---|---|---|
| author | Scott Tsai <scottt@scottt.tw> | Wed Sep 20 02:16:00 2017 +0800 |
| committer | Paul E. McKenney <paulmck@linux.vnet.ibm.com> | Fri Oct 20 11:09:32 2017 -0700 |
| tree | 03d81db6292daff1a2932584b6fc0f3234327394 | |
| parent | 0902b1f44a72558aece92f074154044861681f84 [diff] |
memory-barriers.txt: Fix typo in pairing example In the "general barrier pairing with implicit control depdendency" example, the last write by CPU 1 was meant to change variable x and not y. The example would be pretty uninteresting if no CPU ever changes x and the variable was initialized to zero. Signed-off-by: Scott Tsai <scottt@scottt.tw> Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>