commit | dbaf381ffbf3acd4ac9a987f567a2b1a5edf6e62 | [log] [tgz] |
---|---|---|
author | Shengjiu Wang <shengjiu.wang@freescale.com> | Tue Sep 09 17:13:25 2014 +0800 |
committer | Shawn Guo <shawn.guo@freescale.com> | Tue Sep 16 10:09:39 2014 +0800 |
tree | 7ef673b04004f91218d0532bc7768831a6769db2 | |
parent | dc4805c2e78ba5a22ea1632f3e3e4ee601a1743b [diff] |
ARM: clk-imx6sl: refine clock tree for SSI Each SSI has "ssi", "ssi_ipg" clocks, and they share same gate bits. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>