| commit | dc4aedbf7c152c092c19e980a9fa1e89d6bc215f | [log] [tgz] |
|---|---|---|
| author | Koji Matsuoka <koji.matsuoka.xm@renesas.com> | Fri Nov 11 18:07:41 2016 +0100 |
| committer | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | Tue Apr 04 17:04:19 2017 +0300 |
| tree | 6292e18fb6a46e25f42b160158d15ef07612326d | |
| parent | 4739a0d40b668ed4d60e048ee8ff03cd863e0987 [diff] |
drm: rcar-du: Add DPLL support The implementation hardcodes a workaround for the H3 ES1.x SoC regardless of the SoC revision, as the workaround can be safely applied on all devices in the Gen3 family without any side effect. Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>