tree 75bad2f5ed22e5c7fb71fee2a8151ce00e5f2968
parent d2048c49152a414efcf8b2696896bc8803ef2f1e
author Boris BREZILLON <boris.brezillon@free-electrons.com> 1418933130 +0100
committer Thierry Reding <thierry.reding@gmail.com> 1422616560 +0100

pwm: atmel-hlcdc: Prevent division by zero

The slow and system clock should never return a rate of zero, but this
might happen if the clocks property defined in the DT is referencing the
wrong clocks.

Prevent any division by zero from happening by testing the clk_freq
value before calling do_div().

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>