PCI: dwc: Add accessors for write permission of DBI read-only registers
The read-only DBI registers can be written only when the "Write to RO
Registers Using DBI" (DBI_RO_WR_EN) field of MISC_CONTROL_1_OFF is set.
Add accessors to enable and disable write permission, and use them instead
of accessing MISC_CONTROL_1_OFF directly.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Joao Pinto <jpinto@synopsys.com>
Acked-by: Roy Zang <tie-fei.zang@freescale.com>
diff --git a/drivers/pci/dwc/pci-layerscape.c b/drivers/pci/dwc/pci-layerscape.c
index a77f756..627e2ed 100644
--- a/drivers/pci/dwc/pci-layerscape.c
+++ b/drivers/pci/dwc/pci-layerscape.c
@@ -33,7 +33,6 @@
/* PEX Internal Configuration Registers */
#define PCIE_STRFMR1 0x71c /* Symbol Timer & Filter Mask Register1 */
-#define PCIE_DBI_RO_WR_EN 0x8bc /* DBI Read-Only Write Enable Register */
#define PCIE_IATU_NUM 6
@@ -145,10 +144,10 @@ static int ls_pcie_host_init(struct pcie_port *pp)
*/
ls_pcie_disable_outbound_atus(pcie);
- iowrite32(1, pci->dbi_base + PCIE_DBI_RO_WR_EN);
+ dw_pcie_dbi_ro_wr_en(pci);
ls_pcie_fix_class(pcie);
ls_pcie_clear_multifunction(pcie);
- iowrite32(0, pci->dbi_base + PCIE_DBI_RO_WR_EN);
+ dw_pcie_dbi_ro_wr_dis(pci);
ls_pcie_drop_msg_tlp(pcie);