diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index f20afe4..20ac09c 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -545,6 +545,90 @@
 
 
 /* --------------------------------------------------------------------
+ *  Timer/Counter blocks
+ * -------------------------------------------------------------------- */
+
+#ifdef CONFIG_ATMEL_TCLIB
+
+static struct resource tcb0_resources[] = {
+	[0] = {
+		.start	= AT91SAM9260_BASE_TCB0,
+		.end	= AT91SAM9260_BASE_TCB0 + SZ_16K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= AT91SAM9260_ID_TC0,
+		.end	= AT91SAM9260_ID_TC0,
+		.flags	= IORESOURCE_IRQ,
+	},
+	[2] = {
+		.start	= AT91SAM9260_ID_TC1,
+		.end	= AT91SAM9260_ID_TC1,
+		.flags	= IORESOURCE_IRQ,
+	},
+	[3] = {
+		.start	= AT91SAM9260_ID_TC2,
+		.end	= AT91SAM9260_ID_TC2,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device at91sam9260_tcb0_device = {
+	.name		= "atmel_tcb",
+	.id		= 0,
+	.resource	= tcb0_resources,
+	.num_resources	= ARRAY_SIZE(tcb0_resources),
+};
+
+static struct resource tcb1_resources[] = {
+	[0] = {
+		.start	= AT91SAM9260_BASE_TCB1,
+		.end	= AT91SAM9260_BASE_TCB1 + SZ_16K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= AT91SAM9260_ID_TC3,
+		.end	= AT91SAM9260_ID_TC3,
+		.flags	= IORESOURCE_IRQ,
+	},
+	[2] = {
+		.start	= AT91SAM9260_ID_TC4,
+		.end	= AT91SAM9260_ID_TC4,
+		.flags	= IORESOURCE_IRQ,
+	},
+	[3] = {
+		.start	= AT91SAM9260_ID_TC5,
+		.end	= AT91SAM9260_ID_TC5,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device at91sam9260_tcb1_device = {
+	.name		= "atmel_tcb",
+	.id		= 1,
+	.resource	= tcb1_resources,
+	.num_resources	= ARRAY_SIZE(tcb1_resources),
+};
+
+static void __init at91_add_device_tc(void)
+{
+	/* this chip has a separate clock and irq for each TC channel */
+	at91_clock_associate("tc0_clk", &at91sam9260_tcb0_device.dev, "t0_clk");
+	at91_clock_associate("tc1_clk", &at91sam9260_tcb0_device.dev, "t1_clk");
+	at91_clock_associate("tc2_clk", &at91sam9260_tcb0_device.dev, "t2_clk");
+	platform_device_register(&at91sam9260_tcb0_device);
+
+	at91_clock_associate("tc3_clk", &at91sam9260_tcb1_device.dev, "t0_clk");
+	at91_clock_associate("tc4_clk", &at91sam9260_tcb1_device.dev, "t1_clk");
+	at91_clock_associate("tc5_clk", &at91sam9260_tcb1_device.dev, "t2_clk");
+	platform_device_register(&at91sam9260_tcb1_device);
+}
+#else
+static void __init at91_add_device_tc(void) { }
+#endif
+
+
+/* --------------------------------------------------------------------
  *  RTT
  * -------------------------------------------------------------------- */
 
@@ -1108,6 +1192,7 @@
 {
 	at91_add_device_rtt();
 	at91_add_device_watchdog();
+	at91_add_device_tc();
 	return 0;
 }