tree 0560c7131bb24b1a202df3d36d41e85e28a30da2
parent 746da42a1f60728fc0f3ba7818ffe8d1aa69cacd
author Petr Machata <petrm@mellanox.com> 1532694419 +0300
committer David S. Miller <davem@davemloft.net> 1532722670 -0700

mlxsw: reg: Add QoS ReWrite Enable Register

This register configures the rewrite enable (whether PCP or DSCP value
in packet should be updated according to packet priority) per receive
port.

Signed-off-by: Petr Machata <petrm@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>