ARM: bL_switcher: do not hardcode GIC IDs in the code
Currently, GIC IDs are hardcoded making the code dependent on the 4+4 b.L
configuration. Let's allow for GIC IDs to be discovered upon switcher
initialization to support other b.L configurations such as the 1+1 one,
or 2+3 as on the VExpress TC2.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
diff --git a/arch/arm/common/bL_switcher.c b/arch/arm/common/bL_switcher.c
index 50e95d89..1c2e5bc 100644
--- a/arch/arm/common/bL_switcher.c
+++ b/arch/arm/common/bL_switcher.c
@@ -110,6 +110,8 @@
* Generic switcher interface
*/
+static unsigned int bL_gic_id[MAX_CPUS_PER_CLUSTER][MAX_NR_CLUSTERS];
+
/*
* bL_switch_to - Switch to a specific cluster for the current CPU
* @new_cluster_id: the ID of the cluster to switch to.
@@ -159,7 +161,7 @@
this_cpu = smp_processor_id();
/* redirect GIC's SGIs to our counterpart */
- gic_migrate_target(cpuid + ib_cluster*4);
+ gic_migrate_target(bL_gic_id[cpuid][ib_cluster]);
/*
* Raise a SGI on the inbound CPU to make sure it doesn't stall
@@ -332,6 +334,16 @@
cluster = (cpu_logical_map(i) >> 8) & 0xff;
if (cpumask_test_cpu(cpu, &common_mask)) {
+ /* Let's take note of the GIC ID for this CPU */
+ int gic_id = gic_get_cpu_id(i);
+ if (gic_id < 0) {
+ pr_err("%s: bad GIC ID for CPU %d\n", __func__, i);
+ return -EINVAL;
+ }
+ bL_gic_id[cpu][cluster] = gic_id;
+ pr_info("GIC ID for CPU %u cluster %u is %u\n",
+ cpu, cluster, gic_id);
+
/*
* We keep only those logical CPUs which number
* is equal to their physical CPU number. This is