| commit | fc20eeff6c03fcdbb2b5ac21472778b573850e77 | [log] [tgz] |
|---|---|---|
| author | Mark Zhang <markz@nvidia.com> | Wed Aug 07 19:25:08 2013 +0800 |
| committer | Peter De Schrijver <pdeschrijver@nvidia.com> | Mon Nov 25 16:11:44 2013 +0200 |
| tree | 152cc4190bdfab23cbca6fae2547419f082a3da8 | |
| parent | d17cb95fa0b8676a38c0d07e2da26885d4ff8187 [diff] |
clk: tegra: Set the clock parent of gr2d/gr3d to pll_c2 pll_m will be the parent of gr2d/gr3d if we don't do this. And because pll_m runs at a high rate so gr2d/gr3d will be unstable. So change the parent of them to pll_c2. Signed-off-by: Mark Zhang <markz@nvidia.com> Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>