blob: 75887e74205b17da7bf22bcb1866a225dcf4a067 [file] [log] [blame]
Luciano Coelhof5fc0f82009-08-06 16:25:28 +03001/*
2 * This file is part of wl1271
3 *
4 * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
5 * Copyright (C) 2008-2009 Nokia Corporation
6 *
7 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25#ifndef __WL1271_H__
26#define __WL1271_H__
27
28#include <linux/mutex.h>
29#include <linux/completion.h>
30#include <linux/spinlock.h>
31#include <linux/list.h>
32#include <linux/bitops.h>
33#include <net/mac80211.h>
34
Juuso Oikarinen2b60100b2009-10-13 12:47:39 +030035#include "wl1271_conf.h"
36
Luciano Coelhof5fc0f82009-08-06 16:25:28 +030037#define DRIVER_NAME "wl1271"
38#define DRIVER_PREFIX DRIVER_NAME ": "
39
40enum {
41 DEBUG_NONE = 0,
42 DEBUG_IRQ = BIT(0),
43 DEBUG_SPI = BIT(1),
44 DEBUG_BOOT = BIT(2),
45 DEBUG_MAILBOX = BIT(3),
Kalle Valoc8c90872010-02-18 13:25:53 +020046 DEBUG_TESTMODE = BIT(4),
Luciano Coelhof5fc0f82009-08-06 16:25:28 +030047 DEBUG_EVENT = BIT(5),
48 DEBUG_TX = BIT(6),
49 DEBUG_RX = BIT(7),
50 DEBUG_SCAN = BIT(8),
51 DEBUG_CRYPT = BIT(9),
52 DEBUG_PSM = BIT(10),
53 DEBUG_MAC80211 = BIT(11),
54 DEBUG_CMD = BIT(12),
55 DEBUG_ACX = BIT(13),
Teemu Paasikivia3b8ea72010-03-18 12:26:41 +020056 DEBUG_SDIO = BIT(14),
Juuso Oikarinen14b228a2010-03-18 12:26:43 +020057 DEBUG_FILTERS = BIT(15),
Juuso Oikarinen5da11dc2010-03-26 12:53:24 +020058 DEBUG_ADHOC = BIT(16),
Luciano Coelhof5fc0f82009-08-06 16:25:28 +030059 DEBUG_ALL = ~0,
60};
61
62#define DEBUG_LEVEL (DEBUG_NONE)
63
64#define DEBUG_DUMP_LIMIT 1024
65
66#define wl1271_error(fmt, arg...) \
67 printk(KERN_ERR DRIVER_PREFIX "ERROR " fmt "\n", ##arg)
68
69#define wl1271_warning(fmt, arg...) \
70 printk(KERN_WARNING DRIVER_PREFIX "WARNING " fmt "\n", ##arg)
71
72#define wl1271_notice(fmt, arg...) \
73 printk(KERN_INFO DRIVER_PREFIX fmt "\n", ##arg)
74
75#define wl1271_info(fmt, arg...) \
76 printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg)
77
78#define wl1271_debug(level, fmt, arg...) \
79 do { \
80 if (level & DEBUG_LEVEL) \
81 printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg); \
82 } while (0)
83
84#define wl1271_dump(level, prefix, buf, len) \
85 do { \
86 if (level & DEBUG_LEVEL) \
87 print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
88 DUMP_PREFIX_OFFSET, 16, 1, \
89 buf, \
90 min_t(size_t, len, DEBUG_DUMP_LIMIT), \
91 0); \
92 } while (0)
93
94#define wl1271_dump_ascii(level, prefix, buf, len) \
95 do { \
96 if (level & DEBUG_LEVEL) \
97 print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
98 DUMP_PREFIX_OFFSET, 16, 1, \
99 buf, \
100 min_t(size_t, len, DEBUG_DUMP_LIMIT), \
101 true); \
102 } while (0)
103
104#define WL1271_DEFAULT_RX_CONFIG (CFG_UNI_FILTER_EN | \
Juuso Oikarinenc87dec92009-10-08 21:56:31 +0300105 CFG_BSSID_FILTER_EN | \
106 CFG_MC_FILTER_EN)
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300107
108#define WL1271_DEFAULT_RX_FILTER (CFG_RX_RCTS_ACK | CFG_RX_PRSP_EN | \
109 CFG_RX_MGMT_EN | CFG_RX_DATA_EN | \
110 CFG_RX_CTL_EN | CFG_RX_BCN_EN | \
111 CFG_RX_AUTH_EN | CFG_RX_ASSOC_EN)
112
113#define WL1271_FW_NAME "wl1271-fw.bin"
114#define WL1271_NVS_NAME "wl1271-nvs.bin"
Juuso Oikarinen152ee6e2010-02-18 13:25:42 +0200115
Juuso Oikarinen04e36fc2010-02-22 08:38:40 +0200116#define WL1271_TX_SECURITY_LO16(s) ((u16)((s) & 0xffff))
117#define WL1271_TX_SECURITY_HI32(s) ((u32)(((s) >> 16) & 0xffffffff))
118
Juuso Oikarinen152ee6e2010-02-18 13:25:42 +0200119/* NVS data structure */
120#define WL1271_NVS_SECTION_SIZE 468
121
122#define WL1271_NVS_GENERAL_PARAMS_SIZE 57
123#define WL1271_NVS_GENERAL_PARAMS_SIZE_PADDED \
124 (WL1271_NVS_GENERAL_PARAMS_SIZE + 1)
125#define WL1271_NVS_STAT_RADIO_PARAMS_SIZE 17
126#define WL1271_NVS_STAT_RADIO_PARAMS_SIZE_PADDED \
127 (WL1271_NVS_STAT_RADIO_PARAMS_SIZE + 1)
128#define WL1271_NVS_DYN_RADIO_PARAMS_SIZE 65
129#define WL1271_NVS_DYN_RADIO_PARAMS_SIZE_PADDED \
130 (WL1271_NVS_DYN_RADIO_PARAMS_SIZE + 1)
131#define WL1271_NVS_FEM_COUNT 2
132#define WL1271_NVS_INI_SPARE_SIZE 124
133
134struct wl1271_nvs_file {
135 /* NVS section */
136 u8 nvs[WL1271_NVS_SECTION_SIZE];
137
138 /* INI section */
139 u8 general_params[WL1271_NVS_GENERAL_PARAMS_SIZE_PADDED];
140 u8 stat_radio_params[WL1271_NVS_STAT_RADIO_PARAMS_SIZE_PADDED];
141 u8 dyn_radio_params[WL1271_NVS_FEM_COUNT]
142 [WL1271_NVS_DYN_RADIO_PARAMS_SIZE_PADDED];
143 u8 ini_spare[WL1271_NVS_INI_SPARE_SIZE];
144} __attribute__ ((packed));
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300145
Juuso Oikarinen545f1da2009-10-08 21:56:23 +0300146/*
Teemu Paasikivi1ebec3d2009-10-13 12:47:48 +0300147 * Enable/disable 802.11a support for WL1273
148 */
149#undef WL1271_80211A_ENABLED
150
Juuso Oikarinen259da432010-03-26 12:53:18 +0200151#define WL1271_BUSY_WORD_CNT 1
Juuso Oikarinen545f1da2009-10-08 21:56:23 +0300152#define WL1271_BUSY_WORD_LEN (WL1271_BUSY_WORD_CNT * sizeof(u32))
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300153
154#define WL1271_ELP_HW_STATE_ASLEEP 0
155#define WL1271_ELP_HW_STATE_IRQ 1
156
Juuso Oikarinend94cd292009-10-08 21:56:25 +0300157#define WL1271_DEFAULT_BEACON_INT 100
158#define WL1271_DEFAULT_DTIM_PERIOD 1
159
Juuso Oikarinenc87dec92009-10-08 21:56:31 +0300160#define ACX_TX_DESCRIPTORS 32
Juuso Oikarinenbe7078c2009-10-08 21:56:26 +0300161
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300162enum wl1271_state {
163 WL1271_STATE_OFF,
164 WL1271_STATE_ON,
165 WL1271_STATE_PLT,
166};
167
168enum wl1271_partition_type {
169 PART_DOWN,
170 PART_WORK,
171 PART_DRPW,
172
173 PART_TABLE_LEN
174};
175
176struct wl1271_partition {
177 u32 size;
178 u32 start;
179};
180
181struct wl1271_partition_set {
182 struct wl1271_partition mem;
183 struct wl1271_partition reg;
Juuso Oikarinen451de972009-10-12 15:08:46 +0300184 struct wl1271_partition mem2;
185 struct wl1271_partition mem3;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300186};
187
188struct wl1271;
189
190/* FIXME: I'm not sure about this structure name */
191struct wl1271_chip {
192 u32 id;
193 char fw_ver[21];
194};
195
196struct wl1271_stats {
197 struct acx_statistics *fw_stats;
198 unsigned long fw_stats_update;
199
200 unsigned int retry_count;
201 unsigned int excessive_retries;
202};
203
204struct wl1271_debugfs {
205 struct dentry *rootdir;
206 struct dentry *fw_statistics;
207
208 struct dentry *tx_internal_desc_overflow;
209
210 struct dentry *rx_out_of_mem;
211 struct dentry *rx_hdr_overflow;
212 struct dentry *rx_hw_stuck;
213 struct dentry *rx_dropped;
214 struct dentry *rx_fcs_err;
215 struct dentry *rx_xfr_hint_trig;
216 struct dentry *rx_path_reset;
217 struct dentry *rx_reset_counter;
218
219 struct dentry *dma_rx_requested;
220 struct dentry *dma_rx_errors;
221 struct dentry *dma_tx_requested;
222 struct dentry *dma_tx_errors;
223
224 struct dentry *isr_cmd_cmplt;
225 struct dentry *isr_fiqs;
226 struct dentry *isr_rx_headers;
227 struct dentry *isr_rx_mem_overflow;
228 struct dentry *isr_rx_rdys;
229 struct dentry *isr_irqs;
230 struct dentry *isr_tx_procs;
231 struct dentry *isr_decrypt_done;
232 struct dentry *isr_dma0_done;
233 struct dentry *isr_dma1_done;
234 struct dentry *isr_tx_exch_complete;
235 struct dentry *isr_commands;
236 struct dentry *isr_rx_procs;
237 struct dentry *isr_hw_pm_mode_changes;
238 struct dentry *isr_host_acknowledges;
239 struct dentry *isr_pci_pm;
240 struct dentry *isr_wakeups;
241 struct dentry *isr_low_rssi;
242
243 struct dentry *wep_addr_key_count;
244 struct dentry *wep_default_key_count;
245 /* skipping wep.reserved */
246 struct dentry *wep_key_not_found;
247 struct dentry *wep_decrypt_fail;
248 struct dentry *wep_packets;
249 struct dentry *wep_interrupt;
250
251 struct dentry *pwr_ps_enter;
252 struct dentry *pwr_elp_enter;
253 struct dentry *pwr_missing_bcns;
254 struct dentry *pwr_wake_on_host;
255 struct dentry *pwr_wake_on_timer_exp;
256 struct dentry *pwr_tx_with_ps;
257 struct dentry *pwr_tx_without_ps;
258 struct dentry *pwr_rcvd_beacons;
259 struct dentry *pwr_power_save_off;
260 struct dentry *pwr_enable_ps;
261 struct dentry *pwr_disable_ps;
262 struct dentry *pwr_fix_tsf_ps;
263 /* skipping cont_miss_bcns_spread for now */
264 struct dentry *pwr_rcvd_awake_beacons;
265
266 struct dentry *mic_rx_pkts;
267 struct dentry *mic_calc_failure;
268
269 struct dentry *aes_encrypt_fail;
270 struct dentry *aes_decrypt_fail;
271 struct dentry *aes_encrypt_packets;
272 struct dentry *aes_decrypt_packets;
273 struct dentry *aes_encrypt_interrupt;
274 struct dentry *aes_decrypt_interrupt;
275
276 struct dentry *event_heart_beat;
277 struct dentry *event_calibration;
278 struct dentry *event_rx_mismatch;
279 struct dentry *event_rx_mem_empty;
280 struct dentry *event_rx_pool;
281 struct dentry *event_oom_late;
282 struct dentry *event_phy_transmit_error;
283 struct dentry *event_tx_stuck;
284
285 struct dentry *ps_pspoll_timeouts;
286 struct dentry *ps_upsd_timeouts;
287 struct dentry *ps_upsd_max_sptime;
288 struct dentry *ps_upsd_max_apturn;
289 struct dentry *ps_pspoll_max_apturn;
290 struct dentry *ps_pspoll_utilization;
291 struct dentry *ps_upsd_utilization;
292
293 struct dentry *rxpipe_rx_prep_beacon_drop;
294 struct dentry *rxpipe_descr_host_int_trig_rx_data;
295 struct dentry *rxpipe_beacon_buffer_thres_host_int_trig_rx_data;
296 struct dentry *rxpipe_missed_beacon_host_int_trig_rx_data;
297 struct dentry *rxpipe_tx_xfr_host_int_trig_rx_data;
298
299 struct dentry *tx_queue_len;
300
301 struct dentry *retry_count;
302 struct dentry *excessive_retries;
Luciano Coelho98b2a682009-12-11 15:40:52 +0200303 struct dentry *gpio_power;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300304};
305
306#define NUM_TX_QUEUES 4
307#define NUM_RX_PKT_DESC 8
308
309/* FW status registers */
310struct wl1271_fw_status {
Luciano Coelhod0f63b22009-10-15 10:33:29 +0300311 __le32 intr;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300312 u8 fw_rx_counter;
313 u8 drv_rx_counter;
314 u8 reserved;
315 u8 tx_results_counter;
Luciano Coelhod0f63b22009-10-15 10:33:29 +0300316 __le32 rx_pkt_descs[NUM_RX_PKT_DESC];
317 __le32 tx_released_blks[NUM_TX_QUEUES];
318 __le32 fw_localtime;
319 __le32 padding[2];
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300320} __attribute__ ((packed));
321
322struct wl1271_rx_mem_pool_addr {
323 u32 addr;
324 u32 addr_extra;
325};
326
Teemu Paasikiviabb0b3b2009-10-13 12:47:50 +0300327struct wl1271_scan {
328 u8 state;
329 u8 ssid[IW_ESSID_MAX_SIZE+1];
330 size_t ssid_len;
331 u8 active;
332 u8 high_prio;
333 u8 probe_requests;
334};
335
Teemu Paasikivi8197b712010-02-22 08:38:23 +0200336struct wl1271_if_operations {
337 void (*read)(struct wl1271 *wl, int addr, void *buf, size_t len,
338 bool fixed);
339 void (*write)(struct wl1271 *wl, int addr, void *buf, size_t len,
340 bool fixed);
341 void (*reset)(struct wl1271 *wl);
342 void (*init)(struct wl1271 *wl);
Teemu Paasikivibecd5512010-03-18 12:26:27 +0200343 void (*power)(struct wl1271 *wl, bool enable);
Teemu Paasikivi8197b712010-02-22 08:38:23 +0200344 struct device* (*dev)(struct wl1271 *wl);
345 void (*enable_irq)(struct wl1271 *wl);
346 void (*disable_irq)(struct wl1271 *wl);
347};
348
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300349struct wl1271 {
Teemu Paasikivi3b56dd62010-03-18 12:26:46 +0200350 struct platform_device *plat_dev;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300351 struct ieee80211_hw *hw;
352 bool mac80211_registered;
353
Teemu Paasikivi8197b712010-02-22 08:38:23 +0200354 void *if_priv;
355
356 struct wl1271_if_operations *if_ops;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300357
358 void (*set_power)(bool enable);
359 int irq;
360
361 spinlock_t wl_lock;
362
363 enum wl1271_state state;
364 struct mutex mutex;
365
Juuso Oikarinen830fb672009-12-11 15:41:06 +0200366#define WL1271_FLAG_STA_RATES_CHANGED (0)
367#define WL1271_FLAG_STA_ASSOCIATED (1)
Juuso Oikarinen71449f82009-12-11 15:41:07 +0200368#define WL1271_FLAG_JOINED (2)
369#define WL1271_FLAG_GPIO_POWER (3)
370#define WL1271_FLAG_TX_QUEUE_STOPPED (4)
371#define WL1271_FLAG_SCANNING (5)
372#define WL1271_FLAG_IN_ELP (6)
373#define WL1271_FLAG_PSM (7)
374#define WL1271_FLAG_PSM_REQUESTED (8)
Juuso Oikarinen1e73eb62010-02-22 08:38:37 +0200375#define WL1271_FLAG_IRQ_PENDING (9)
376#define WL1271_FLAG_IRQ_RUNNING (10)
Juuso Oikarinene1972812010-04-09 11:07:29 +0300377#define WL1271_FLAG_IDLE (11)
Juuso Oikarinen830fb672009-12-11 15:41:06 +0200378 unsigned long flags;
379
Juuso Oikarinen451de972009-10-12 15:08:46 +0300380 struct wl1271_partition_set part;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300381
382 struct wl1271_chip chip;
383
384 int cmd_box_addr;
385 int event_box_addr;
386
387 u8 *fw;
388 size_t fw_len;
Juuso Oikarinen152ee6e2010-02-18 13:25:42 +0200389 struct wl1271_nvs_file *nvs;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300390
391 u8 bssid[ETH_ALEN];
392 u8 mac_addr[ETH_ALEN];
393 u8 bss_type;
Juuso Oikarinen5da11dc2010-03-26 12:53:24 +0200394 u8 set_bss_type;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300395 u8 ssid[IW_ESSID_MAX_SIZE + 1];
396 u8 ssid_len;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300397 int channel;
398
399 struct wl1271_acx_mem_map *target_mem_map;
400
401 /* Accounting for allocated / available TX blocks on HW */
402 u32 tx_blocks_freed[NUM_TX_QUEUES];
403 u32 tx_blocks_available;
Juuso Oikarinenffb591c2010-02-22 08:38:31 +0200404 u32 tx_results_count;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300405
406 /* Transmitted TX packets counter for chipset interface */
Juuso Oikarinenffb591c2010-02-22 08:38:31 +0200407 u32 tx_packets_count;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300408
409 /* Time-offset between host and chipset clocks */
Juuso Oikarinenac5e1e32010-02-22 08:38:38 +0200410 s64 time_offset;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300411
412 /* Session counter for the chipset */
413 int session_counter;
414
415 /* Frames scheduled for transmission, not handled yet */
416 struct sk_buff_head tx_queue;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300417
418 struct work_struct tx_work;
Juuso Oikarinenc87dec92009-10-08 21:56:31 +0300419
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300420 /* Pending TX frames */
Juuso Oikarinenbe7078c2009-10-08 21:56:26 +0300421 struct sk_buff *tx_frames[ACX_TX_DESCRIPTORS];
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300422
Juuso Oikarinenac4e4ce2009-10-08 21:56:19 +0300423 /* Security sequence number counters */
424 u8 tx_security_last_seq;
Juuso Oikarinen04e36fc2010-02-22 08:38:40 +0200425 s64 tx_security_seq;
Juuso Oikarinenac4e4ce2009-10-08 21:56:19 +0300426
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300427 /* FW Rx counter */
428 u32 rx_counter;
429
430 /* Rx memory pool address */
431 struct wl1271_rx_mem_pool_addr rx_mem_pool_addr;
432
433 /* The target interrupt mask */
434 struct work_struct irq_work;
435
436 /* The mbox event mask */
437 u32 event_mask;
438
439 /* Mailbox pointers */
440 u32 mbox_ptr[2];
441
442 /* Are we currently scanning */
Teemu Paasikiviabb0b3b2009-10-13 12:47:50 +0300443 struct wl1271_scan scan;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300444
445 /* Our association ID */
446 u16 aid;
447
Juuso Oikarinend94cd292009-10-08 21:56:25 +0300448 /* currently configured rate set */
Juuso Oikarinen830fb672009-12-11 15:41:06 +0200449 u32 sta_rate_set;
Juuso Oikarinend94cd292009-10-08 21:56:25 +0300450 u32 basic_rate_set;
Juuso Oikarinenebba60c2010-04-01 11:38:20 +0300451 u32 basic_rate;
Juuso Oikarinen830fb672009-12-11 15:41:06 +0200452 u32 rate_set;
Juuso Oikarinend94cd292009-10-08 21:56:25 +0300453
Juuso Oikarinen8a5a37a2009-10-08 21:56:24 +0300454 /* The current band */
455 enum ieee80211_band band;
456
Juuso Oikarinen60e84c22010-03-26 12:53:25 +0200457 /* Beaconing interval (needed for ad-hoc) */
458 u32 beacon_int;
459
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300460 /* Default key (for WEP) */
461 u32 default_key;
462
Juuso Oikarinen14b228a2010-03-18 12:26:43 +0200463 unsigned int filters;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300464 unsigned int rx_config;
465 unsigned int rx_filter;
466
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300467 struct completion *elp_compl;
Juuso Oikarinen37b70a82009-10-08 21:56:21 +0300468 struct delayed_work elp_work;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300469
Juuso Oikarinen19ad0712009-11-02 20:22:11 +0200470 /* retry counter for PSM entries */
471 u8 psm_entry_retry;
472
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300473 /* in dBm */
474 int power_level;
475
Juuso Oikarinen00236aed2010-04-09 11:07:30 +0300476 int rssi_thold;
477 int last_rssi_event;
478
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300479 struct wl1271_stats stats;
480 struct wl1271_debugfs debugfs;
481
482 u32 buffer_32;
483 u32 buffer_cmd;
Juuso Oikarinen545f1da2009-10-08 21:56:23 +0300484 u32 buffer_busyword[WL1271_BUSY_WORD_CNT];
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300485
486 struct wl1271_fw_status *fw_status;
487 struct wl1271_tx_hw_res_if *tx_res_if;
Juuso Oikarinenb771eee2009-10-08 21:56:34 +0300488
489 struct ieee80211_vif *vif;
Luciano Coelhod6e19d132009-10-12 15:08:43 +0300490
Juuso Oikarinen2b60100b2009-10-13 12:47:39 +0300491 /* Current chipset configuration */
492 struct conf_drv_settings conf;
Juuso Oikarinen01c09162009-10-13 12:47:55 +0300493
Juuso Oikarinen7fc3a862010-03-18 12:26:32 +0200494 bool sg_enabled;
495
Juuso Oikarinen01c09162009-10-13 12:47:55 +0300496 struct list_head list;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300497};
498
499int wl1271_plt_start(struct wl1271 *wl);
500int wl1271_plt_stop(struct wl1271 *wl);
501
502#define JOIN_TIMEOUT 5000 /* 5000 milliseconds to join */
503
504#define SESSION_COUNTER_MAX 7 /* maximum value for the session counter */
505
506#define WL1271_DEFAULT_POWER_LEVEL 0
507
Juuso Oikarinen06f7bc72010-02-22 08:38:33 +0200508#define WL1271_TX_QUEUE_LOW_WATERMARK 10
509#define WL1271_TX_QUEUE_HIGH_WATERMARK 25
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300510
Juuso Oikarinen01ac17e2009-12-11 15:41:02 +0200511/* WL1271 needs a 200ms sleep after power on, and a 20ms sleep before power
512 on in case is has been shut down shortly before */
513#define WL1271_PRE_POWER_ON_SLEEP 20 /* in miliseconds */
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300514#define WL1271_POWER_ON_SLEEP 200 /* in miliseconds */
515
Teemu Paasikivi1ebec3d2009-10-13 12:47:48 +0300516static inline bool wl1271_11a_enabled(void)
517{
Juuso Oikarinen152ee6e2010-02-18 13:25:42 +0200518 /* FIXME: this could be determined based on the NVS-INI file */
Teemu Paasikivi1ebec3d2009-10-13 12:47:48 +0300519#ifdef WL1271_80211A_ENABLED
520 return true;
521#else
522 return false;
523#endif
524}
525
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300526#endif