blob: 5a4f4900516920278ee89834ea76efc2a7c5c20d [file] [log] [blame]
Andy Yanb21f4b62014-12-05 14:26:31 +08001/*
2 * Copyright (C) 2011 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10#ifndef __DW_HDMI__
11#define __DW_HDMI__
12
13#include <drm/drmP.h>
14
15enum {
16 DW_HDMI_RES_8,
17 DW_HDMI_RES_10,
18 DW_HDMI_RES_12,
19 DW_HDMI_RES_MAX,
20};
21
22enum dw_hdmi_devtype {
23 IMX6Q_HDMI,
24 IMX6DL_HDMI,
Andy Yan12b9f202015-01-07 15:48:27 +080025 RK3288_HDMI,
Andy Yanb21f4b62014-12-05 14:26:31 +080026};
27
28struct dw_hdmi_mpll_config {
29 unsigned long mpixelclock;
30 struct {
31 u16 cpce;
32 u16 gmp;
33 } res[DW_HDMI_RES_MAX];
34};
35
36struct dw_hdmi_curr_ctrl {
37 unsigned long mpixelclock;
38 u16 curr[DW_HDMI_RES_MAX];
39};
40
41struct dw_hdmi_sym_term {
42 unsigned long mpixelclock;
43 u16 sym_ctr; /*clock symbol and transmitter control*/
44 u16 term; /*transmission termination value*/
45};
46
47struct dw_hdmi_plat_data {
48 enum dw_hdmi_devtype dev_type;
49 const struct dw_hdmi_mpll_config *mpll_cfg;
50 const struct dw_hdmi_curr_ctrl *cur_ctr;
51 const struct dw_hdmi_sym_term *sym_term;
52 enum drm_mode_status (*mode_valid)(struct drm_connector *connector,
53 struct drm_display_mode *mode);
54};
55
56void dw_hdmi_unbind(struct device *dev, struct device *master, void *data);
57int dw_hdmi_bind(struct device *dev, struct device *master,
58 void *data, struct drm_encoder *encoder,
59 struct resource *iores, int irq,
60 const struct dw_hdmi_plat_data *plat_data);
61#endif /* __IMX_HDMI_H__ */