blob: c1e099aa57f36845f1035bfc802545e3ba2c91c3 [file] [log] [blame]
Viresh KUMAR4a370272010-08-04 11:44:14 +05301/*
2 * drivers/char/watchdog/sp805-wdt.c
3 *
4 * Watchdog driver for ARM SP805 watchdog module
5 *
6 * Copyright (C) 2010 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2 or later. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <linux/device.h>
15#include <linux/resource.h>
16#include <linux/amba/bus.h>
17#include <linux/bitops.h>
18#include <linux/clk.h>
19#include <linux/fs.h>
20#include <linux/init.h>
21#include <linux/io.h>
22#include <linux/ioport.h>
23#include <linux/kernel.h>
24#include <linux/math64.h>
25#include <linux/miscdevice.h>
26#include <linux/module.h>
27#include <linux/moduleparam.h>
28#include <linux/slab.h>
29#include <linux/spinlock.h>
30#include <linux/types.h>
31#include <linux/uaccess.h>
32#include <linux/watchdog.h>
33
34/* default timeout in seconds */
35#define DEFAULT_TIMEOUT 60
36
37#define MODULE_NAME "sp805-wdt"
38
39/* watchdog register offsets and masks */
40#define WDTLOAD 0x000
41 #define LOAD_MIN 0x00000001
42 #define LOAD_MAX 0xFFFFFFFF
43#define WDTVALUE 0x004
44#define WDTCONTROL 0x008
45 /* control register masks */
46 #define INT_ENABLE (1 << 0)
47 #define RESET_ENABLE (1 << 1)
48#define WDTINTCLR 0x00C
49#define WDTRIS 0x010
50#define WDTMIS 0x014
51 #define INT_MASK (1 << 0)
52#define WDTLOCK 0xC00
53 #define UNLOCK 0x1ACCE551
54 #define LOCK 0x00000001
55
56/**
57 * struct sp805_wdt: sp805 wdt device structure
58 *
59 * lock: spin lock protecting dev structure and io access
60 * base: base address of wdt
61 * clk: clock structure of wdt
62 * dev: amba device structure of wdt
63 * status: current status of wdt
64 * load_val: load value to be set for current timeout
65 * timeout: current programmed timeout
66 */
67struct sp805_wdt {
68 spinlock_t lock;
69 void __iomem *base;
70 struct clk *clk;
71 struct amba_device *adev;
72 unsigned long status;
73 #define WDT_BUSY 0
74 #define WDT_CAN_BE_CLOSED 1
75 unsigned int load_val;
76 unsigned int timeout;
77};
78
79/* local variables */
80static struct sp805_wdt *wdt;
81static int nowayout = WATCHDOG_NOWAYOUT;
82
83/* This routine finds load value that will reset system in required timout */
84static void wdt_setload(unsigned int timeout)
85{
86 u64 load, rate;
87
88 rate = clk_get_rate(wdt->clk);
89
90 /*
91 * sp805 runs counter with given value twice, after the end of first
92 * counter it gives an interrupt and then starts counter again. If
Lucas De Marchi25985ed2011-03-30 22:57:33 -030093 * interrupt already occurred then it resets the system. This is why
Viresh KUMAR4a370272010-08-04 11:44:14 +053094 * load is half of what should be required.
95 */
96 load = div_u64(rate, 2) * timeout - 1;
97
98 load = (load > LOAD_MAX) ? LOAD_MAX : load;
99 load = (load < LOAD_MIN) ? LOAD_MIN : load;
100
101 spin_lock(&wdt->lock);
102 wdt->load_val = load;
103 /* roundup timeout to closest positive integer value */
104 wdt->timeout = div_u64((load + 1) * 2 + (rate / 2), rate);
105 spin_unlock(&wdt->lock);
106}
107
108/* returns number of seconds left for reset to occur */
109static u32 wdt_timeleft(void)
110{
111 u64 load, rate;
112
113 rate = clk_get_rate(wdt->clk);
114
115 spin_lock(&wdt->lock);
116 load = readl(wdt->base + WDTVALUE);
117
118 /*If the interrupt is inactive then time left is WDTValue + WDTLoad. */
119 if (!(readl(wdt->base + WDTRIS) & INT_MASK))
120 load += wdt->load_val + 1;
121 spin_unlock(&wdt->lock);
122
123 return div_u64(load, rate);
124}
125
126/* enables watchdog timers reset */
127static void wdt_enable(void)
128{
129 spin_lock(&wdt->lock);
130
131 writel(UNLOCK, wdt->base + WDTLOCK);
132 writel(wdt->load_val, wdt->base + WDTLOAD);
133 writel(INT_MASK, wdt->base + WDTINTCLR);
134 writel(INT_ENABLE | RESET_ENABLE, wdt->base + WDTCONTROL);
135 writel(LOCK, wdt->base + WDTLOCK);
136
137 spin_unlock(&wdt->lock);
138}
139
140/* disables watchdog timers reset */
141static void wdt_disable(void)
142{
143 spin_lock(&wdt->lock);
144
145 writel(UNLOCK, wdt->base + WDTLOCK);
146 writel(0, wdt->base + WDTCONTROL);
Viresh KUMAR4a370272010-08-04 11:44:14 +0530147 writel(LOCK, wdt->base + WDTLOCK);
148
149 spin_unlock(&wdt->lock);
150}
151
152static ssize_t sp805_wdt_write(struct file *file, const char *data,
153 size_t len, loff_t *ppos)
154{
155 if (len) {
156 if (!nowayout) {
157 size_t i;
158
159 clear_bit(WDT_CAN_BE_CLOSED, &wdt->status);
160
161 for (i = 0; i != len; i++) {
162 char c;
163
164 if (get_user(c, data + i))
165 return -EFAULT;
166 /* Check for Magic Close character */
167 if (c == 'V') {
168 set_bit(WDT_CAN_BE_CLOSED,
169 &wdt->status);
170 break;
171 }
172 }
173 }
174 wdt_enable();
175 }
176 return len;
177}
178
179static const struct watchdog_info ident = {
180 .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
181 .identity = MODULE_NAME,
182};
183
184static long sp805_wdt_ioctl(struct file *file, unsigned int cmd,
185 unsigned long arg)
186{
187 int ret = -ENOTTY;
188 unsigned int timeout;
189
190 switch (cmd) {
191 case WDIOC_GETSUPPORT:
192 ret = copy_to_user((struct watchdog_info *)arg, &ident,
193 sizeof(ident)) ? -EFAULT : 0;
194 break;
195
196 case WDIOC_GETSTATUS:
197 ret = put_user(0, (int *)arg);
198 break;
199
200 case WDIOC_KEEPALIVE:
201 wdt_enable();
202 ret = 0;
203 break;
204
205 case WDIOC_SETTIMEOUT:
206 ret = get_user(timeout, (unsigned int *)arg);
207 if (ret)
208 break;
209
210 wdt_setload(timeout);
211
212 wdt_enable();
213 /* Fall through */
214
215 case WDIOC_GETTIMEOUT:
216 ret = put_user(wdt->timeout, (unsigned int *)arg);
217 break;
218 case WDIOC_GETTIMELEFT:
219 ret = put_user(wdt_timeleft(), (unsigned int *)arg);
220 break;
221 }
222 return ret;
223}
224
225static int sp805_wdt_open(struct inode *inode, struct file *file)
226{
227 int ret = 0;
228
229 if (test_and_set_bit(WDT_BUSY, &wdt->status))
230 return -EBUSY;
231
232 ret = clk_enable(wdt->clk);
233 if (ret) {
234 dev_err(&wdt->adev->dev, "clock enable fail");
235 goto err;
236 }
237
238 wdt_enable();
239
240 /* can not be closed, once enabled */
241 clear_bit(WDT_CAN_BE_CLOSED, &wdt->status);
242 return nonseekable_open(inode, file);
243
244err:
245 clear_bit(WDT_BUSY, &wdt->status);
246 return ret;
247}
248
249static int sp805_wdt_release(struct inode *inode, struct file *file)
250{
251 if (!test_bit(WDT_CAN_BE_CLOSED, &wdt->status)) {
252 clear_bit(WDT_BUSY, &wdt->status);
253 dev_warn(&wdt->adev->dev, "Device closed unexpectedly\n");
254 return 0;
255 }
256
257 wdt_disable();
258 clk_disable(wdt->clk);
259 clear_bit(WDT_BUSY, &wdt->status);
260
261 return 0;
262}
263
264static const struct file_operations sp805_wdt_fops = {
265 .owner = THIS_MODULE,
266 .llseek = no_llseek,
267 .write = sp805_wdt_write,
268 .unlocked_ioctl = sp805_wdt_ioctl,
269 .open = sp805_wdt_open,
270 .release = sp805_wdt_release,
271};
272
273static struct miscdevice sp805_wdt_miscdev = {
274 .minor = WATCHDOG_MINOR,
275 .name = "watchdog",
276 .fops = &sp805_wdt_fops,
277};
278
279static int __devinit
Russell Kingaa25afa2011-02-19 15:55:00 +0000280sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id)
Viresh KUMAR4a370272010-08-04 11:44:14 +0530281{
282 int ret = 0;
283
284 if (!request_mem_region(adev->res.start, resource_size(&adev->res),
285 "sp805_wdt")) {
286 dev_warn(&adev->dev, "Failed to get memory region resource\n");
287 ret = -ENOENT;
288 goto err;
289 }
290
291 wdt = kzalloc(sizeof(*wdt), GFP_KERNEL);
292 if (!wdt) {
293 dev_warn(&adev->dev, "Kzalloc failed\n");
294 ret = -ENOMEM;
295 goto err_kzalloc;
296 }
297
298 wdt->clk = clk_get(&adev->dev, NULL);
299 if (IS_ERR(wdt->clk)) {
300 dev_warn(&adev->dev, "Clock not found\n");
301 ret = PTR_ERR(wdt->clk);
302 goto err_clk_get;
303 }
304
305 wdt->base = ioremap(adev->res.start, resource_size(&adev->res));
306 if (!wdt->base) {
307 ret = -ENOMEM;
308 dev_warn(&adev->dev, "ioremap fail\n");
309 goto err_ioremap;
310 }
311
312 wdt->adev = adev;
313 spin_lock_init(&wdt->lock);
314 wdt_setload(DEFAULT_TIMEOUT);
315
316 ret = misc_register(&sp805_wdt_miscdev);
317 if (ret < 0) {
318 dev_warn(&adev->dev, "cannot register misc device\n");
319 goto err_misc_register;
320 }
321
322 dev_info(&adev->dev, "registration successful\n");
323 return 0;
324
325err_misc_register:
326 iounmap(wdt->base);
327err_ioremap:
328 clk_put(wdt->clk);
329err_clk_get:
330 kfree(wdt);
331 wdt = NULL;
332err_kzalloc:
333 release_mem_region(adev->res.start, resource_size(&adev->res));
334err:
335 dev_err(&adev->dev, "Probe Failed!!!\n");
336 return ret;
337}
338
339static int __devexit sp805_wdt_remove(struct amba_device *adev)
340{
341 misc_deregister(&sp805_wdt_miscdev);
342 iounmap(wdt->base);
343 clk_put(wdt->clk);
344 kfree(wdt);
345 release_mem_region(adev->res.start, resource_size(&adev->res));
346
347 return 0;
348}
349
350static struct amba_id sp805_wdt_ids[] __initdata = {
351 {
352 .id = 0x00141805,
353 .mask = 0x00ffffff,
354 },
355 { 0, 0 },
356};
357
358static struct amba_driver sp805_wdt_driver = {
359 .drv = {
360 .name = MODULE_NAME,
361 },
362 .id_table = sp805_wdt_ids,
363 .probe = sp805_wdt_probe,
364 .remove = __devexit_p(sp805_wdt_remove),
365};
366
367static int __init sp805_wdt_init(void)
368{
369 return amba_driver_register(&sp805_wdt_driver);
370}
371module_init(sp805_wdt_init);
372
373static void __exit sp805_wdt_exit(void)
374{
375 amba_driver_unregister(&sp805_wdt_driver);
376}
377module_exit(sp805_wdt_exit);
378
379module_param(nowayout, int, 0);
380MODULE_PARM_DESC(nowayout,
381 "Set to 1 to keep watchdog running after device release");
382
383MODULE_AUTHOR("Viresh Kumar <viresh.kumar@st.com>");
384MODULE_DESCRIPTION("ARM SP805 Watchdog Driver");
385MODULE_LICENSE("GPL");
386MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);