blob: ca6a62bb10dbe0c71fb28d5ed9fe08b7dbc3bf17 [file] [log] [blame]
Joshua Henderson2572f002016-01-13 18:15:39 -07001/*
2 * Joshua Henderson <joshua.henderson@microchip.com>
3 * Copyright (C) 2015 Microchip Technology Inc. All rights reserved.
4 *
5 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 */
14#include <linux/clk.h>
15#include <linux/clk-provider.h>
16#include <linux/clocksource.h>
17#include <linux/init.h>
18#include <linux/of.h>
19#include <linux/of_irq.h>
20#include <linux/irqdomain.h>
21
22#include <asm/time.h>
23
24#include "pic32mzda.h"
25
26static const struct of_device_id pic32_infra_match[] = {
27 { .compatible = "microchip,pic32mzda-infra", },
28 { },
29};
30
31#define DEFAULT_CORE_TIMER_INTERRUPT 0
32
33static unsigned int pic32_xlate_core_timer_irq(void)
34{
35 static struct device_node *node;
36 unsigned int irq;
37
38 node = of_find_matching_node(NULL, pic32_infra_match);
39
40 if (WARN_ON(!node))
41 goto default_map;
42
43 irq = irq_of_parse_and_map(node, 0);
44 if (!irq)
45 goto default_map;
46
47 return irq;
48
49default_map:
50
51 return irq_create_mapping(NULL, DEFAULT_CORE_TIMER_INTERRUPT);
52}
53
54unsigned int get_c0_compare_int(void)
55{
56 return pic32_xlate_core_timer_irq();
57}
58
59void __init plat_time_init(void)
60{
61 struct clk *clk;
62
63 of_clk_init(NULL);
64 clk = clk_get_sys("cpu_clk", NULL);
65 if (IS_ERR(clk))
66 panic("unable to get CPU clock, err=%ld", PTR_ERR(clk));
67
68 clk_prepare_enable(clk);
69 pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000);
70 mips_hpt_frequency = clk_get_rate(clk) / 2;
71
72 clocksource_probe();
73}