Greg Kroah-Hartman | b244131 | 2017-11-01 15:07:57 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
Robert P. J. Day | 96532ba | 2008-02-03 15:06:26 +0200 | [diff] [blame] | 2 | #ifndef _LINUX_DMA_MAPPING_H |
| 3 | #define _LINUX_DMA_MAPPING_H |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4 | |
Robin Murphy | 002edb6 | 2015-11-06 16:32:51 -0800 | [diff] [blame] | 5 | #include <linux/sizes.h> |
Andrew Morton | 842fa69 | 2011-11-02 13:39:33 -0700 | [diff] [blame] | 6 | #include <linux/string.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | #include <linux/device.h> |
| 8 | #include <linux/err.h> |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 9 | #include <linux/dma-debug.h> |
Alexey Dobriyan | b7f080c | 2011-06-16 11:01:34 +0000 | [diff] [blame] | 10 | #include <linux/dma-direction.h> |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 11 | #include <linux/scatterlist.h> |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 12 | #include <linux/bug.h> |
Tom Lendacky | 648babb | 2017-07-17 16:10:22 -0500 | [diff] [blame] | 13 | #include <linux/mem_encrypt.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 15 | /** |
| 16 | * List of possible attributes associated with a DMA mapping. The semantics |
| 17 | * of each attribute should be defined in Documentation/DMA-attributes.txt. |
| 18 | * |
| 19 | * DMA_ATTR_WRITE_BARRIER: DMA to a memory region with this attribute |
| 20 | * forces all pending DMA writes to complete. |
| 21 | */ |
| 22 | #define DMA_ATTR_WRITE_BARRIER (1UL << 0) |
| 23 | /* |
| 24 | * DMA_ATTR_WEAK_ORDERING: Specifies that reads and writes to the mapping |
| 25 | * may be weakly ordered, that is that reads and writes may pass each other. |
| 26 | */ |
| 27 | #define DMA_ATTR_WEAK_ORDERING (1UL << 1) |
| 28 | /* |
| 29 | * DMA_ATTR_WRITE_COMBINE: Specifies that writes to the mapping may be |
| 30 | * buffered to improve performance. |
| 31 | */ |
| 32 | #define DMA_ATTR_WRITE_COMBINE (1UL << 2) |
| 33 | /* |
| 34 | * DMA_ATTR_NON_CONSISTENT: Lets the platform to choose to return either |
| 35 | * consistent or non-consistent memory as it sees fit. |
| 36 | */ |
| 37 | #define DMA_ATTR_NON_CONSISTENT (1UL << 3) |
| 38 | /* |
| 39 | * DMA_ATTR_NO_KERNEL_MAPPING: Lets the platform to avoid creating a kernel |
| 40 | * virtual mapping for the allocated buffer. |
| 41 | */ |
| 42 | #define DMA_ATTR_NO_KERNEL_MAPPING (1UL << 4) |
| 43 | /* |
| 44 | * DMA_ATTR_SKIP_CPU_SYNC: Allows platform code to skip synchronization of |
| 45 | * the CPU cache for the given buffer assuming that it has been already |
| 46 | * transferred to 'device' domain. |
| 47 | */ |
| 48 | #define DMA_ATTR_SKIP_CPU_SYNC (1UL << 5) |
| 49 | /* |
| 50 | * DMA_ATTR_FORCE_CONTIGUOUS: Forces contiguous allocation of the buffer |
| 51 | * in physical memory. |
| 52 | */ |
| 53 | #define DMA_ATTR_FORCE_CONTIGUOUS (1UL << 6) |
| 54 | /* |
| 55 | * DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem |
| 56 | * that it's probably not worth the time to try to allocate memory to in a way |
| 57 | * that gives better TLB efficiency. |
| 58 | */ |
| 59 | #define DMA_ATTR_ALLOC_SINGLE_PAGES (1UL << 7) |
Mauricio Faria de Oliveira | a9a62c9 | 2016-10-11 13:54:14 -0700 | [diff] [blame] | 60 | /* |
| 61 | * DMA_ATTR_NO_WARN: This tells the DMA-mapping subsystem to suppress |
| 62 | * allocation failure reports (similarly to __GFP_NOWARN). |
| 63 | */ |
| 64 | #define DMA_ATTR_NO_WARN (1UL << 8) |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 65 | |
Bjorn Helgaas | 77f2ea2 | 2014-04-30 11:20:53 -0600 | [diff] [blame] | 66 | /* |
Mitchel Humpherys | b2fb366 | 2017-01-06 18:58:11 +0530 | [diff] [blame] | 67 | * DMA_ATTR_PRIVILEGED: used to indicate that the buffer is fully |
| 68 | * accessible at an elevated privilege level (and ideally inaccessible or |
| 69 | * at least read-only at lesser-privileged levels). |
| 70 | */ |
| 71 | #define DMA_ATTR_PRIVILEGED (1UL << 9) |
| 72 | |
| 73 | /* |
Bjorn Helgaas | 77f2ea2 | 2014-04-30 11:20:53 -0600 | [diff] [blame] | 74 | * A dma_addr_t can hold any valid DMA or bus address for the platform. |
| 75 | * It can be given to a device to use as a DMA source or target. A CPU cannot |
| 76 | * reference a dma_addr_t directly because there may be translation between |
| 77 | * its physical address space and the bus address space. |
| 78 | */ |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 79 | struct dma_map_ops { |
Marek Szyprowski | 613c457 | 2012-03-28 16:36:27 +0200 | [diff] [blame] | 80 | void* (*alloc)(struct device *dev, size_t size, |
| 81 | dma_addr_t *dma_handle, gfp_t gfp, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 82 | unsigned long attrs); |
Marek Szyprowski | 613c457 | 2012-03-28 16:36:27 +0200 | [diff] [blame] | 83 | void (*free)(struct device *dev, size_t size, |
| 84 | void *vaddr, dma_addr_t dma_handle, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 85 | unsigned long attrs); |
Marek Szyprowski | 9adc537 | 2011-12-21 16:55:33 +0100 | [diff] [blame] | 86 | int (*mmap)(struct device *, struct vm_area_struct *, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 87 | void *, dma_addr_t, size_t, |
| 88 | unsigned long attrs); |
Marek Szyprowski | 9adc537 | 2011-12-21 16:55:33 +0100 | [diff] [blame] | 89 | |
Marek Szyprowski | d2b7428 | 2012-06-13 10:05:52 +0200 | [diff] [blame] | 90 | int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 91 | dma_addr_t, size_t, unsigned long attrs); |
Marek Szyprowski | d2b7428 | 2012-06-13 10:05:52 +0200 | [diff] [blame] | 92 | |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 93 | dma_addr_t (*map_page)(struct device *dev, struct page *page, |
| 94 | unsigned long offset, size_t size, |
| 95 | enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 96 | unsigned long attrs); |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 97 | void (*unmap_page)(struct device *dev, dma_addr_t dma_handle, |
| 98 | size_t size, enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 99 | unsigned long attrs); |
Ricardo Ribalda Delgado | 04abab6 | 2015-02-11 13:53:15 +0100 | [diff] [blame] | 100 | /* |
| 101 | * map_sg returns 0 on error and a value > 0 on success. |
| 102 | * It should never return a value < 0. |
| 103 | */ |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 104 | int (*map_sg)(struct device *dev, struct scatterlist *sg, |
| 105 | int nents, enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 106 | unsigned long attrs); |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 107 | void (*unmap_sg)(struct device *dev, |
| 108 | struct scatterlist *sg, int nents, |
| 109 | enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 110 | unsigned long attrs); |
Niklas Söderlund | ba409b3 | 2016-08-10 13:22:14 +0200 | [diff] [blame] | 111 | dma_addr_t (*map_resource)(struct device *dev, phys_addr_t phys_addr, |
| 112 | size_t size, enum dma_data_direction dir, |
| 113 | unsigned long attrs); |
| 114 | void (*unmap_resource)(struct device *dev, dma_addr_t dma_handle, |
| 115 | size_t size, enum dma_data_direction dir, |
| 116 | unsigned long attrs); |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 117 | void (*sync_single_for_cpu)(struct device *dev, |
| 118 | dma_addr_t dma_handle, size_t size, |
| 119 | enum dma_data_direction dir); |
| 120 | void (*sync_single_for_device)(struct device *dev, |
| 121 | dma_addr_t dma_handle, size_t size, |
| 122 | enum dma_data_direction dir); |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 123 | void (*sync_sg_for_cpu)(struct device *dev, |
| 124 | struct scatterlist *sg, int nents, |
| 125 | enum dma_data_direction dir); |
| 126 | void (*sync_sg_for_device)(struct device *dev, |
| 127 | struct scatterlist *sg, int nents, |
| 128 | enum dma_data_direction dir); |
Christoph Hellwig | c9eb617 | 2017-08-27 10:37:15 +0200 | [diff] [blame] | 129 | void (*cache_sync)(struct device *dev, void *vaddr, size_t size, |
| 130 | enum dma_data_direction direction); |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 131 | int (*mapping_error)(struct device *dev, dma_addr_t dma_addr); |
| 132 | int (*dma_supported)(struct device *dev, u64 mask); |
Milton Miller | 3a8f755 | 2011-06-24 09:05:23 +0000 | [diff] [blame] | 133 | u64 (*get_required_mask)(struct device *dev); |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 134 | }; |
| 135 | |
Christoph Hellwig | 002e674 | 2018-01-09 16:30:23 +0100 | [diff] [blame] | 136 | extern const struct dma_map_ops dma_direct_ops; |
Bart Van Assche | 551199a | 2017-01-20 13:04:07 -0800 | [diff] [blame] | 137 | extern const struct dma_map_ops dma_virt_ops; |
Christian Borntraeger | a8463d4 | 2016-02-02 21:46:32 -0800 | [diff] [blame] | 138 | |
Andrew Morton | 8f286c3 | 2007-10-18 03:05:07 -0700 | [diff] [blame] | 139 | #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) |
Borislav Petkov | 34c6538 | 2007-10-18 03:05:06 -0700 | [diff] [blame] | 140 | |
James Bottomley | 32e8f70 | 2007-10-16 01:23:55 -0700 | [diff] [blame] | 141 | #define DMA_MASK_NONE 0x0ULL |
| 142 | |
Rolf Eike Beer | d6bd3a3 | 2006-09-29 01:59:48 -0700 | [diff] [blame] | 143 | static inline int valid_dma_direction(int dma_direction) |
| 144 | { |
| 145 | return ((dma_direction == DMA_BIDIRECTIONAL) || |
| 146 | (dma_direction == DMA_TO_DEVICE) || |
| 147 | (dma_direction == DMA_FROM_DEVICE)); |
| 148 | } |
| 149 | |
James Bottomley | 32e8f70 | 2007-10-16 01:23:55 -0700 | [diff] [blame] | 150 | static inline int is_device_dma_capable(struct device *dev) |
| 151 | { |
| 152 | return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE; |
| 153 | } |
| 154 | |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 155 | #ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT |
| 156 | /* |
| 157 | * These three functions are only for dma allocator. |
| 158 | * Don't use them in device drivers. |
| 159 | */ |
Vladimir Murzin | 43fc509 | 2017-07-20 11:19:58 +0100 | [diff] [blame] | 160 | int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size, |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 161 | dma_addr_t *dma_handle, void **ret); |
Vladimir Murzin | 43fc509 | 2017-07-20 11:19:58 +0100 | [diff] [blame] | 162 | int dma_release_from_dev_coherent(struct device *dev, int order, void *vaddr); |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 163 | |
Vladimir Murzin | 43fc509 | 2017-07-20 11:19:58 +0100 | [diff] [blame] | 164 | int dma_mmap_from_dev_coherent(struct device *dev, struct vm_area_struct *vma, |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 165 | void *cpu_addr, size_t size, int *ret); |
Vladimir Murzin | 43fc509 | 2017-07-20 11:19:58 +0100 | [diff] [blame] | 166 | |
| 167 | void *dma_alloc_from_global_coherent(ssize_t size, dma_addr_t *dma_handle); |
| 168 | int dma_release_from_global_coherent(int order, void *vaddr); |
| 169 | int dma_mmap_from_global_coherent(struct vm_area_struct *vma, void *cpu_addr, |
| 170 | size_t size, int *ret); |
| 171 | |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 172 | #else |
Vladimir Murzin | 43fc509 | 2017-07-20 11:19:58 +0100 | [diff] [blame] | 173 | #define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0) |
| 174 | #define dma_release_from_dev_coherent(dev, order, vaddr) (0) |
| 175 | #define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0) |
| 176 | |
| 177 | static inline void *dma_alloc_from_global_coherent(ssize_t size, |
| 178 | dma_addr_t *dma_handle) |
| 179 | { |
| 180 | return NULL; |
| 181 | } |
| 182 | |
| 183 | static inline int dma_release_from_global_coherent(int order, void *vaddr) |
| 184 | { |
| 185 | return 0; |
| 186 | } |
| 187 | |
| 188 | static inline int dma_mmap_from_global_coherent(struct vm_area_struct *vma, |
| 189 | void *cpu_addr, size_t size, |
| 190 | int *ret) |
| 191 | { |
| 192 | return 0; |
| 193 | } |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 194 | #endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */ |
| 195 | |
Dan Williams | 1b0fac4 | 2007-07-15 23:40:26 -0700 | [diff] [blame] | 196 | #ifdef CONFIG_HAS_DMA |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 197 | #include <asm/dma-mapping.h> |
Bart Van Assche | 815dd18 | 2017-01-20 13:04:04 -0800 | [diff] [blame] | 198 | static inline const struct dma_map_ops *get_dma_ops(struct device *dev) |
| 199 | { |
| 200 | if (dev && dev->dma_ops) |
| 201 | return dev->dma_ops; |
| 202 | return get_arch_dma_ops(dev ? dev->bus : NULL); |
| 203 | } |
| 204 | |
Bart Van Assche | ca6e8e1 | 2017-01-20 13:04:03 -0800 | [diff] [blame] | 205 | static inline void set_dma_ops(struct device *dev, |
| 206 | const struct dma_map_ops *dma_ops) |
| 207 | { |
| 208 | dev->dma_ops = dma_ops; |
| 209 | } |
Dan Williams | 1b0fac4 | 2007-07-15 23:40:26 -0700 | [diff] [blame] | 210 | #else |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 211 | /* |
Geert Uytterhoeven | f29ab49 | 2018-03-16 14:25:40 +0100 | [diff] [blame] | 212 | * Define the dma api to allow compilation of dma dependent code. |
| 213 | * Code that depends on the dma-mapping API needs to set 'depends on HAS_DMA' |
| 214 | * in its Kconfig, unless it already depends on <something> || COMPILE_TEST, |
| 215 | * where <something> guarantuees the availability of the dma-mapping API. |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 216 | */ |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 217 | static inline const struct dma_map_ops *get_dma_ops(struct device *dev) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 218 | { |
Geert Uytterhoeven | f29ab49 | 2018-03-16 14:25:40 +0100 | [diff] [blame] | 219 | return NULL; |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 220 | } |
| 221 | #endif |
| 222 | |
| 223 | static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr, |
| 224 | size_t size, |
| 225 | enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 226 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 227 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 228 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 229 | dma_addr_t addr; |
| 230 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 231 | BUG_ON(!valid_dma_direction(dir)); |
Stephen Boyd | 99c65fa | 2018-10-08 00:20:07 -0700 | [diff] [blame] | 232 | debug_dma_map_single(dev, ptr, size); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 233 | addr = ops->map_page(dev, virt_to_page(ptr), |
Geliang Tang | 8e99469 | 2016-01-20 15:02:12 -0800 | [diff] [blame] | 234 | offset_in_page(ptr), size, |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 235 | dir, attrs); |
| 236 | debug_dma_map_page(dev, virt_to_page(ptr), |
Geliang Tang | 8e99469 | 2016-01-20 15:02:12 -0800 | [diff] [blame] | 237 | offset_in_page(ptr), size, |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 238 | dir, addr, true); |
| 239 | return addr; |
| 240 | } |
| 241 | |
| 242 | static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr, |
| 243 | size_t size, |
| 244 | enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 245 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 246 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 247 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 248 | |
| 249 | BUG_ON(!valid_dma_direction(dir)); |
| 250 | if (ops->unmap_page) |
| 251 | ops->unmap_page(dev, addr, size, dir, attrs); |
| 252 | debug_dma_unmap_page(dev, addr, size, dir, true); |
| 253 | } |
| 254 | |
| 255 | /* |
| 256 | * dma_maps_sg_attrs returns 0 on error and > 0 on success. |
| 257 | * It should never return a value < 0. |
| 258 | */ |
| 259 | static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, |
| 260 | int nents, enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 261 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 262 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 263 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Levin, Alexander (Sasha Levin) | 4950276 | 2017-11-15 17:35:51 -0800 | [diff] [blame] | 264 | int ents; |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 265 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 266 | BUG_ON(!valid_dma_direction(dir)); |
| 267 | ents = ops->map_sg(dev, sg, nents, dir, attrs); |
| 268 | BUG_ON(ents < 0); |
| 269 | debug_dma_map_sg(dev, sg, nents, ents, dir); |
| 270 | |
| 271 | return ents; |
| 272 | } |
| 273 | |
| 274 | static inline void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg, |
| 275 | int nents, enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 276 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 277 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 278 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 279 | |
| 280 | BUG_ON(!valid_dma_direction(dir)); |
| 281 | debug_dma_unmap_sg(dev, sg, nents, dir); |
| 282 | if (ops->unmap_sg) |
| 283 | ops->unmap_sg(dev, sg, nents, dir, attrs); |
| 284 | } |
| 285 | |
Alexander Duyck | 0495c3d | 2016-12-14 15:05:23 -0800 | [diff] [blame] | 286 | static inline dma_addr_t dma_map_page_attrs(struct device *dev, |
| 287 | struct page *page, |
| 288 | size_t offset, size_t size, |
| 289 | enum dma_data_direction dir, |
| 290 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 291 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 292 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 293 | dma_addr_t addr; |
| 294 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 295 | BUG_ON(!valid_dma_direction(dir)); |
Alexander Duyck | 0495c3d | 2016-12-14 15:05:23 -0800 | [diff] [blame] | 296 | addr = ops->map_page(dev, page, offset, size, dir, attrs); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 297 | debug_dma_map_page(dev, page, offset, size, dir, addr, false); |
| 298 | |
| 299 | return addr; |
| 300 | } |
| 301 | |
Alexander Duyck | 0495c3d | 2016-12-14 15:05:23 -0800 | [diff] [blame] | 302 | static inline void dma_unmap_page_attrs(struct device *dev, |
| 303 | dma_addr_t addr, size_t size, |
| 304 | enum dma_data_direction dir, |
| 305 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 306 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 307 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 308 | |
| 309 | BUG_ON(!valid_dma_direction(dir)); |
| 310 | if (ops->unmap_page) |
Alexander Duyck | 0495c3d | 2016-12-14 15:05:23 -0800 | [diff] [blame] | 311 | ops->unmap_page(dev, addr, size, dir, attrs); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 312 | debug_dma_unmap_page(dev, addr, size, dir, false); |
| 313 | } |
| 314 | |
Niklas Söderlund | 6f3d879 | 2016-08-10 13:22:16 +0200 | [diff] [blame] | 315 | static inline dma_addr_t dma_map_resource(struct device *dev, |
| 316 | phys_addr_t phys_addr, |
| 317 | size_t size, |
| 318 | enum dma_data_direction dir, |
| 319 | unsigned long attrs) |
| 320 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 321 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Niklas Söderlund | 6f3d879 | 2016-08-10 13:22:16 +0200 | [diff] [blame] | 322 | dma_addr_t addr; |
| 323 | |
| 324 | BUG_ON(!valid_dma_direction(dir)); |
| 325 | |
| 326 | /* Don't allow RAM to be mapped */ |
Niklas Söderlund | 3757dc4 | 2016-09-29 12:02:40 +0200 | [diff] [blame] | 327 | BUG_ON(pfn_valid(PHYS_PFN(phys_addr))); |
Niklas Söderlund | 6f3d879 | 2016-08-10 13:22:16 +0200 | [diff] [blame] | 328 | |
| 329 | addr = phys_addr; |
| 330 | if (ops->map_resource) |
| 331 | addr = ops->map_resource(dev, phys_addr, size, dir, attrs); |
| 332 | |
| 333 | debug_dma_map_resource(dev, phys_addr, size, dir, addr); |
| 334 | |
| 335 | return addr; |
| 336 | } |
| 337 | |
| 338 | static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr, |
| 339 | size_t size, enum dma_data_direction dir, |
| 340 | unsigned long attrs) |
| 341 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 342 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Niklas Söderlund | 6f3d879 | 2016-08-10 13:22:16 +0200 | [diff] [blame] | 343 | |
| 344 | BUG_ON(!valid_dma_direction(dir)); |
| 345 | if (ops->unmap_resource) |
| 346 | ops->unmap_resource(dev, addr, size, dir, attrs); |
| 347 | debug_dma_unmap_resource(dev, addr, size, dir); |
| 348 | } |
| 349 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 350 | static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, |
| 351 | size_t size, |
| 352 | enum dma_data_direction dir) |
| 353 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 354 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 355 | |
| 356 | BUG_ON(!valid_dma_direction(dir)); |
| 357 | if (ops->sync_single_for_cpu) |
| 358 | ops->sync_single_for_cpu(dev, addr, size, dir); |
| 359 | debug_dma_sync_single_for_cpu(dev, addr, size, dir); |
| 360 | } |
| 361 | |
| 362 | static inline void dma_sync_single_for_device(struct device *dev, |
| 363 | dma_addr_t addr, size_t size, |
| 364 | enum dma_data_direction dir) |
| 365 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 366 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 367 | |
| 368 | BUG_ON(!valid_dma_direction(dir)); |
| 369 | if (ops->sync_single_for_device) |
| 370 | ops->sync_single_for_device(dev, addr, size, dir); |
| 371 | debug_dma_sync_single_for_device(dev, addr, size, dir); |
| 372 | } |
| 373 | |
| 374 | static inline void dma_sync_single_range_for_cpu(struct device *dev, |
| 375 | dma_addr_t addr, |
| 376 | unsigned long offset, |
| 377 | size_t size, |
| 378 | enum dma_data_direction dir) |
| 379 | { |
| 380 | const struct dma_map_ops *ops = get_dma_ops(dev); |
| 381 | |
| 382 | BUG_ON(!valid_dma_direction(dir)); |
| 383 | if (ops->sync_single_for_cpu) |
| 384 | ops->sync_single_for_cpu(dev, addr + offset, size, dir); |
| 385 | debug_dma_sync_single_range_for_cpu(dev, addr, offset, size, dir); |
| 386 | } |
| 387 | |
| 388 | static inline void dma_sync_single_range_for_device(struct device *dev, |
| 389 | dma_addr_t addr, |
| 390 | unsigned long offset, |
| 391 | size_t size, |
| 392 | enum dma_data_direction dir) |
| 393 | { |
| 394 | const struct dma_map_ops *ops = get_dma_ops(dev); |
| 395 | |
| 396 | BUG_ON(!valid_dma_direction(dir)); |
| 397 | if (ops->sync_single_for_device) |
| 398 | ops->sync_single_for_device(dev, addr + offset, size, dir); |
| 399 | debug_dma_sync_single_range_for_device(dev, addr, offset, size, dir); |
| 400 | } |
| 401 | |
| 402 | static inline void |
| 403 | dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, |
| 404 | int nelems, enum dma_data_direction dir) |
| 405 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 406 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 407 | |
| 408 | BUG_ON(!valid_dma_direction(dir)); |
| 409 | if (ops->sync_sg_for_cpu) |
| 410 | ops->sync_sg_for_cpu(dev, sg, nelems, dir); |
| 411 | debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir); |
| 412 | } |
| 413 | |
| 414 | static inline void |
| 415 | dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, |
| 416 | int nelems, enum dma_data_direction dir) |
| 417 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 418 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 419 | |
| 420 | BUG_ON(!valid_dma_direction(dir)); |
| 421 | if (ops->sync_sg_for_device) |
| 422 | ops->sync_sg_for_device(dev, sg, nelems, dir); |
| 423 | debug_dma_sync_sg_for_device(dev, sg, nelems, dir); |
| 424 | |
| 425 | } |
| 426 | |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 427 | #define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0) |
| 428 | #define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0) |
| 429 | #define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0) |
| 430 | #define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0) |
Alexander Duyck | 0495c3d | 2016-12-14 15:05:23 -0800 | [diff] [blame] | 431 | #define dma_map_page(d, p, o, s, r) dma_map_page_attrs(d, p, o, s, r, 0) |
| 432 | #define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 433 | |
Christoph Hellwig | c9eb617 | 2017-08-27 10:37:15 +0200 | [diff] [blame] | 434 | static inline void |
| 435 | dma_cache_sync(struct device *dev, void *vaddr, size_t size, |
| 436 | enum dma_data_direction dir) |
| 437 | { |
| 438 | const struct dma_map_ops *ops = get_dma_ops(dev); |
| 439 | |
| 440 | BUG_ON(!valid_dma_direction(dir)); |
| 441 | if (ops->cache_sync) |
| 442 | ops->cache_sync(dev, vaddr, size, dir); |
| 443 | } |
| 444 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 445 | extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma, |
Christoph Hellwig | 58b0440 | 2018-09-11 08:55:28 +0200 | [diff] [blame] | 446 | void *cpu_addr, dma_addr_t dma_addr, size_t size, |
| 447 | unsigned long attrs); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 448 | |
| 449 | void *dma_common_contiguous_remap(struct page *page, size_t size, |
| 450 | unsigned long vm_flags, |
| 451 | pgprot_t prot, const void *caller); |
| 452 | |
| 453 | void *dma_common_pages_remap(struct page **pages, size_t size, |
| 454 | unsigned long vm_flags, pgprot_t prot, |
| 455 | const void *caller); |
| 456 | void dma_common_free_remap(void *cpu_addr, size_t size, unsigned long vm_flags); |
| 457 | |
| 458 | /** |
| 459 | * dma_mmap_attrs - map a coherent DMA allocation into user space |
| 460 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices |
| 461 | * @vma: vm_area_struct describing requested user mapping |
| 462 | * @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs |
| 463 | * @handle: device-view address returned from dma_alloc_attrs |
| 464 | * @size: size of memory originally requested in dma_alloc_attrs |
| 465 | * @attrs: attributes of mapping properties requested in dma_alloc_attrs |
| 466 | * |
| 467 | * Map a coherent DMA buffer previously allocated by dma_alloc_attrs |
| 468 | * into user space. The coherent DMA buffer must not be freed by the |
| 469 | * driver until the user space mapping has been released. |
| 470 | */ |
| 471 | static inline int |
| 472 | dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, void *cpu_addr, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 473 | dma_addr_t dma_addr, size_t size, unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 474 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 475 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 476 | BUG_ON(!ops); |
| 477 | if (ops->mmap) |
| 478 | return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs); |
Christoph Hellwig | 58b0440 | 2018-09-11 08:55:28 +0200 | [diff] [blame] | 479 | return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size, attrs); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 480 | } |
| 481 | |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 482 | #define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 483 | |
| 484 | int |
Christoph Hellwig | 9406a49 | 2018-08-23 09:39:38 +0200 | [diff] [blame] | 485 | dma_common_get_sgtable(struct device *dev, struct sg_table *sgt, void *cpu_addr, |
| 486 | dma_addr_t dma_addr, size_t size, unsigned long attrs); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 487 | |
| 488 | static inline int |
| 489 | dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, void *cpu_addr, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 490 | dma_addr_t dma_addr, size_t size, |
| 491 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 492 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 493 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 494 | BUG_ON(!ops); |
| 495 | if (ops->get_sgtable) |
| 496 | return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size, |
| 497 | attrs); |
Christoph Hellwig | 9406a49 | 2018-08-23 09:39:38 +0200 | [diff] [blame] | 498 | return dma_common_get_sgtable(dev, sgt, cpu_addr, dma_addr, size, |
| 499 | attrs); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 500 | } |
| 501 | |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 502 | #define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 503 | |
| 504 | #ifndef arch_dma_alloc_attrs |
Huaisheng Ye | 884571f | 2018-05-25 13:00:00 +0800 | [diff] [blame] | 505 | #define arch_dma_alloc_attrs(dev) (true) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 506 | #endif |
| 507 | |
| 508 | static inline void *dma_alloc_attrs(struct device *dev, size_t size, |
| 509 | dma_addr_t *dma_handle, gfp_t flag, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 510 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 511 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 512 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 513 | void *cpu_addr; |
| 514 | |
| 515 | BUG_ON(!ops); |
Christoph Hellwig | 205e1b7 | 2017-12-22 14:50:47 +0100 | [diff] [blame] | 516 | WARN_ON_ONCE(dev && !dev->coherent_dma_mask); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 517 | |
Vladimir Murzin | 43fc509 | 2017-07-20 11:19:58 +0100 | [diff] [blame] | 518 | if (dma_alloc_from_dev_coherent(dev, size, dma_handle, &cpu_addr)) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 519 | return cpu_addr; |
| 520 | |
Christoph Hellwig | e89f5b3 | 2018-03-28 15:35:35 +0200 | [diff] [blame] | 521 | /* let the implementation decide on the zone to allocate from: */ |
| 522 | flag &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM); |
Christoph Hellwig | 57bf5a8 | 2017-12-22 16:05:15 +0100 | [diff] [blame] | 523 | |
Huaisheng Ye | 884571f | 2018-05-25 13:00:00 +0800 | [diff] [blame] | 524 | if (!arch_dma_alloc_attrs(&dev)) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 525 | return NULL; |
| 526 | if (!ops->alloc) |
| 527 | return NULL; |
| 528 | |
| 529 | cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs); |
| 530 | debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr); |
| 531 | return cpu_addr; |
| 532 | } |
| 533 | |
| 534 | static inline void dma_free_attrs(struct device *dev, size_t size, |
| 535 | void *cpu_addr, dma_addr_t dma_handle, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 536 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 537 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 538 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 539 | |
| 540 | BUG_ON(!ops); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 541 | |
Vladimir Murzin | 43fc509 | 2017-07-20 11:19:58 +0100 | [diff] [blame] | 542 | if (dma_release_from_dev_coherent(dev, get_order(size), cpu_addr)) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 543 | return; |
Robin Murphy | d27fb99 | 2018-07-23 22:42:48 +0100 | [diff] [blame] | 544 | /* |
| 545 | * On non-coherent platforms which implement DMA-coherent buffers via |
| 546 | * non-cacheable remaps, ops->free() may call vunmap(). Thus getting |
| 547 | * this far in IRQ context is a) at risk of a BUG_ON() or trying to |
| 548 | * sleep on some machines, and b) an indication that the driver is |
| 549 | * probably misusing the coherent API anyway. |
| 550 | */ |
| 551 | WARN_ON(irqs_disabled()); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 552 | |
Zhen Lei | d6b7eae | 2016-03-09 14:08:38 -0800 | [diff] [blame] | 553 | if (!ops->free || !cpu_addr) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 554 | return; |
| 555 | |
| 556 | debug_dma_free_coherent(dev, size, cpu_addr, dma_handle); |
| 557 | ops->free(dev, size, cpu_addr, dma_handle, attrs); |
| 558 | } |
| 559 | |
| 560 | static inline void *dma_alloc_coherent(struct device *dev, size_t size, |
Christoph Hellwig | 7ed1d91 | 2018-09-24 13:06:58 +0200 | [diff] [blame] | 561 | dma_addr_t *dma_handle, gfp_t gfp) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 562 | { |
Christoph Hellwig | 7ed1d91 | 2018-09-24 13:06:58 +0200 | [diff] [blame] | 563 | |
| 564 | return dma_alloc_attrs(dev, size, dma_handle, gfp, |
| 565 | (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 566 | } |
| 567 | |
| 568 | static inline void dma_free_coherent(struct device *dev, size_t size, |
| 569 | void *cpu_addr, dma_addr_t dma_handle) |
| 570 | { |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 571 | return dma_free_attrs(dev, size, cpu_addr, dma_handle, 0); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 572 | } |
| 573 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 574 | static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) |
| 575 | { |
Robin Murphy | 5237e95 | 2017-07-24 18:29:27 +0100 | [diff] [blame] | 576 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 577 | |
Robin Murphy | 5237e95 | 2017-07-24 18:29:27 +0100 | [diff] [blame] | 578 | debug_dma_mapping_error(dev, dma_addr); |
| 579 | if (ops->mapping_error) |
| 580 | return ops->mapping_error(dev, dma_addr); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 581 | return 0; |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 582 | } |
| 583 | |
Tom Lendacky | 648babb | 2017-07-17 16:10:22 -0500 | [diff] [blame] | 584 | static inline void dma_check_mask(struct device *dev, u64 mask) |
| 585 | { |
| 586 | if (sme_active() && (mask < (((u64)sme_get_me_mask() << 1) - 1))) |
| 587 | dev_warn(dev, "SME is active, device will require DMA bounce buffers\n"); |
| 588 | } |
| 589 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 590 | static inline int dma_supported(struct device *dev, u64 mask) |
| 591 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 592 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 593 | |
| 594 | if (!ops) |
| 595 | return 0; |
| 596 | if (!ops->dma_supported) |
| 597 | return 1; |
| 598 | return ops->dma_supported(dev, mask); |
| 599 | } |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 600 | |
| 601 | #ifndef HAVE_ARCH_DMA_SET_MASK |
| 602 | static inline int dma_set_mask(struct device *dev, u64 mask) |
| 603 | { |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 604 | if (!dev->dma_mask || !dma_supported(dev, mask)) |
| 605 | return -EIO; |
Tom Lendacky | 648babb | 2017-07-17 16:10:22 -0500 | [diff] [blame] | 606 | |
| 607 | dma_check_mask(dev, mask); |
| 608 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 609 | *dev->dma_mask = mask; |
| 610 | return 0; |
| 611 | } |
Dan Williams | 1b0fac4 | 2007-07-15 23:40:26 -0700 | [diff] [blame] | 612 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 613 | |
FUJITA Tomonori | 589fc9a | 2008-09-12 19:42:34 +0900 | [diff] [blame] | 614 | static inline u64 dma_get_mask(struct device *dev) |
| 615 | { |
FUJITA Tomonori | 07a2c01 | 2008-09-19 02:02:05 +0900 | [diff] [blame] | 616 | if (dev && dev->dma_mask && *dev->dma_mask) |
FUJITA Tomonori | 589fc9a | 2008-09-12 19:42:34 +0900 | [diff] [blame] | 617 | return *dev->dma_mask; |
Yang Hongyang | 284901a | 2009-04-06 19:01:15 -0700 | [diff] [blame] | 618 | return DMA_BIT_MASK(32); |
FUJITA Tomonori | 589fc9a | 2008-09-12 19:42:34 +0900 | [diff] [blame] | 619 | } |
| 620 | |
Rob Herring | 58af4a2 | 2012-03-20 14:33:01 -0500 | [diff] [blame] | 621 | #ifdef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK |
FUJITA Tomonori | 710224f | 2010-09-22 13:04:55 -0700 | [diff] [blame] | 622 | int dma_set_coherent_mask(struct device *dev, u64 mask); |
| 623 | #else |
FUJITA Tomonori | 6a1961f | 2010-03-10 15:23:39 -0800 | [diff] [blame] | 624 | static inline int dma_set_coherent_mask(struct device *dev, u64 mask) |
| 625 | { |
| 626 | if (!dma_supported(dev, mask)) |
| 627 | return -EIO; |
Tom Lendacky | 648babb | 2017-07-17 16:10:22 -0500 | [diff] [blame] | 628 | |
| 629 | dma_check_mask(dev, mask); |
| 630 | |
FUJITA Tomonori | 6a1961f | 2010-03-10 15:23:39 -0800 | [diff] [blame] | 631 | dev->coherent_dma_mask = mask; |
| 632 | return 0; |
| 633 | } |
FUJITA Tomonori | 710224f | 2010-09-22 13:04:55 -0700 | [diff] [blame] | 634 | #endif |
FUJITA Tomonori | 6a1961f | 2010-03-10 15:23:39 -0800 | [diff] [blame] | 635 | |
Russell King | 4aa806b | 2013-06-26 13:49:44 +0100 | [diff] [blame] | 636 | /* |
| 637 | * Set both the DMA mask and the coherent DMA mask to the same thing. |
| 638 | * Note that we don't check the return value from dma_set_coherent_mask() |
| 639 | * as the DMA API guarantees that the coherent DMA mask can be set to |
| 640 | * the same or smaller than the streaming DMA mask. |
| 641 | */ |
| 642 | static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask) |
| 643 | { |
| 644 | int rc = dma_set_mask(dev, mask); |
| 645 | if (rc == 0) |
| 646 | dma_set_coherent_mask(dev, mask); |
| 647 | return rc; |
| 648 | } |
| 649 | |
Russell King | fa6a8d6 | 2013-06-27 12:21:45 +0100 | [diff] [blame] | 650 | /* |
| 651 | * Similar to the above, except it deals with the case where the device |
| 652 | * does not have dev->dma_mask appropriately setup. |
| 653 | */ |
| 654 | static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask) |
| 655 | { |
| 656 | dev->dma_mask = &dev->coherent_dma_mask; |
| 657 | return dma_set_mask_and_coherent(dev, mask); |
| 658 | } |
| 659 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 660 | extern u64 dma_get_required_mask(struct device *dev); |
| 661 | |
Will Deacon | a3a60f8 | 2014-08-27 15:49:10 +0100 | [diff] [blame] | 662 | #ifndef arch_setup_dma_ops |
Will Deacon | 97890ba | 2014-08-27 16:24:20 +0100 | [diff] [blame] | 663 | static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base, |
Robin Murphy | 53c92d7 | 2016-04-07 18:42:05 +0100 | [diff] [blame] | 664 | u64 size, const struct iommu_ops *iommu, |
Will Deacon | 97890ba | 2014-08-27 16:24:20 +0100 | [diff] [blame] | 665 | bool coherent) { } |
| 666 | #endif |
| 667 | |
| 668 | #ifndef arch_teardown_dma_ops |
Christoph Hellwig | 1a0afc1 | 2018-09-25 13:16:55 -0700 | [diff] [blame] | 669 | static inline void arch_teardown_dma_ops(struct device *dev) { } |
Santosh Shilimkar | 591c1ee | 2014-04-24 11:30:04 -0400 | [diff] [blame] | 670 | #endif |
| 671 | |
FUJITA Tomonori | 6b7b651 | 2008-02-04 22:27:55 -0800 | [diff] [blame] | 672 | static inline unsigned int dma_get_max_seg_size(struct device *dev) |
| 673 | { |
Robin Murphy | 002edb6 | 2015-11-06 16:32:51 -0800 | [diff] [blame] | 674 | if (dev->dma_parms && dev->dma_parms->max_segment_size) |
| 675 | return dev->dma_parms->max_segment_size; |
| 676 | return SZ_64K; |
FUJITA Tomonori | 6b7b651 | 2008-02-04 22:27:55 -0800 | [diff] [blame] | 677 | } |
| 678 | |
| 679 | static inline unsigned int dma_set_max_seg_size(struct device *dev, |
| 680 | unsigned int size) |
| 681 | { |
| 682 | if (dev->dma_parms) { |
| 683 | dev->dma_parms->max_segment_size = size; |
| 684 | return 0; |
Robin Murphy | 002edb6 | 2015-11-06 16:32:51 -0800 | [diff] [blame] | 685 | } |
| 686 | return -EIO; |
FUJITA Tomonori | 6b7b651 | 2008-02-04 22:27:55 -0800 | [diff] [blame] | 687 | } |
| 688 | |
FUJITA Tomonori | d22a696 | 2008-02-04 22:28:13 -0800 | [diff] [blame] | 689 | static inline unsigned long dma_get_seg_boundary(struct device *dev) |
| 690 | { |
Robin Murphy | 002edb6 | 2015-11-06 16:32:51 -0800 | [diff] [blame] | 691 | if (dev->dma_parms && dev->dma_parms->segment_boundary_mask) |
| 692 | return dev->dma_parms->segment_boundary_mask; |
| 693 | return DMA_BIT_MASK(32); |
FUJITA Tomonori | d22a696 | 2008-02-04 22:28:13 -0800 | [diff] [blame] | 694 | } |
| 695 | |
| 696 | static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask) |
| 697 | { |
| 698 | if (dev->dma_parms) { |
| 699 | dev->dma_parms->segment_boundary_mask = mask; |
| 700 | return 0; |
Robin Murphy | 002edb6 | 2015-11-06 16:32:51 -0800 | [diff] [blame] | 701 | } |
| 702 | return -EIO; |
FUJITA Tomonori | d22a696 | 2008-02-04 22:28:13 -0800 | [diff] [blame] | 703 | } |
| 704 | |
Santosh Shilimkar | 00c8f16 | 2013-07-29 14:18:48 +0100 | [diff] [blame] | 705 | #ifndef dma_max_pfn |
| 706 | static inline unsigned long dma_max_pfn(struct device *dev) |
| 707 | { |
Christoph Hellwig | a41ef1e | 2017-11-30 07:32:51 -0800 | [diff] [blame] | 708 | return (*dev->dma_mask >> PAGE_SHIFT) + dev->dma_pfn_offset; |
Santosh Shilimkar | 00c8f16 | 2013-07-29 14:18:48 +0100 | [diff] [blame] | 709 | } |
| 710 | #endif |
| 711 | |
Andrew Morton | 842fa69 | 2011-11-02 13:39:33 -0700 | [diff] [blame] | 712 | static inline void *dma_zalloc_coherent(struct device *dev, size_t size, |
| 713 | dma_addr_t *dma_handle, gfp_t flag) |
| 714 | { |
Joe Perches | ede23fa8 | 2013-08-26 22:45:23 -0700 | [diff] [blame] | 715 | void *ret = dma_alloc_coherent(dev, size, dma_handle, |
| 716 | flag | __GFP_ZERO); |
Andrew Morton | 842fa69 | 2011-11-02 13:39:33 -0700 | [diff] [blame] | 717 | return ret; |
| 718 | } |
| 719 | |
FUJITA Tomonori | 4565f01 | 2010-08-10 18:03:22 -0700 | [diff] [blame] | 720 | static inline int dma_get_cache_alignment(void) |
| 721 | { |
| 722 | #ifdef ARCH_DMA_MINALIGN |
| 723 | return ARCH_DMA_MINALIGN; |
| 724 | #endif |
| 725 | return 1; |
| 726 | } |
| 727 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 728 | /* flags for the coherent memory api */ |
Christoph Hellwig | 2436bdc | 2017-08-25 17:13:09 +0200 | [diff] [blame] | 729 | #define DMA_MEMORY_EXCLUSIVE 0x01 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 730 | |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 731 | #ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT |
| 732 | int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr, |
| 733 | dma_addr_t device_addr, size_t size, int flags); |
| 734 | void dma_release_declared_memory(struct device *dev); |
| 735 | void *dma_mark_declared_memory_occupied(struct device *dev, |
| 736 | dma_addr_t device_addr, size_t size); |
| 737 | #else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 738 | static inline int |
Bjorn Helgaas | 88a984b | 2014-05-20 16:54:22 -0600 | [diff] [blame] | 739 | dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 740 | dma_addr_t device_addr, size_t size, int flags) |
| 741 | { |
Christoph Hellwig | 2436bdc | 2017-08-25 17:13:09 +0200 | [diff] [blame] | 742 | return -ENOSYS; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 743 | } |
| 744 | |
| 745 | static inline void |
| 746 | dma_release_declared_memory(struct device *dev) |
| 747 | { |
| 748 | } |
| 749 | |
| 750 | static inline void * |
| 751 | dma_mark_declared_memory_occupied(struct device *dev, |
| 752 | dma_addr_t device_addr, size_t size) |
| 753 | { |
| 754 | return ERR_PTR(-EBUSY); |
| 755 | } |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 756 | #endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 757 | |
Tejun Heo | 9ac7849 | 2007-01-20 16:00:26 +0900 | [diff] [blame] | 758 | /* |
| 759 | * Managed DMA API |
| 760 | */ |
Geert Uytterhoeven | ab642e9 | 2018-03-16 14:25:41 +0100 | [diff] [blame] | 761 | #ifdef CONFIG_HAS_DMA |
Tejun Heo | 9ac7849 | 2007-01-20 16:00:26 +0900 | [diff] [blame] | 762 | extern void *dmam_alloc_coherent(struct device *dev, size_t size, |
| 763 | dma_addr_t *dma_handle, gfp_t gfp); |
| 764 | extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr, |
| 765 | dma_addr_t dma_handle); |
Geert Uytterhoeven | ab642e9 | 2018-03-16 14:25:41 +0100 | [diff] [blame] | 766 | #else /* !CONFIG_HAS_DMA */ |
| 767 | static inline void *dmam_alloc_coherent(struct device *dev, size_t size, |
| 768 | dma_addr_t *dma_handle, gfp_t gfp) |
| 769 | { return NULL; } |
| 770 | static inline void dmam_free_coherent(struct device *dev, size_t size, |
| 771 | void *vaddr, dma_addr_t dma_handle) { } |
| 772 | #endif /* !CONFIG_HAS_DMA */ |
| 773 | |
Christoph Hellwig | 63d36c9 | 2017-06-12 19:15:04 +0200 | [diff] [blame] | 774 | extern void *dmam_alloc_attrs(struct device *dev, size_t size, |
| 775 | dma_addr_t *dma_handle, gfp_t gfp, |
| 776 | unsigned long attrs); |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 777 | #ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT |
Bjorn Helgaas | 88a984b | 2014-05-20 16:54:22 -0600 | [diff] [blame] | 778 | extern int dmam_declare_coherent_memory(struct device *dev, |
| 779 | phys_addr_t phys_addr, |
Tejun Heo | 9ac7849 | 2007-01-20 16:00:26 +0900 | [diff] [blame] | 780 | dma_addr_t device_addr, size_t size, |
| 781 | int flags); |
| 782 | extern void dmam_release_declared_memory(struct device *dev); |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 783 | #else /* CONFIG_HAVE_GENERIC_DMA_COHERENT */ |
Tejun Heo | 9ac7849 | 2007-01-20 16:00:26 +0900 | [diff] [blame] | 784 | static inline int dmam_declare_coherent_memory(struct device *dev, |
Bjorn Helgaas | 88a984b | 2014-05-20 16:54:22 -0600 | [diff] [blame] | 785 | phys_addr_t phys_addr, dma_addr_t device_addr, |
Tejun Heo | 9ac7849 | 2007-01-20 16:00:26 +0900 | [diff] [blame] | 786 | size_t size, gfp_t gfp) |
| 787 | { |
| 788 | return 0; |
| 789 | } |
| 790 | |
| 791 | static inline void dmam_release_declared_memory(struct device *dev) |
| 792 | { |
| 793 | } |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 794 | #endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */ |
Tejun Heo | 9ac7849 | 2007-01-20 16:00:26 +0900 | [diff] [blame] | 795 | |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 796 | static inline void *dma_alloc_wc(struct device *dev, size_t size, |
| 797 | dma_addr_t *dma_addr, gfp_t gfp) |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 798 | { |
Christoph Hellwig | 0cd60eb | 2018-12-22 09:21:08 +0100 | [diff] [blame^] | 799 | unsigned long attrs = DMA_ATTR_WRITE_COMBINE; |
Christoph Hellwig | 7ed1d91 | 2018-09-24 13:06:58 +0200 | [diff] [blame] | 800 | |
| 801 | if (gfp & __GFP_NOWARN) |
| 802 | attrs |= DMA_ATTR_NO_WARN; |
| 803 | |
| 804 | return dma_alloc_attrs(dev, size, dma_addr, gfp, attrs); |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 805 | } |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 806 | #ifndef dma_alloc_writecombine |
| 807 | #define dma_alloc_writecombine dma_alloc_wc |
| 808 | #endif |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 809 | |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 810 | static inline void dma_free_wc(struct device *dev, size_t size, |
| 811 | void *cpu_addr, dma_addr_t dma_addr) |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 812 | { |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 813 | return dma_free_attrs(dev, size, cpu_addr, dma_addr, |
| 814 | DMA_ATTR_WRITE_COMBINE); |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 815 | } |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 816 | #ifndef dma_free_writecombine |
| 817 | #define dma_free_writecombine dma_free_wc |
| 818 | #endif |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 819 | |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 820 | static inline int dma_mmap_wc(struct device *dev, |
| 821 | struct vm_area_struct *vma, |
| 822 | void *cpu_addr, dma_addr_t dma_addr, |
| 823 | size_t size) |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 824 | { |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 825 | return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, |
| 826 | DMA_ATTR_WRITE_COMBINE); |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 827 | } |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 828 | #ifndef dma_mmap_writecombine |
| 829 | #define dma_mmap_writecombine dma_mmap_wc |
| 830 | #endif |
Arthur Kepner | 74bc7ce | 2008-04-29 01:00:30 -0700 | [diff] [blame] | 831 | |
Christoph Hellwig | f616ab5 | 2018-05-09 06:53:49 +0200 | [diff] [blame] | 832 | #ifdef CONFIG_NEED_DMA_MAP_STATE |
FUJITA Tomonori | 0acedc1 | 2010-03-10 15:23:31 -0800 | [diff] [blame] | 833 | #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME |
| 834 | #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME |
| 835 | #define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) |
| 836 | #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) |
| 837 | #define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) |
| 838 | #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) |
| 839 | #else |
| 840 | #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) |
| 841 | #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) |
| 842 | #define dma_unmap_addr(PTR, ADDR_NAME) (0) |
| 843 | #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) |
| 844 | #define dma_unmap_len(PTR, LEN_NAME) (0) |
| 845 | #define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) |
| 846 | #endif |
| 847 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 848 | #endif |