Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 1 | #if !defined(_I915_TRACE_H_) || defined(TRACE_HEADER_MULTI_READ) |
| 2 | #define _I915_TRACE_H_ |
| 3 | |
| 4 | #include <linux/stringify.h> |
| 5 | #include <linux/types.h> |
| 6 | #include <linux/tracepoint.h> |
| 7 | |
| 8 | #include <drm/drmP.h> |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 9 | #include "i915_drv.h" |
Ville Syrjälä | 25ef284 | 2014-04-29 13:35:48 +0300 | [diff] [blame] | 10 | #include "intel_drv.h" |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 11 | #include "intel_ringbuffer.h" |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 12 | |
| 13 | #undef TRACE_SYSTEM |
| 14 | #define TRACE_SYSTEM i915 |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 15 | #define TRACE_INCLUDE_FILE i915_trace |
| 16 | |
Ville Syrjälä | c137d66 | 2017-03-02 19:15:06 +0200 | [diff] [blame^] | 17 | /* watermark/fifo updates */ |
| 18 | |
| 19 | TRACE_EVENT(vlv_wm, |
| 20 | TP_PROTO(struct intel_crtc *crtc, const struct vlv_wm_values *wm), |
| 21 | TP_ARGS(crtc, wm), |
| 22 | |
| 23 | TP_STRUCT__entry( |
| 24 | __field(enum pipe, pipe) |
| 25 | __field(u32, frame) |
| 26 | __field(u32, scanline) |
| 27 | __field(u32, level) |
| 28 | __field(u32, cxsr) |
| 29 | __field(u32, primary) |
| 30 | __field(u32, sprite0) |
| 31 | __field(u32, sprite1) |
| 32 | __field(u32, cursor) |
| 33 | __field(u32, sr_plane) |
| 34 | __field(u32, sr_cursor) |
| 35 | ), |
| 36 | |
| 37 | TP_fast_assign( |
| 38 | __entry->pipe = crtc->pipe; |
| 39 | __entry->frame = crtc->base.dev->driver->get_vblank_counter(crtc->base.dev, |
| 40 | crtc->pipe); |
| 41 | __entry->scanline = intel_get_crtc_scanline(crtc); |
| 42 | __entry->level = wm->level; |
| 43 | __entry->cxsr = wm->cxsr; |
| 44 | __entry->primary = wm->pipe[crtc->pipe].plane[PLANE_PRIMARY]; |
| 45 | __entry->sprite0 = wm->pipe[crtc->pipe].plane[PLANE_SPRITE0]; |
| 46 | __entry->sprite1 = wm->pipe[crtc->pipe].plane[PLANE_SPRITE1]; |
| 47 | __entry->cursor = wm->pipe[crtc->pipe].plane[PLANE_CURSOR]; |
| 48 | __entry->sr_plane = wm->sr.plane; |
| 49 | __entry->sr_cursor = wm->sr.cursor; |
| 50 | ), |
| 51 | |
| 52 | TP_printk("pipe %c, frame=%u, scanline=%u, level=%d, cxsr=%d, wm %d/%d/%d/%d, sr %d/%d", |
| 53 | pipe_name(__entry->pipe), __entry->frame, |
| 54 | __entry->scanline, __entry->level, __entry->cxsr, |
| 55 | __entry->primary, __entry->sprite0, __entry->sprite1, __entry->cursor, |
| 56 | __entry->sr_plane, __entry->sr_cursor) |
| 57 | ); |
| 58 | |
| 59 | TRACE_EVENT(vlv_fifo_size, |
| 60 | TP_PROTO(struct intel_crtc *crtc, u32 sprite0_start, u32 sprite1_start, u32 fifo_size), |
| 61 | TP_ARGS(crtc, sprite0_start, sprite1_start, fifo_size), |
| 62 | |
| 63 | TP_STRUCT__entry( |
| 64 | __field(enum pipe, pipe) |
| 65 | __field(u32, frame) |
| 66 | __field(u32, scanline) |
| 67 | __field(u32, sprite0_start) |
| 68 | __field(u32, sprite1_start) |
| 69 | __field(u32, fifo_size) |
| 70 | ), |
| 71 | |
| 72 | TP_fast_assign( |
| 73 | __entry->pipe = crtc->pipe; |
| 74 | __entry->frame = crtc->base.dev->driver->get_vblank_counter(crtc->base.dev, |
| 75 | crtc->pipe); |
| 76 | __entry->scanline = intel_get_crtc_scanline(crtc); |
| 77 | __entry->sprite0_start = sprite0_start; |
| 78 | __entry->sprite1_start = sprite1_start; |
| 79 | __entry->fifo_size = fifo_size; |
| 80 | ), |
| 81 | |
| 82 | TP_printk("pipe %c, frame=%u, scanline=%u, %d/%d/%d", |
| 83 | pipe_name(__entry->pipe), __entry->frame, |
| 84 | __entry->scanline, __entry->sprite0_start, |
| 85 | __entry->sprite1_start, __entry->fifo_size) |
| 86 | ); |
| 87 | |
Ville Syrjälä | 7225953 | 2017-03-02 19:15:05 +0200 | [diff] [blame] | 88 | /* plane updates */ |
| 89 | |
| 90 | TRACE_EVENT(intel_update_plane, |
| 91 | TP_PROTO(struct drm_plane *plane, struct intel_crtc *crtc), |
| 92 | TP_ARGS(plane, crtc), |
| 93 | |
| 94 | TP_STRUCT__entry( |
| 95 | __field(enum pipe, pipe) |
| 96 | __field(const char *, name) |
| 97 | __field(u32, frame) |
| 98 | __field(u32, scanline) |
| 99 | __array(int, src, 4) |
| 100 | __array(int, dst, 4) |
| 101 | ), |
| 102 | |
| 103 | TP_fast_assign( |
| 104 | __entry->pipe = crtc->pipe; |
| 105 | __entry->name = plane->name; |
| 106 | __entry->frame = crtc->base.dev->driver->get_vblank_counter(crtc->base.dev, |
| 107 | crtc->pipe); |
| 108 | __entry->scanline = intel_get_crtc_scanline(crtc); |
| 109 | memcpy(__entry->src, &plane->state->src, sizeof(__entry->src)); |
| 110 | memcpy(__entry->dst, &plane->state->dst, sizeof(__entry->dst)); |
| 111 | ), |
| 112 | |
| 113 | TP_printk("pipe %c, plane %s, frame=%u, scanline=%u, " DRM_RECT_FP_FMT " -> " DRM_RECT_FMT, |
| 114 | pipe_name(__entry->pipe), __entry->name, |
| 115 | __entry->frame, __entry->scanline, |
| 116 | DRM_RECT_FP_ARG((const struct drm_rect *)__entry->src), |
| 117 | DRM_RECT_ARG((const struct drm_rect *)__entry->dst)) |
| 118 | ); |
| 119 | |
| 120 | TRACE_EVENT(intel_disable_plane, |
| 121 | TP_PROTO(struct drm_plane *plane, struct intel_crtc *crtc), |
| 122 | TP_ARGS(plane, crtc), |
| 123 | |
| 124 | TP_STRUCT__entry( |
| 125 | __field(enum pipe, pipe) |
| 126 | __field(const char *, name) |
| 127 | __field(u32, frame) |
| 128 | __field(u32, scanline) |
| 129 | ), |
| 130 | |
| 131 | TP_fast_assign( |
| 132 | __entry->pipe = crtc->pipe; |
| 133 | __entry->name = plane->name; |
| 134 | __entry->frame = crtc->base.dev->driver->get_vblank_counter(crtc->base.dev, |
| 135 | crtc->pipe); |
| 136 | __entry->scanline = intel_get_crtc_scanline(crtc); |
| 137 | ), |
| 138 | |
| 139 | TP_printk("pipe %c, plane %s, frame=%u, scanline=%u", |
| 140 | pipe_name(__entry->pipe), __entry->name, |
| 141 | __entry->frame, __entry->scanline) |
| 142 | ); |
| 143 | |
Ville Syrjälä | 25ef284 | 2014-04-29 13:35:48 +0300 | [diff] [blame] | 144 | /* pipe updates */ |
| 145 | |
| 146 | TRACE_EVENT(i915_pipe_update_start, |
Jesse Barnes | d637ce3 | 2015-09-17 08:08:32 -0700 | [diff] [blame] | 147 | TP_PROTO(struct intel_crtc *crtc), |
| 148 | TP_ARGS(crtc), |
Ville Syrjälä | 25ef284 | 2014-04-29 13:35:48 +0300 | [diff] [blame] | 149 | |
| 150 | TP_STRUCT__entry( |
| 151 | __field(enum pipe, pipe) |
| 152 | __field(u32, frame) |
| 153 | __field(u32, scanline) |
| 154 | __field(u32, min) |
| 155 | __field(u32, max) |
| 156 | ), |
| 157 | |
| 158 | TP_fast_assign( |
| 159 | __entry->pipe = crtc->pipe; |
| 160 | __entry->frame = crtc->base.dev->driver->get_vblank_counter(crtc->base.dev, |
| 161 | crtc->pipe); |
| 162 | __entry->scanline = intel_get_crtc_scanline(crtc); |
Jesse Barnes | d637ce3 | 2015-09-17 08:08:32 -0700 | [diff] [blame] | 163 | __entry->min = crtc->debug.min_vbl; |
| 164 | __entry->max = crtc->debug.max_vbl; |
Ville Syrjälä | 25ef284 | 2014-04-29 13:35:48 +0300 | [diff] [blame] | 165 | ), |
| 166 | |
| 167 | TP_printk("pipe %c, frame=%u, scanline=%u, min=%u, max=%u", |
| 168 | pipe_name(__entry->pipe), __entry->frame, |
| 169 | __entry->scanline, __entry->min, __entry->max) |
| 170 | ); |
| 171 | |
| 172 | TRACE_EVENT(i915_pipe_update_vblank_evaded, |
Jesse Barnes | d637ce3 | 2015-09-17 08:08:32 -0700 | [diff] [blame] | 173 | TP_PROTO(struct intel_crtc *crtc), |
| 174 | TP_ARGS(crtc), |
Ville Syrjälä | 25ef284 | 2014-04-29 13:35:48 +0300 | [diff] [blame] | 175 | |
| 176 | TP_STRUCT__entry( |
| 177 | __field(enum pipe, pipe) |
| 178 | __field(u32, frame) |
| 179 | __field(u32, scanline) |
| 180 | __field(u32, min) |
| 181 | __field(u32, max) |
| 182 | ), |
| 183 | |
| 184 | TP_fast_assign( |
| 185 | __entry->pipe = crtc->pipe; |
Jesse Barnes | d637ce3 | 2015-09-17 08:08:32 -0700 | [diff] [blame] | 186 | __entry->frame = crtc->debug.start_vbl_count; |
| 187 | __entry->scanline = crtc->debug.scanline_start; |
| 188 | __entry->min = crtc->debug.min_vbl; |
| 189 | __entry->max = crtc->debug.max_vbl; |
Ville Syrjälä | 25ef284 | 2014-04-29 13:35:48 +0300 | [diff] [blame] | 190 | ), |
| 191 | |
| 192 | TP_printk("pipe %c, frame=%u, scanline=%u, min=%u, max=%u", |
| 193 | pipe_name(__entry->pipe), __entry->frame, |
| 194 | __entry->scanline, __entry->min, __entry->max) |
| 195 | ); |
| 196 | |
| 197 | TRACE_EVENT(i915_pipe_update_end, |
Jesse Barnes | d637ce3 | 2015-09-17 08:08:32 -0700 | [diff] [blame] | 198 | TP_PROTO(struct intel_crtc *crtc, u32 frame, int scanline_end), |
| 199 | TP_ARGS(crtc, frame, scanline_end), |
Ville Syrjälä | 25ef284 | 2014-04-29 13:35:48 +0300 | [diff] [blame] | 200 | |
| 201 | TP_STRUCT__entry( |
| 202 | __field(enum pipe, pipe) |
| 203 | __field(u32, frame) |
| 204 | __field(u32, scanline) |
| 205 | ), |
| 206 | |
| 207 | TP_fast_assign( |
| 208 | __entry->pipe = crtc->pipe; |
| 209 | __entry->frame = frame; |
Jesse Barnes | d637ce3 | 2015-09-17 08:08:32 -0700 | [diff] [blame] | 210 | __entry->scanline = scanline_end; |
Ville Syrjälä | 25ef284 | 2014-04-29 13:35:48 +0300 | [diff] [blame] | 211 | ), |
| 212 | |
| 213 | TP_printk("pipe %c, frame=%u, scanline=%u", |
| 214 | pipe_name(__entry->pipe), __entry->frame, |
| 215 | __entry->scanline) |
| 216 | ); |
| 217 | |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 218 | /* object tracking */ |
| 219 | |
| 220 | TRACE_EVENT(i915_gem_object_create, |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 221 | TP_PROTO(struct drm_i915_gem_object *obj), |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 222 | TP_ARGS(obj), |
| 223 | |
| 224 | TP_STRUCT__entry( |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 225 | __field(struct drm_i915_gem_object *, obj) |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 226 | __field(u32, size) |
| 227 | ), |
| 228 | |
| 229 | TP_fast_assign( |
| 230 | __entry->obj = obj; |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 231 | __entry->size = obj->base.size; |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 232 | ), |
| 233 | |
| 234 | TP_printk("obj=%p, size=%u", __entry->obj, __entry->size) |
| 235 | ); |
| 236 | |
Chris Wilson | 3abafa5 | 2015-10-01 12:18:26 +0100 | [diff] [blame] | 237 | TRACE_EVENT(i915_gem_shrink, |
| 238 | TP_PROTO(struct drm_i915_private *i915, unsigned long target, unsigned flags), |
| 239 | TP_ARGS(i915, target, flags), |
| 240 | |
| 241 | TP_STRUCT__entry( |
| 242 | __field(int, dev) |
| 243 | __field(unsigned long, target) |
| 244 | __field(unsigned, flags) |
| 245 | ), |
| 246 | |
| 247 | TP_fast_assign( |
Chris Wilson | 91c8a32 | 2016-07-05 10:40:23 +0100 | [diff] [blame] | 248 | __entry->dev = i915->drm.primary->index; |
Chris Wilson | 3abafa5 | 2015-10-01 12:18:26 +0100 | [diff] [blame] | 249 | __entry->target = target; |
| 250 | __entry->flags = flags; |
| 251 | ), |
| 252 | |
| 253 | TP_printk("dev=%d, target=%lu, flags=%x", |
| 254 | __entry->dev, __entry->target, __entry->flags) |
| 255 | ); |
| 256 | |
Ben Widawsky | 07fe0b1 | 2013-07-31 17:00:10 -0700 | [diff] [blame] | 257 | TRACE_EVENT(i915_vma_bind, |
Daniel Vetter | 1ec9e26 | 2014-02-14 14:01:11 +0100 | [diff] [blame] | 258 | TP_PROTO(struct i915_vma *vma, unsigned flags), |
| 259 | TP_ARGS(vma, flags), |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 260 | |
| 261 | TP_STRUCT__entry( |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 262 | __field(struct drm_i915_gem_object *, obj) |
Ben Widawsky | 07fe0b1 | 2013-07-31 17:00:10 -0700 | [diff] [blame] | 263 | __field(struct i915_address_space *, vm) |
Ben Widawsky | 3393871 | 2015-01-22 17:01:23 +0000 | [diff] [blame] | 264 | __field(u64, offset) |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 265 | __field(u32, size) |
Daniel Vetter | 1ec9e26 | 2014-02-14 14:01:11 +0100 | [diff] [blame] | 266 | __field(unsigned, flags) |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 267 | ), |
| 268 | |
| 269 | TP_fast_assign( |
Ben Widawsky | 07fe0b1 | 2013-07-31 17:00:10 -0700 | [diff] [blame] | 270 | __entry->obj = vma->obj; |
| 271 | __entry->vm = vma->vm; |
| 272 | __entry->offset = vma->node.start; |
| 273 | __entry->size = vma->node.size; |
Daniel Vetter | 1ec9e26 | 2014-02-14 14:01:11 +0100 | [diff] [blame] | 274 | __entry->flags = flags; |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 275 | ), |
| 276 | |
Ben Widawsky | 3393871 | 2015-01-22 17:01:23 +0000 | [diff] [blame] | 277 | TP_printk("obj=%p, offset=%016llx size=%x%s vm=%p", |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 278 | __entry->obj, __entry->offset, __entry->size, |
Daniel Vetter | 1ec9e26 | 2014-02-14 14:01:11 +0100 | [diff] [blame] | 279 | __entry->flags & PIN_MAPPABLE ? ", mappable" : "", |
Ben Widawsky | 07fe0b1 | 2013-07-31 17:00:10 -0700 | [diff] [blame] | 280 | __entry->vm) |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 281 | ); |
| 282 | |
Ben Widawsky | 07fe0b1 | 2013-07-31 17:00:10 -0700 | [diff] [blame] | 283 | TRACE_EVENT(i915_vma_unbind, |
| 284 | TP_PROTO(struct i915_vma *vma), |
| 285 | TP_ARGS(vma), |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 286 | |
| 287 | TP_STRUCT__entry( |
| 288 | __field(struct drm_i915_gem_object *, obj) |
Ben Widawsky | 07fe0b1 | 2013-07-31 17:00:10 -0700 | [diff] [blame] | 289 | __field(struct i915_address_space *, vm) |
Ben Widawsky | 3393871 | 2015-01-22 17:01:23 +0000 | [diff] [blame] | 290 | __field(u64, offset) |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 291 | __field(u32, size) |
| 292 | ), |
| 293 | |
| 294 | TP_fast_assign( |
Ben Widawsky | 07fe0b1 | 2013-07-31 17:00:10 -0700 | [diff] [blame] | 295 | __entry->obj = vma->obj; |
| 296 | __entry->vm = vma->vm; |
| 297 | __entry->offset = vma->node.start; |
| 298 | __entry->size = vma->node.size; |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 299 | ), |
| 300 | |
Ben Widawsky | 3393871 | 2015-01-22 17:01:23 +0000 | [diff] [blame] | 301 | TP_printk("obj=%p, offset=%016llx size=%x vm=%p", |
Ben Widawsky | 07fe0b1 | 2013-07-31 17:00:10 -0700 | [diff] [blame] | 302 | __entry->obj, __entry->offset, __entry->size, __entry->vm) |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 303 | ); |
| 304 | |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 305 | TRACE_EVENT(i915_gem_object_pwrite, |
| 306 | TP_PROTO(struct drm_i915_gem_object *obj, u32 offset, u32 len), |
| 307 | TP_ARGS(obj, offset, len), |
| 308 | |
| 309 | TP_STRUCT__entry( |
| 310 | __field(struct drm_i915_gem_object *, obj) |
| 311 | __field(u32, offset) |
| 312 | __field(u32, len) |
| 313 | ), |
| 314 | |
| 315 | TP_fast_assign( |
| 316 | __entry->obj = obj; |
| 317 | __entry->offset = offset; |
| 318 | __entry->len = len; |
| 319 | ), |
| 320 | |
| 321 | TP_printk("obj=%p, offset=%u, len=%u", |
| 322 | __entry->obj, __entry->offset, __entry->len) |
| 323 | ); |
| 324 | |
| 325 | TRACE_EVENT(i915_gem_object_pread, |
| 326 | TP_PROTO(struct drm_i915_gem_object *obj, u32 offset, u32 len), |
| 327 | TP_ARGS(obj, offset, len), |
| 328 | |
| 329 | TP_STRUCT__entry( |
| 330 | __field(struct drm_i915_gem_object *, obj) |
| 331 | __field(u32, offset) |
| 332 | __field(u32, len) |
| 333 | ), |
| 334 | |
| 335 | TP_fast_assign( |
| 336 | __entry->obj = obj; |
| 337 | __entry->offset = offset; |
| 338 | __entry->len = len; |
| 339 | ), |
| 340 | |
| 341 | TP_printk("obj=%p, offset=%u, len=%u", |
| 342 | __entry->obj, __entry->offset, __entry->len) |
| 343 | ); |
| 344 | |
| 345 | TRACE_EVENT(i915_gem_object_fault, |
| 346 | TP_PROTO(struct drm_i915_gem_object *obj, u32 index, bool gtt, bool write), |
| 347 | TP_ARGS(obj, index, gtt, write), |
| 348 | |
| 349 | TP_STRUCT__entry( |
| 350 | __field(struct drm_i915_gem_object *, obj) |
| 351 | __field(u32, index) |
| 352 | __field(bool, gtt) |
| 353 | __field(bool, write) |
| 354 | ), |
| 355 | |
| 356 | TP_fast_assign( |
| 357 | __entry->obj = obj; |
| 358 | __entry->index = index; |
| 359 | __entry->gtt = gtt; |
| 360 | __entry->write = write; |
| 361 | ), |
| 362 | |
| 363 | TP_printk("obj=%p, %s index=%u %s", |
| 364 | __entry->obj, |
| 365 | __entry->gtt ? "GTT" : "CPU", |
| 366 | __entry->index, |
| 367 | __entry->write ? ", writable" : "") |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 368 | ); |
| 369 | |
Li Zefan | 903cf20 | 2010-03-11 16:41:45 +0800 | [diff] [blame] | 370 | DECLARE_EVENT_CLASS(i915_gem_object, |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 371 | TP_PROTO(struct drm_i915_gem_object *obj), |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 372 | TP_ARGS(obj), |
| 373 | |
| 374 | TP_STRUCT__entry( |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 375 | __field(struct drm_i915_gem_object *, obj) |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 376 | ), |
| 377 | |
| 378 | TP_fast_assign( |
| 379 | __entry->obj = obj; |
| 380 | ), |
| 381 | |
| 382 | TP_printk("obj=%p", __entry->obj) |
| 383 | ); |
| 384 | |
Li Zefan | f41275e | 2010-05-24 16:25:44 +0800 | [diff] [blame] | 385 | DEFINE_EVENT(i915_gem_object, i915_gem_object_clflush, |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 386 | TP_PROTO(struct drm_i915_gem_object *obj), |
| 387 | TP_ARGS(obj) |
Li Zefan | 903cf20 | 2010-03-11 16:41:45 +0800 | [diff] [blame] | 388 | ); |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 389 | |
Li Zefan | 903cf20 | 2010-03-11 16:41:45 +0800 | [diff] [blame] | 390 | DEFINE_EVENT(i915_gem_object, i915_gem_object_destroy, |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 391 | TP_PROTO(struct drm_i915_gem_object *obj), |
Li Zefan | 903cf20 | 2010-03-11 16:41:45 +0800 | [diff] [blame] | 392 | TP_ARGS(obj) |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 393 | ); |
| 394 | |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 395 | TRACE_EVENT(i915_gem_evict, |
Chris Wilson | e522ac2 | 2016-08-04 16:32:18 +0100 | [diff] [blame] | 396 | TP_PROTO(struct i915_address_space *vm, u32 size, u32 align, unsigned int flags), |
| 397 | TP_ARGS(vm, size, align, flags), |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 398 | |
| 399 | TP_STRUCT__entry( |
Chris Wilson | 4f49be5 | 2009-09-24 00:23:33 +0100 | [diff] [blame] | 400 | __field(u32, dev) |
Chris Wilson | e522ac2 | 2016-08-04 16:32:18 +0100 | [diff] [blame] | 401 | __field(struct i915_address_space *, vm) |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 402 | __field(u32, size) |
| 403 | __field(u32, align) |
Chris Wilson | e522ac2 | 2016-08-04 16:32:18 +0100 | [diff] [blame] | 404 | __field(unsigned int, flags) |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 405 | ), |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 406 | |
| 407 | TP_fast_assign( |
Chris Wilson | c6385c9 | 2016-11-29 12:42:05 +0000 | [diff] [blame] | 408 | __entry->dev = vm->i915->drm.primary->index; |
Chris Wilson | e522ac2 | 2016-08-04 16:32:18 +0100 | [diff] [blame] | 409 | __entry->vm = vm; |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 410 | __entry->size = size; |
| 411 | __entry->align = align; |
Daniel Vetter | 1ec9e26 | 2014-02-14 14:01:11 +0100 | [diff] [blame] | 412 | __entry->flags = flags; |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 413 | ), |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 414 | |
Chris Wilson | e522ac2 | 2016-08-04 16:32:18 +0100 | [diff] [blame] | 415 | TP_printk("dev=%d, vm=%p, size=%d, align=%d %s", |
| 416 | __entry->dev, __entry->vm, __entry->size, __entry->align, |
Daniel Vetter | 1ec9e26 | 2014-02-14 14:01:11 +0100 | [diff] [blame] | 417 | __entry->flags & PIN_MAPPABLE ? ", mappable" : "") |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 418 | ); |
| 419 | |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 420 | TRACE_EVENT(i915_gem_evict_everything, |
Chris Wilson | 6c085a7 | 2012-08-20 11:40:46 +0200 | [diff] [blame] | 421 | TP_PROTO(struct drm_device *dev), |
| 422 | TP_ARGS(dev), |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 423 | |
| 424 | TP_STRUCT__entry( |
Chris Wilson | 4f49be5 | 2009-09-24 00:23:33 +0100 | [diff] [blame] | 425 | __field(u32, dev) |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 426 | ), |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 427 | |
| 428 | TP_fast_assign( |
Chris Wilson | 4f49be5 | 2009-09-24 00:23:33 +0100 | [diff] [blame] | 429 | __entry->dev = dev->primary->index; |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 430 | ), |
| 431 | |
Chris Wilson | 6c085a7 | 2012-08-20 11:40:46 +0200 | [diff] [blame] | 432 | TP_printk("dev=%d", __entry->dev) |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 433 | ); |
| 434 | |
Ben Widawsky | bcccff8 | 2013-09-24 09:57:56 -0700 | [diff] [blame] | 435 | TRACE_EVENT(i915_gem_evict_vm, |
| 436 | TP_PROTO(struct i915_address_space *vm), |
| 437 | TP_ARGS(vm), |
| 438 | |
| 439 | TP_STRUCT__entry( |
Steven Rostedt | 9297ebf | 2014-03-18 11:27:37 -0400 | [diff] [blame] | 440 | __field(u32, dev) |
Ben Widawsky | bcccff8 | 2013-09-24 09:57:56 -0700 | [diff] [blame] | 441 | __field(struct i915_address_space *, vm) |
| 442 | ), |
| 443 | |
| 444 | TP_fast_assign( |
Chris Wilson | c6385c9 | 2016-11-29 12:42:05 +0000 | [diff] [blame] | 445 | __entry->dev = vm->i915->drm.primary->index; |
Ben Widawsky | bcccff8 | 2013-09-24 09:57:56 -0700 | [diff] [blame] | 446 | __entry->vm = vm; |
| 447 | ), |
| 448 | |
Steven Rostedt | 9297ebf | 2014-03-18 11:27:37 -0400 | [diff] [blame] | 449 | TP_printk("dev=%d, vm=%p", __entry->dev, __entry->vm) |
Ben Widawsky | bcccff8 | 2013-09-24 09:57:56 -0700 | [diff] [blame] | 450 | ); |
| 451 | |
Chris Wilson | 625d988 | 2017-01-11 11:23:11 +0000 | [diff] [blame] | 452 | TRACE_EVENT(i915_gem_evict_node, |
| 453 | TP_PROTO(struct i915_address_space *vm, struct drm_mm_node *node, unsigned int flags), |
| 454 | TP_ARGS(vm, node, flags), |
Chris Wilson | 172ae5b | 2016-12-05 14:29:37 +0000 | [diff] [blame] | 455 | |
| 456 | TP_STRUCT__entry( |
| 457 | __field(u32, dev) |
| 458 | __field(struct i915_address_space *, vm) |
| 459 | __field(u64, start) |
| 460 | __field(u64, size) |
| 461 | __field(unsigned long, color) |
| 462 | __field(unsigned int, flags) |
| 463 | ), |
| 464 | |
| 465 | TP_fast_assign( |
Chris Wilson | 625d988 | 2017-01-11 11:23:11 +0000 | [diff] [blame] | 466 | __entry->dev = vm->i915->drm.primary->index; |
| 467 | __entry->vm = vm; |
| 468 | __entry->start = node->start; |
| 469 | __entry->size = node->size; |
| 470 | __entry->color = node->color; |
Chris Wilson | 172ae5b | 2016-12-05 14:29:37 +0000 | [diff] [blame] | 471 | __entry->flags = flags; |
| 472 | ), |
| 473 | |
| 474 | TP_printk("dev=%d, vm=%p, start=%llx size=%llx, color=%lx, flags=%x", |
| 475 | __entry->dev, __entry->vm, |
| 476 | __entry->start, __entry->size, |
| 477 | __entry->color, __entry->flags) |
| 478 | ); |
| 479 | |
Chris Wilson | b52b89d | 2013-09-25 11:43:28 +0100 | [diff] [blame] | 480 | TRACE_EVENT(i915_gem_ring_sync_to, |
Chris Wilson | 8e63717 | 2016-08-02 22:50:26 +0100 | [diff] [blame] | 481 | TP_PROTO(struct drm_i915_gem_request *to, |
| 482 | struct drm_i915_gem_request *from), |
| 483 | TP_ARGS(to, from), |
Chris Wilson | b52b89d | 2013-09-25 11:43:28 +0100 | [diff] [blame] | 484 | |
| 485 | TP_STRUCT__entry( |
| 486 | __field(u32, dev) |
| 487 | __field(u32, sync_from) |
| 488 | __field(u32, sync_to) |
| 489 | __field(u32, seqno) |
| 490 | ), |
| 491 | |
| 492 | TP_fast_assign( |
Chris Wilson | 91c8a32 | 2016-07-05 10:40:23 +0100 | [diff] [blame] | 493 | __entry->dev = from->i915->drm.primary->index; |
Chris Wilson | 8e63717 | 2016-08-02 22:50:26 +0100 | [diff] [blame] | 494 | __entry->sync_from = from->engine->id; |
| 495 | __entry->sync_to = to->engine->id; |
Chris Wilson | 65e4760 | 2016-10-28 13:58:49 +0100 | [diff] [blame] | 496 | __entry->seqno = from->global_seqno; |
Chris Wilson | b52b89d | 2013-09-25 11:43:28 +0100 | [diff] [blame] | 497 | ), |
| 498 | |
| 499 | TP_printk("dev=%u, sync-from=%u, sync-to=%u, seqno=%u", |
| 500 | __entry->dev, |
| 501 | __entry->sync_from, __entry->sync_to, |
| 502 | __entry->seqno) |
| 503 | ); |
| 504 | |
Tvrtko Ursulin | 1cce892 | 2017-02-21 09:13:44 +0000 | [diff] [blame] | 505 | TRACE_EVENT(i915_gem_request_queue, |
John Harrison | 74328ee | 2014-11-24 18:49:38 +0000 | [diff] [blame] | 506 | TP_PROTO(struct drm_i915_gem_request *req, u32 flags), |
| 507 | TP_ARGS(req, flags), |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 508 | |
| 509 | TP_STRUCT__entry( |
| 510 | __field(u32, dev) |
| 511 | __field(u32, ring) |
Tvrtko Ursulin | 1cce892 | 2017-02-21 09:13:44 +0000 | [diff] [blame] | 512 | __field(u32, ctx) |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 513 | __field(u32, seqno) |
Chris Wilson | d7d4eed | 2012-10-17 12:09:54 +0100 | [diff] [blame] | 514 | __field(u32, flags) |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 515 | ), |
| 516 | |
| 517 | TP_fast_assign( |
Chris Wilson | 91c8a32 | 2016-07-05 10:40:23 +0100 | [diff] [blame] | 518 | __entry->dev = req->i915->drm.primary->index; |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 519 | __entry->ring = req->engine->id; |
Tvrtko Ursulin | 1cce892 | 2017-02-21 09:13:44 +0000 | [diff] [blame] | 520 | __entry->ctx = req->ctx->hw_id; |
| 521 | __entry->seqno = req->fence.seqno; |
Chris Wilson | d7d4eed | 2012-10-17 12:09:54 +0100 | [diff] [blame] | 522 | __entry->flags = flags; |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 523 | ), |
| 524 | |
Tvrtko Ursulin | 1cce892 | 2017-02-21 09:13:44 +0000 | [diff] [blame] | 525 | TP_printk("dev=%u, ring=%u, ctx=%u, seqno=%u, flags=0x%x", |
| 526 | __entry->dev, __entry->ring, __entry->ctx, __entry->seqno, |
| 527 | __entry->flags) |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 528 | ); |
| 529 | |
| 530 | TRACE_EVENT(i915_gem_ring_flush, |
John Harrison | a84c3ae | 2015-05-29 17:43:57 +0100 | [diff] [blame] | 531 | TP_PROTO(struct drm_i915_gem_request *req, u32 invalidate, u32 flush), |
| 532 | TP_ARGS(req, invalidate, flush), |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 533 | |
| 534 | TP_STRUCT__entry( |
| 535 | __field(u32, dev) |
| 536 | __field(u32, ring) |
| 537 | __field(u32, invalidate) |
| 538 | __field(u32, flush) |
| 539 | ), |
| 540 | |
| 541 | TP_fast_assign( |
Chris Wilson | 91c8a32 | 2016-07-05 10:40:23 +0100 | [diff] [blame] | 542 | __entry->dev = req->i915->drm.primary->index; |
Tvrtko Ursulin | 4a570db | 2016-03-16 11:00:38 +0000 | [diff] [blame] | 543 | __entry->ring = req->engine->id; |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 544 | __entry->invalidate = invalidate; |
| 545 | __entry->flush = flush; |
| 546 | ), |
| 547 | |
| 548 | TP_printk("dev=%u, ring=%x, invalidate=%04x, flush=%04x", |
| 549 | __entry->dev, __entry->ring, |
| 550 | __entry->invalidate, __entry->flush) |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 551 | ); |
| 552 | |
Li Zefan | 903cf20 | 2010-03-11 16:41:45 +0800 | [diff] [blame] | 553 | DECLARE_EVENT_CLASS(i915_gem_request, |
John Harrison | 74328ee | 2014-11-24 18:49:38 +0000 | [diff] [blame] | 554 | TP_PROTO(struct drm_i915_gem_request *req), |
| 555 | TP_ARGS(req), |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 556 | |
| 557 | TP_STRUCT__entry( |
Chris Wilson | 4f49be5 | 2009-09-24 00:23:33 +0100 | [diff] [blame] | 558 | __field(u32, dev) |
Tvrtko Ursulin | e235b53 | 2017-02-21 09:13:43 +0000 | [diff] [blame] | 559 | __field(u32, ctx) |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 560 | __field(u32, ring) |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 561 | __field(u32, seqno) |
Tvrtko Ursulin | e235b53 | 2017-02-21 09:13:43 +0000 | [diff] [blame] | 562 | __field(u32, global) |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 563 | ), |
| 564 | |
| 565 | TP_fast_assign( |
Chris Wilson | 91c8a32 | 2016-07-05 10:40:23 +0100 | [diff] [blame] | 566 | __entry->dev = req->i915->drm.primary->index; |
Tvrtko Ursulin | e235b53 | 2017-02-21 09:13:43 +0000 | [diff] [blame] | 567 | __entry->ctx = req->ctx->hw_id; |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 568 | __entry->ring = req->engine->id; |
Tvrtko Ursulin | e235b53 | 2017-02-21 09:13:43 +0000 | [diff] [blame] | 569 | __entry->seqno = req->fence.seqno; |
| 570 | __entry->global = req->global_seqno; |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 571 | ), |
| 572 | |
Tvrtko Ursulin | e235b53 | 2017-02-21 09:13:43 +0000 | [diff] [blame] | 573 | TP_printk("dev=%u, ring=%u, ctx=%u, seqno=%u, global=%u", |
| 574 | __entry->dev, __entry->ring, __entry->ctx, __entry->seqno, |
| 575 | __entry->global) |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 576 | ); |
| 577 | |
| 578 | DEFINE_EVENT(i915_gem_request, i915_gem_request_add, |
John Harrison | 74328ee | 2014-11-24 18:49:38 +0000 | [diff] [blame] | 579 | TP_PROTO(struct drm_i915_gem_request *req), |
| 580 | TP_ARGS(req) |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 581 | ); |
| 582 | |
Tvrtko Ursulin | 354d036 | 2017-02-21 11:01:42 +0000 | [diff] [blame] | 583 | #if defined(CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS) |
| 584 | DEFINE_EVENT(i915_gem_request, i915_gem_request_submit, |
| 585 | TP_PROTO(struct drm_i915_gem_request *req), |
| 586 | TP_ARGS(req) |
| 587 | ); |
| 588 | |
| 589 | DEFINE_EVENT(i915_gem_request, i915_gem_request_execute, |
| 590 | TP_PROTO(struct drm_i915_gem_request *req), |
| 591 | TP_ARGS(req) |
| 592 | ); |
Tvrtko Ursulin | d7d9683 | 2017-02-21 11:03:00 +0000 | [diff] [blame] | 593 | |
| 594 | DECLARE_EVENT_CLASS(i915_gem_request_hw, |
| 595 | TP_PROTO(struct drm_i915_gem_request *req, |
| 596 | unsigned int port), |
| 597 | TP_ARGS(req, port), |
| 598 | |
| 599 | TP_STRUCT__entry( |
| 600 | __field(u32, dev) |
| 601 | __field(u32, ring) |
| 602 | __field(u32, seqno) |
| 603 | __field(u32, global_seqno) |
| 604 | __field(u32, ctx) |
| 605 | __field(u32, port) |
| 606 | ), |
| 607 | |
| 608 | TP_fast_assign( |
| 609 | __entry->dev = req->i915->drm.primary->index; |
| 610 | __entry->ring = req->engine->id; |
| 611 | __entry->ctx = req->ctx->hw_id; |
| 612 | __entry->seqno = req->fence.seqno; |
| 613 | __entry->global_seqno = req->global_seqno; |
| 614 | __entry->port = port; |
| 615 | ), |
| 616 | |
| 617 | TP_printk("dev=%u, ring=%u, ctx=%u, seqno=%u, global=%u, port=%u", |
| 618 | __entry->dev, __entry->ring, __entry->ctx, |
| 619 | __entry->seqno, __entry->global_seqno, |
| 620 | __entry->port) |
| 621 | ); |
| 622 | |
| 623 | DEFINE_EVENT(i915_gem_request_hw, i915_gem_request_in, |
| 624 | TP_PROTO(struct drm_i915_gem_request *req, unsigned int port), |
| 625 | TP_ARGS(req, port) |
| 626 | ); |
| 627 | |
| 628 | DEFINE_EVENT(i915_gem_request, i915_gem_request_out, |
| 629 | TP_PROTO(struct drm_i915_gem_request *req), |
| 630 | TP_ARGS(req) |
| 631 | ); |
Tvrtko Ursulin | 354d036 | 2017-02-21 11:01:42 +0000 | [diff] [blame] | 632 | #else |
| 633 | #if !defined(TRACE_HEADER_MULTI_READ) |
| 634 | static inline void |
| 635 | trace_i915_gem_request_submit(struct drm_i915_gem_request *req) |
| 636 | { |
| 637 | } |
| 638 | |
| 639 | static inline void |
| 640 | trace_i915_gem_request_execute(struct drm_i915_gem_request *req) |
| 641 | { |
| 642 | } |
Tvrtko Ursulin | d7d9683 | 2017-02-21 11:03:00 +0000 | [diff] [blame] | 643 | |
| 644 | static inline void |
| 645 | trace_i915_gem_request_in(struct drm_i915_gem_request *req, unsigned int port) |
| 646 | { |
| 647 | } |
| 648 | |
| 649 | static inline void |
| 650 | trace_i915_gem_request_out(struct drm_i915_gem_request *req) |
| 651 | { |
| 652 | } |
Tvrtko Ursulin | 354d036 | 2017-02-21 11:01:42 +0000 | [diff] [blame] | 653 | #endif |
| 654 | #endif |
| 655 | |
Tvrtko Ursulin | dffabc8 | 2017-02-21 09:13:48 +0000 | [diff] [blame] | 656 | TRACE_EVENT(intel_engine_notify, |
| 657 | TP_PROTO(struct intel_engine_cs *engine, bool waiters), |
| 658 | TP_ARGS(engine, waiters), |
Chris Wilson | 814e9b5 | 2013-09-23 17:33:19 -0300 | [diff] [blame] | 659 | |
| 660 | TP_STRUCT__entry( |
| 661 | __field(u32, dev) |
| 662 | __field(u32, ring) |
| 663 | __field(u32, seqno) |
Tvrtko Ursulin | dffabc8 | 2017-02-21 09:13:48 +0000 | [diff] [blame] | 664 | __field(bool, waiters) |
Chris Wilson | 814e9b5 | 2013-09-23 17:33:19 -0300 | [diff] [blame] | 665 | ), |
| 666 | |
| 667 | TP_fast_assign( |
Chris Wilson | 91c8a32 | 2016-07-05 10:40:23 +0100 | [diff] [blame] | 668 | __entry->dev = engine->i915->drm.primary->index; |
Tvrtko Ursulin | 4a570db | 2016-03-16 11:00:38 +0000 | [diff] [blame] | 669 | __entry->ring = engine->id; |
Chris Wilson | 1b7744e | 2016-07-01 17:23:17 +0100 | [diff] [blame] | 670 | __entry->seqno = intel_engine_get_seqno(engine); |
Tvrtko Ursulin | dffabc8 | 2017-02-21 09:13:48 +0000 | [diff] [blame] | 671 | __entry->waiters = waiters; |
Chris Wilson | 814e9b5 | 2013-09-23 17:33:19 -0300 | [diff] [blame] | 672 | ), |
| 673 | |
Tvrtko Ursulin | dffabc8 | 2017-02-21 09:13:48 +0000 | [diff] [blame] | 674 | TP_printk("dev=%u, ring=%u, seqno=%u, waiters=%u", |
| 675 | __entry->dev, __entry->ring, __entry->seqno, |
| 676 | __entry->waiters) |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 677 | ); |
| 678 | |
Li Zefan | 903cf20 | 2010-03-11 16:41:45 +0800 | [diff] [blame] | 679 | DEFINE_EVENT(i915_gem_request, i915_gem_request_retire, |
John Harrison | 74328ee | 2014-11-24 18:49:38 +0000 | [diff] [blame] | 680 | TP_PROTO(struct drm_i915_gem_request *req), |
| 681 | TP_ARGS(req) |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 682 | ); |
| 683 | |
Ben Widawsky | f3fd376 | 2012-05-24 15:03:09 -0700 | [diff] [blame] | 684 | TRACE_EVENT(i915_gem_request_wait_begin, |
Tvrtko Ursulin | 93692502 | 2017-02-21 11:00:24 +0000 | [diff] [blame] | 685 | TP_PROTO(struct drm_i915_gem_request *req, unsigned int flags), |
| 686 | TP_ARGS(req, flags), |
Ben Widawsky | f3fd376 | 2012-05-24 15:03:09 -0700 | [diff] [blame] | 687 | |
| 688 | TP_STRUCT__entry( |
| 689 | __field(u32, dev) |
| 690 | __field(u32, ring) |
Tvrtko Ursulin | 93692502 | 2017-02-21 11:00:24 +0000 | [diff] [blame] | 691 | __field(u32, ctx) |
Ben Widawsky | f3fd376 | 2012-05-24 15:03:09 -0700 | [diff] [blame] | 692 | __field(u32, seqno) |
Tvrtko Ursulin | 93692502 | 2017-02-21 11:00:24 +0000 | [diff] [blame] | 693 | __field(u32, global) |
| 694 | __field(unsigned int, flags) |
Ben Widawsky | f3fd376 | 2012-05-24 15:03:09 -0700 | [diff] [blame] | 695 | ), |
| 696 | |
| 697 | /* NB: the blocking information is racy since mutex_is_locked |
| 698 | * doesn't check that the current thread holds the lock. The only |
| 699 | * other option would be to pass the boolean information of whether |
| 700 | * or not the class was blocking down through the stack which is |
| 701 | * less desirable. |
| 702 | */ |
| 703 | TP_fast_assign( |
Chris Wilson | 91c8a32 | 2016-07-05 10:40:23 +0100 | [diff] [blame] | 704 | __entry->dev = req->i915->drm.primary->index; |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 705 | __entry->ring = req->engine->id; |
Tvrtko Ursulin | 93692502 | 2017-02-21 11:00:24 +0000 | [diff] [blame] | 706 | __entry->ctx = req->ctx->hw_id; |
| 707 | __entry->seqno = req->fence.seqno; |
| 708 | __entry->global = req->global_seqno; |
| 709 | __entry->flags = flags; |
Ben Widawsky | f3fd376 | 2012-05-24 15:03:09 -0700 | [diff] [blame] | 710 | ), |
| 711 | |
Tvrtko Ursulin | 93692502 | 2017-02-21 11:00:24 +0000 | [diff] [blame] | 712 | TP_printk("dev=%u, ring=%u, ctx=%u, seqno=%u, global=%u, blocking=%u, flags=0x%x", |
| 713 | __entry->dev, __entry->ring, __entry->ctx, __entry->seqno, |
| 714 | __entry->global, !!(__entry->flags & I915_WAIT_LOCKED), |
| 715 | __entry->flags) |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 716 | ); |
| 717 | |
Li Zefan | 903cf20 | 2010-03-11 16:41:45 +0800 | [diff] [blame] | 718 | DEFINE_EVENT(i915_gem_request, i915_gem_request_wait_end, |
John Harrison | 74328ee | 2014-11-24 18:49:38 +0000 | [diff] [blame] | 719 | TP_PROTO(struct drm_i915_gem_request *req), |
| 720 | TP_ARGS(req) |
Li Zefan | 903cf20 | 2010-03-11 16:41:45 +0800 | [diff] [blame] | 721 | ); |
| 722 | |
Jesse Barnes | e5510fa | 2010-07-01 16:48:37 -0700 | [diff] [blame] | 723 | TRACE_EVENT(i915_flip_request, |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 724 | TP_PROTO(int plane, struct drm_i915_gem_object *obj), |
Jesse Barnes | e5510fa | 2010-07-01 16:48:37 -0700 | [diff] [blame] | 725 | |
| 726 | TP_ARGS(plane, obj), |
| 727 | |
| 728 | TP_STRUCT__entry( |
| 729 | __field(int, plane) |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 730 | __field(struct drm_i915_gem_object *, obj) |
Jesse Barnes | e5510fa | 2010-07-01 16:48:37 -0700 | [diff] [blame] | 731 | ), |
| 732 | |
| 733 | TP_fast_assign( |
| 734 | __entry->plane = plane; |
| 735 | __entry->obj = obj; |
| 736 | ), |
| 737 | |
| 738 | TP_printk("plane=%d, obj=%p", __entry->plane, __entry->obj) |
| 739 | ); |
| 740 | |
| 741 | TRACE_EVENT(i915_flip_complete, |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 742 | TP_PROTO(int plane, struct drm_i915_gem_object *obj), |
Jesse Barnes | e5510fa | 2010-07-01 16:48:37 -0700 | [diff] [blame] | 743 | |
| 744 | TP_ARGS(plane, obj), |
| 745 | |
| 746 | TP_STRUCT__entry( |
| 747 | __field(int, plane) |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 748 | __field(struct drm_i915_gem_object *, obj) |
Jesse Barnes | e5510fa | 2010-07-01 16:48:37 -0700 | [diff] [blame] | 749 | ), |
| 750 | |
| 751 | TP_fast_assign( |
| 752 | __entry->plane = plane; |
| 753 | __entry->obj = obj; |
| 754 | ), |
| 755 | |
| 756 | TP_printk("plane=%d, obj=%p", __entry->plane, __entry->obj) |
| 757 | ); |
| 758 | |
Chris Wilson | ed71f1b | 2013-07-19 20:36:56 +0100 | [diff] [blame] | 759 | TRACE_EVENT_CONDITION(i915_reg_rw, |
Ville Syrjälä | f0f59a0 | 2015-11-18 15:33:26 +0200 | [diff] [blame] | 760 | TP_PROTO(bool write, i915_reg_t reg, u64 val, int len, bool trace), |
Yuanhan Liu | ba4f01a | 2010-11-08 17:09:41 +0800 | [diff] [blame] | 761 | |
Chris Wilson | ed71f1b | 2013-07-19 20:36:56 +0100 | [diff] [blame] | 762 | TP_ARGS(write, reg, val, len, trace), |
| 763 | |
| 764 | TP_CONDITION(trace), |
Yuanhan Liu | ba4f01a | 2010-11-08 17:09:41 +0800 | [diff] [blame] | 765 | |
Akshay Joshi | 0206e35 | 2011-08-16 15:34:10 -0400 | [diff] [blame] | 766 | TP_STRUCT__entry( |
| 767 | __field(u64, val) |
| 768 | __field(u32, reg) |
| 769 | __field(u16, write) |
| 770 | __field(u16, len) |
| 771 | ), |
Yuanhan Liu | ba4f01a | 2010-11-08 17:09:41 +0800 | [diff] [blame] | 772 | |
Akshay Joshi | 0206e35 | 2011-08-16 15:34:10 -0400 | [diff] [blame] | 773 | TP_fast_assign( |
| 774 | __entry->val = (u64)val; |
Ville Syrjälä | f0f59a0 | 2015-11-18 15:33:26 +0200 | [diff] [blame] | 775 | __entry->reg = i915_mmio_reg_offset(reg); |
Akshay Joshi | 0206e35 | 2011-08-16 15:34:10 -0400 | [diff] [blame] | 776 | __entry->write = write; |
| 777 | __entry->len = len; |
| 778 | ), |
Yuanhan Liu | ba4f01a | 2010-11-08 17:09:41 +0800 | [diff] [blame] | 779 | |
Akshay Joshi | 0206e35 | 2011-08-16 15:34:10 -0400 | [diff] [blame] | 780 | TP_printk("%s reg=0x%x, len=%d, val=(0x%x, 0x%x)", |
| 781 | __entry->write ? "write" : "read", |
| 782 | __entry->reg, __entry->len, |
| 783 | (u32)(__entry->val & 0xffffffff), |
| 784 | (u32)(__entry->val >> 32)) |
Yuanhan Liu | ba4f01a | 2010-11-08 17:09:41 +0800 | [diff] [blame] | 785 | ); |
| 786 | |
Daniel Vetter | be2cde9 | 2012-08-30 13:26:48 +0200 | [diff] [blame] | 787 | TRACE_EVENT(intel_gpu_freq_change, |
| 788 | TP_PROTO(u32 freq), |
| 789 | TP_ARGS(freq), |
| 790 | |
| 791 | TP_STRUCT__entry( |
| 792 | __field(u32, freq) |
| 793 | ), |
| 794 | |
| 795 | TP_fast_assign( |
| 796 | __entry->freq = freq; |
| 797 | ), |
| 798 | |
| 799 | TP_printk("new_freq=%u", __entry->freq) |
| 800 | ); |
| 801 | |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 802 | /** |
| 803 | * DOC: i915_ppgtt_create and i915_ppgtt_release tracepoints |
| 804 | * |
| 805 | * With full ppgtt enabled each process using drm will allocate at least one |
| 806 | * translation table. With these traces it is possible to keep track of the |
| 807 | * allocation and of the lifetime of the tables; this can be used during |
| 808 | * testing/debug to verify that we are not leaking ppgtts. |
| 809 | * These traces identify the ppgtt through the vm pointer, which is also printed |
| 810 | * by the i915_vma_bind and i915_vma_unbind tracepoints. |
| 811 | */ |
| 812 | DECLARE_EVENT_CLASS(i915_ppgtt, |
| 813 | TP_PROTO(struct i915_address_space *vm), |
| 814 | TP_ARGS(vm), |
| 815 | |
| 816 | TP_STRUCT__entry( |
| 817 | __field(struct i915_address_space *, vm) |
| 818 | __field(u32, dev) |
| 819 | ), |
| 820 | |
| 821 | TP_fast_assign( |
| 822 | __entry->vm = vm; |
Chris Wilson | c6385c9 | 2016-11-29 12:42:05 +0000 | [diff] [blame] | 823 | __entry->dev = vm->i915->drm.primary->index; |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 824 | ), |
| 825 | |
| 826 | TP_printk("dev=%u, vm=%p", __entry->dev, __entry->vm) |
| 827 | ) |
| 828 | |
| 829 | DEFINE_EVENT(i915_ppgtt, i915_ppgtt_create, |
| 830 | TP_PROTO(struct i915_address_space *vm), |
| 831 | TP_ARGS(vm) |
| 832 | ); |
| 833 | |
| 834 | DEFINE_EVENT(i915_ppgtt, i915_ppgtt_release, |
| 835 | TP_PROTO(struct i915_address_space *vm), |
| 836 | TP_ARGS(vm) |
| 837 | ); |
| 838 | |
| 839 | /** |
| 840 | * DOC: i915_context_create and i915_context_free tracepoints |
| 841 | * |
| 842 | * These tracepoints are used to track creation and deletion of contexts. |
| 843 | * If full ppgtt is enabled, they also print the address of the vm assigned to |
| 844 | * the context. |
| 845 | */ |
| 846 | DECLARE_EVENT_CLASS(i915_context, |
Chris Wilson | e2efd13 | 2016-05-24 14:53:34 +0100 | [diff] [blame] | 847 | TP_PROTO(struct i915_gem_context *ctx), |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 848 | TP_ARGS(ctx), |
| 849 | |
| 850 | TP_STRUCT__entry( |
| 851 | __field(u32, dev) |
Chris Wilson | e2efd13 | 2016-05-24 14:53:34 +0100 | [diff] [blame] | 852 | __field(struct i915_gem_context *, ctx) |
Tvrtko Ursulin | 99c181a | 2017-02-21 09:13:50 +0000 | [diff] [blame] | 853 | __field(u32, hw_id) |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 854 | __field(struct i915_address_space *, vm) |
| 855 | ), |
| 856 | |
| 857 | TP_fast_assign( |
Chris Wilson | 91c8a32 | 2016-07-05 10:40:23 +0100 | [diff] [blame] | 858 | __entry->dev = ctx->i915->drm.primary->index; |
Tvrtko Ursulin | 99c181a | 2017-02-21 09:13:50 +0000 | [diff] [blame] | 859 | __entry->ctx = ctx; |
| 860 | __entry->hw_id = ctx->hw_id; |
| 861 | __entry->vm = ctx->ppgtt ? &ctx->ppgtt->base : NULL; |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 862 | ), |
| 863 | |
Tvrtko Ursulin | 99c181a | 2017-02-21 09:13:50 +0000 | [diff] [blame] | 864 | TP_printk("dev=%u, ctx=%p, ctx_vm=%p, hw_id=%u", |
| 865 | __entry->dev, __entry->ctx, __entry->vm, __entry->hw_id) |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 866 | ) |
| 867 | |
| 868 | DEFINE_EVENT(i915_context, i915_context_create, |
Chris Wilson | e2efd13 | 2016-05-24 14:53:34 +0100 | [diff] [blame] | 869 | TP_PROTO(struct i915_gem_context *ctx), |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 870 | TP_ARGS(ctx) |
| 871 | ); |
| 872 | |
| 873 | DEFINE_EVENT(i915_context, i915_context_free, |
Chris Wilson | e2efd13 | 2016-05-24 14:53:34 +0100 | [diff] [blame] | 874 | TP_PROTO(struct i915_gem_context *ctx), |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 875 | TP_ARGS(ctx) |
| 876 | ); |
| 877 | |
| 878 | /** |
| 879 | * DOC: switch_mm tracepoint |
| 880 | * |
| 881 | * This tracepoint allows tracking of the mm switch, which is an important point |
| 882 | * in the lifetime of the vm in the legacy submission path. This tracepoint is |
| 883 | * called only if full ppgtt is enabled. |
| 884 | */ |
| 885 | TRACE_EVENT(switch_mm, |
Chris Wilson | e2efd13 | 2016-05-24 14:53:34 +0100 | [diff] [blame] | 886 | TP_PROTO(struct intel_engine_cs *engine, struct i915_gem_context *to), |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 887 | |
Tvrtko Ursulin | 4a570db | 2016-03-16 11:00:38 +0000 | [diff] [blame] | 888 | TP_ARGS(engine, to), |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 889 | |
| 890 | TP_STRUCT__entry( |
| 891 | __field(u32, ring) |
Chris Wilson | e2efd13 | 2016-05-24 14:53:34 +0100 | [diff] [blame] | 892 | __field(struct i915_gem_context *, to) |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 893 | __field(struct i915_address_space *, vm) |
| 894 | __field(u32, dev) |
| 895 | ), |
| 896 | |
| 897 | TP_fast_assign( |
Tvrtko Ursulin | 4a570db | 2016-03-16 11:00:38 +0000 | [diff] [blame] | 898 | __entry->ring = engine->id; |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 899 | __entry->to = to; |
| 900 | __entry->vm = to->ppgtt? &to->ppgtt->base : NULL; |
Chris Wilson | 91c8a32 | 2016-07-05 10:40:23 +0100 | [diff] [blame] | 901 | __entry->dev = engine->i915->drm.primary->index; |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 902 | ), |
| 903 | |
| 904 | TP_printk("dev=%u, ring=%u, ctx=%p, ctx_vm=%p", |
| 905 | __entry->dev, __entry->ring, __entry->to, __entry->vm) |
| 906 | ); |
| 907 | |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 908 | #endif /* _I915_TRACE_H_ */ |
| 909 | |
| 910 | /* This part must be outside protection */ |
| 911 | #undef TRACE_INCLUDE_PATH |
Peter Clifton | a7c5427 | 2010-05-03 13:24:41 +0100 | [diff] [blame] | 912 | #define TRACE_INCLUDE_PATH . |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 913 | #include <trace/define_trace.h> |