Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 1 | /******************************************************************************* |
| 2 | * |
| 3 | * Intel Ethernet Controller XL710 Family Linux Virtual Function Driver |
Mitch Williams | 00e5ec4 | 2016-01-15 14:33:10 -0800 | [diff] [blame] | 4 | * Copyright(c) 2013 - 2016 Intel Corporation. |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms and conditions of the GNU General Public License, |
| 8 | * version 2, as published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 13 | * more details. |
| 14 | * |
Jesse Brandeburg | b831607 | 2014-04-05 07:46:11 +0000 | [diff] [blame] | 15 | * You should have received a copy of the GNU General Public License along |
| 16 | * with this program. If not, see <http://www.gnu.org/licenses/>. |
| 17 | * |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 18 | * The full GNU General Public License is included in this distribution in |
| 19 | * the file called "COPYING". |
| 20 | * |
| 21 | * Contact Information: |
| 22 | * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
| 23 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
| 24 | * |
| 25 | ******************************************************************************/ |
| 26 | |
| 27 | #ifndef _I40EVF_H_ |
| 28 | #define _I40EVF_H_ |
| 29 | |
| 30 | #include <linux/module.h> |
| 31 | #include <linux/pci.h> |
| 32 | #include <linux/aer.h> |
| 33 | #include <linux/netdevice.h> |
| 34 | #include <linux/vmalloc.h> |
| 35 | #include <linux/interrupt.h> |
| 36 | #include <linux/ethtool.h> |
| 37 | #include <linux/if_vlan.h> |
| 38 | #include <linux/ip.h> |
| 39 | #include <linux/tcp.h> |
| 40 | #include <linux/sctp.h> |
| 41 | #include <linux/ipv6.h> |
| 42 | #include <net/ip6_checksum.h> |
| 43 | #include <net/udp.h> |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 44 | |
| 45 | #include "i40e_type.h" |
| 46 | #include "i40e_virtchnl.h" |
| 47 | #include "i40e_txrx.h" |
| 48 | |
| 49 | #define DEFAULT_DEBUG_LEVEL_SHIFT 3 |
| 50 | #define PFX "i40evf: " |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 51 | |
| 52 | /* dummy struct to make common code less painful */ |
| 53 | struct i40e_vsi { |
| 54 | struct i40evf_adapter *back; |
| 55 | struct net_device *netdev; |
| 56 | unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; |
| 57 | u16 seid; |
| 58 | u16 id; |
| 59 | unsigned long state; |
| 60 | int base_vector; |
| 61 | u16 work_limit; |
Mitch Williams | f578f5f | 2015-08-28 17:55:58 -0400 | [diff] [blame] | 62 | u16 qs_handle; |
Mitch Williams | ed0e894 | 2017-01-24 10:23:59 -0800 | [diff] [blame] | 63 | void *priv; /* client driver data reference. */ |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 64 | }; |
| 65 | |
| 66 | /* How many Rx Buffers do we bundle into one write to the hardware ? */ |
| 67 | #define I40EVF_RX_BUFFER_WRITE 16 /* Must be power of 2 */ |
Jeff Kirsher | c57c995 | 2016-08-19 21:47:41 -0700 | [diff] [blame] | 68 | #define I40EVF_DEFAULT_TXD 512 |
| 69 | #define I40EVF_DEFAULT_RXD 512 |
| 70 | #define I40EVF_MAX_TXD 4096 |
| 71 | #define I40EVF_MIN_TXD 64 |
| 72 | #define I40EVF_MAX_RXD 4096 |
| 73 | #define I40EVF_MIN_RXD 64 |
| 74 | #define I40EVF_REQ_DESCRIPTOR_MULTIPLE 32 |
Jeff Kirsher | c57c995 | 2016-08-19 21:47:41 -0700 | [diff] [blame] | 75 | #define I40EVF_MAX_AQ_BUF_SIZE 4096 |
| 76 | #define I40EVF_AQ_LEN 32 |
| 77 | #define I40EVF_AQ_MAX_ERR 20 /* times to try before resetting AQ */ |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 78 | |
| 79 | #define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN) |
| 80 | |
| 81 | #define I40E_RX_DESC(R, i) (&(((union i40e_32byte_rx_desc *)((R)->desc))[i])) |
| 82 | #define I40E_TX_DESC(R, i) (&(((struct i40e_tx_desc *)((R)->desc))[i])) |
| 83 | #define I40E_TX_CTXTDESC(R, i) \ |
| 84 | (&(((struct i40e_tx_context_desc *)((R)->desc))[i])) |
Mitch Williams | 1255b7a | 2015-11-06 15:25:59 -0800 | [diff] [blame] | 85 | #define MAX_QUEUES 16 |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 86 | |
Anjali Singhai Jain | e25d00b8 | 2015-06-23 19:00:04 -0400 | [diff] [blame] | 87 | #define I40EVF_HKEY_ARRAY_SIZE ((I40E_VFQF_HKEY_MAX_INDEX + 1) * 4) |
Helin Zhang | 2c86ac3 | 2015-10-27 16:15:06 -0400 | [diff] [blame] | 88 | #define I40EVF_HLUT_ARRAY_SIZE ((I40E_VFQF_HLUT_MAX_INDEX + 1) * 4) |
Anjali Singhai Jain | e25d00b8 | 2015-06-23 19:00:04 -0400 | [diff] [blame] | 89 | |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 90 | /* MAX_MSIX_Q_VECTORS of these are allocated, |
| 91 | * but we only use one per queue-specific vector. |
| 92 | */ |
| 93 | struct i40e_q_vector { |
| 94 | struct i40evf_adapter *adapter; |
| 95 | struct i40e_vsi *vsi; |
| 96 | struct napi_struct napi; |
| 97 | unsigned long reg_idx; |
| 98 | struct i40e_ring_container rx; |
| 99 | struct i40e_ring_container tx; |
| 100 | u32 ring_mask; |
| 101 | u8 num_ringpairs; /* total number of ring pairs in vector */ |
Jesse Brandeburg | ee2319c | 2015-09-28 14:16:54 -0400 | [diff] [blame] | 102 | #define ITR_COUNTDOWN_START 100 |
| 103 | u8 itr_countdown; /* when 0 or 1 update ITR */ |
Jeff Kirsher | c57c995 | 2016-08-19 21:47:41 -0700 | [diff] [blame] | 104 | int v_idx; /* vector index in list */ |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 105 | char name[IFNAMSIZ + 9]; |
Anjali Singhai Jain | 8e0764b | 2015-06-05 12:20:30 -0400 | [diff] [blame] | 106 | bool arm_wb_state; |
Alan Brady | 96db776 | 2016-09-14 16:24:38 -0700 | [diff] [blame] | 107 | cpumask_t affinity_mask; |
| 108 | struct irq_affinity_notify affinity_notify; |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 109 | }; |
| 110 | |
| 111 | /* Helper macros to switch between ints/sec and what the register uses. |
| 112 | * And yes, it's the same math going both ways. The lowest value |
| 113 | * supported by all of the i40e hardware is 8. |
| 114 | */ |
| 115 | #define EITR_INTS_PER_SEC_TO_REG(_eitr) \ |
| 116 | ((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8) |
| 117 | #define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG |
| 118 | |
| 119 | #define I40EVF_DESC_UNUSED(R) \ |
| 120 | ((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \ |
| 121 | (R)->next_to_clean - (R)->next_to_use - 1) |
| 122 | |
Jeff Kirsher | c57c995 | 2016-08-19 21:47:41 -0700 | [diff] [blame] | 123 | #define I40EVF_RX_DESC_ADV(R, i) \ |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 124 | (&(((union i40e_adv_rx_desc *)((R).desc))[i])) |
Jeff Kirsher | c57c995 | 2016-08-19 21:47:41 -0700 | [diff] [blame] | 125 | #define I40EVF_TX_DESC_ADV(R, i) \ |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 126 | (&(((union i40e_adv_tx_desc *)((R).desc))[i])) |
Jeff Kirsher | c57c995 | 2016-08-19 21:47:41 -0700 | [diff] [blame] | 127 | #define I40EVF_TX_CTXTDESC_ADV(R, i) \ |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 128 | (&(((struct i40e_adv_tx_context_desc *)((R).desc))[i])) |
| 129 | |
| 130 | #define OTHER_VECTOR 1 |
| 131 | #define NONQ_VECS (OTHER_VECTOR) |
| 132 | |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 133 | #define MIN_MSIX_Q_VECTORS 1 |
| 134 | #define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NONQ_VECS) |
| 135 | |
| 136 | #define I40EVF_QUEUE_END_OF_LIST 0x7FF |
| 137 | #define I40EVF_FREE_VECTOR 0x7FFF |
| 138 | struct i40evf_mac_filter { |
| 139 | struct list_head list; |
| 140 | u8 macaddr[ETH_ALEN]; |
| 141 | bool remove; /* filter needs to be removed */ |
| 142 | bool add; /* filter needs to be added */ |
| 143 | }; |
| 144 | |
| 145 | struct i40evf_vlan_filter { |
| 146 | struct list_head list; |
| 147 | u16 vlan; |
| 148 | bool remove; /* filter needs to be removed */ |
| 149 | bool add; /* filter needs to be added */ |
| 150 | }; |
| 151 | |
| 152 | /* Driver state. The order of these is important! */ |
| 153 | enum i40evf_state_t { |
| 154 | __I40EVF_STARTUP, /* driver loaded, probe complete */ |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 155 | __I40EVF_REMOVE, /* driver is being unloaded */ |
| 156 | __I40EVF_INIT_VERSION_CHECK, /* aq msg sent, awaiting reply */ |
| 157 | __I40EVF_INIT_GET_RESOURCES, /* aq msg sent, awaiting reply */ |
| 158 | __I40EVF_INIT_SW, /* got resources, setting up structs */ |
Mitch Williams | ef8693e | 2014-02-13 03:48:53 -0800 | [diff] [blame] | 159 | __I40EVF_RESETTING, /* in reset */ |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 160 | /* Below here, watchdog is running */ |
| 161 | __I40EVF_DOWN, /* ready, can be opened */ |
Mitch Williams | 209dc4d | 2015-12-09 15:50:27 -0800 | [diff] [blame] | 162 | __I40EVF_DOWN_PENDING, /* descending, waiting for watchdog */ |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 163 | __I40EVF_TESTING, /* in ethtool self-test */ |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 164 | __I40EVF_RUNNING, /* opened, working */ |
| 165 | }; |
| 166 | |
| 167 | enum i40evf_critical_section_t { |
| 168 | __I40EVF_IN_CRITICAL_TASK, /* cannot be interrupted */ |
Mitch Williams | ed0e894 | 2017-01-24 10:23:59 -0800 | [diff] [blame] | 169 | __I40EVF_IN_CLIENT_TASK, |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 170 | }; |
| 171 | /* make common code happy */ |
| 172 | #define __I40E_DOWN __I40EVF_DOWN |
| 173 | |
| 174 | /* board specific private data structure */ |
| 175 | struct i40evf_adapter { |
| 176 | struct timer_list watchdog_timer; |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 177 | struct work_struct reset_task; |
| 178 | struct work_struct adminq_task; |
Mitch Williams | ed0e894 | 2017-01-24 10:23:59 -0800 | [diff] [blame] | 179 | struct delayed_work client_task; |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 180 | struct delayed_work init_task; |
Mitch Williams | 7d96ba1 | 2015-10-26 19:44:39 -0400 | [diff] [blame] | 181 | struct i40e_q_vector *q_vectors; |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 182 | struct list_head vlan_filter_list; |
Mitch Williams | e1dfee8 | 2014-02-13 03:48:51 -0800 | [diff] [blame] | 183 | char misc_vector_name[IFNAMSIZ + 9]; |
Mitch Williams | cc05292 | 2014-10-25 03:24:34 +0000 | [diff] [blame] | 184 | int num_active_queues; |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 185 | |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 186 | /* TX */ |
Mitch Williams | 0dd438d | 2015-10-26 19:44:40 -0400 | [diff] [blame] | 187 | struct i40e_ring *tx_rings; |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 188 | u32 tx_timeout_count; |
| 189 | struct list_head mac_filter_list; |
Mitch Williams | d732a18 | 2014-04-24 06:41:37 +0000 | [diff] [blame] | 190 | u32 tx_desc_count; |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 191 | |
| 192 | /* RX */ |
Mitch Williams | 0dd438d | 2015-10-26 19:44:40 -0400 | [diff] [blame] | 193 | struct i40e_ring *rx_rings; |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 194 | u64 hw_csum_rx_error; |
Mitch Williams | d732a18 | 2014-04-24 06:41:37 +0000 | [diff] [blame] | 195 | u32 rx_desc_count; |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 196 | int num_msix_vectors; |
Mitch Williams | ed0e894 | 2017-01-24 10:23:59 -0800 | [diff] [blame] | 197 | int num_iwarp_msix; |
| 198 | int iwarp_base_vector; |
Mitch Williams | e5f77f4 | 2017-02-09 23:35:18 -0800 | [diff] [blame] | 199 | u32 client_pending; |
Mitch Williams | ed0e894 | 2017-01-24 10:23:59 -0800 | [diff] [blame] | 200 | struct i40e_client_instance *cinst; |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 201 | struct msix_entry *msix_entries; |
| 202 | |
Mitch Williams | e8106eb | 2014-02-13 03:48:52 -0800 | [diff] [blame] | 203 | u32 flags; |
Jeff Kirsher | c57c995 | 2016-08-19 21:47:41 -0700 | [diff] [blame] | 204 | #define I40EVF_FLAG_RX_CSUM_ENABLED BIT(0) |
| 205 | #define I40EVF_FLAG_IN_NETPOLL BIT(4) |
| 206 | #define I40EVF_FLAG_IMIR_ENABLED BIT(5) |
| 207 | #define I40EVF_FLAG_MQ_CAPABLE BIT(6) |
| 208 | #define I40EVF_FLAG_NEED_LINK_UPDATE BIT(7) |
| 209 | #define I40EVF_FLAG_PF_COMMS_FAILED BIT(8) |
| 210 | #define I40EVF_FLAG_RESET_PENDING BIT(9) |
| 211 | #define I40EVF_FLAG_RESET_NEEDED BIT(10) |
Anjali Singhai Jain | d502ce0 | 2015-06-05 12:20:26 -0400 | [diff] [blame] | 212 | #define I40EVF_FLAG_WB_ON_ITR_CAPABLE BIT(11) |
| 213 | #define I40EVF_FLAG_OUTER_UDP_CSUM_CAPABLE BIT(12) |
Mitch Williams | 14e52ee | 2015-08-31 19:54:44 -0400 | [diff] [blame] | 214 | #define I40EVF_FLAG_ADDR_SET_BY_PF BIT(13) |
Jeff Kirsher | c57c995 | 2016-08-19 21:47:41 -0700 | [diff] [blame] | 215 | #define I40EVF_FLAG_SERVICE_CLIENT_REQUESTED BIT(14) |
Mitch Williams | ed0e894 | 2017-01-24 10:23:59 -0800 | [diff] [blame] | 216 | #define I40EVF_FLAG_CLIENT_NEEDS_OPEN BIT(15) |
| 217 | #define I40EVF_FLAG_CLIENT_NEEDS_CLOSE BIT(16) |
| 218 | #define I40EVF_FLAG_CLIENT_NEEDS_L2_PARAMS BIT(17) |
| 219 | #define I40EVF_FLAG_PROMISC_ON BIT(18) |
| 220 | #define I40EVF_FLAG_ALLMULTI_ON BIT(19) |
Alexander Duyck | c424d4a | 2017-03-14 10:15:26 -0700 | [diff] [blame] | 221 | #define I40EVF_FLAG_LEGACY_RX BIT(20) |
Anjali Singhai Jain | d502ce0 | 2015-06-05 12:20:26 -0400 | [diff] [blame] | 222 | /* duplicates for common code */ |
Jeff Kirsher | c57c995 | 2016-08-19 21:47:41 -0700 | [diff] [blame] | 223 | #define I40E_FLAG_FDIR_ATR_ENABLED 0 |
| 224 | #define I40E_FLAG_DCB_ENABLED 0 |
| 225 | #define I40E_FLAG_IN_NETPOLL I40EVF_FLAG_IN_NETPOLL |
| 226 | #define I40E_FLAG_RX_CSUM_ENABLED I40EVF_FLAG_RX_CSUM_ENABLED |
Anjali Singhai Jain | d502ce0 | 2015-06-05 12:20:26 -0400 | [diff] [blame] | 227 | #define I40E_FLAG_WB_ON_ITR_CAPABLE I40EVF_FLAG_WB_ON_ITR_CAPABLE |
| 228 | #define I40E_FLAG_OUTER_UDP_CSUM_CAPABLE I40EVF_FLAG_OUTER_UDP_CSUM_CAPABLE |
Alexander Duyck | c424d4a | 2017-03-14 10:15:26 -0700 | [diff] [blame] | 229 | #define I40E_FLAG_LEGACY_RX I40EVF_FLAG_LEGACY_RX |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 230 | /* flags for admin queue service task */ |
| 231 | u32 aq_required; |
Jesse Brandeburg | 41a1d04 | 2015-06-04 16:24:02 -0400 | [diff] [blame] | 232 | #define I40EVF_FLAG_AQ_ENABLE_QUEUES BIT(0) |
| 233 | #define I40EVF_FLAG_AQ_DISABLE_QUEUES BIT(1) |
| 234 | #define I40EVF_FLAG_AQ_ADD_MAC_FILTER BIT(2) |
| 235 | #define I40EVF_FLAG_AQ_ADD_VLAN_FILTER BIT(3) |
| 236 | #define I40EVF_FLAG_AQ_DEL_MAC_FILTER BIT(4) |
| 237 | #define I40EVF_FLAG_AQ_DEL_VLAN_FILTER BIT(5) |
| 238 | #define I40EVF_FLAG_AQ_CONFIGURE_QUEUES BIT(6) |
| 239 | #define I40EVF_FLAG_AQ_MAP_VECTORS BIT(7) |
| 240 | #define I40EVF_FLAG_AQ_HANDLE_RESET BIT(8) |
Jeff Kirsher | c57c995 | 2016-08-19 21:47:41 -0700 | [diff] [blame] | 241 | #define I40EVF_FLAG_AQ_CONFIGURE_RSS BIT(9) /* direct AQ config */ |
Jesse Brandeburg | 41a1d04 | 2015-06-04 16:24:02 -0400 | [diff] [blame] | 242 | #define I40EVF_FLAG_AQ_GET_CONFIG BIT(10) |
Mitch Williams | 43a3d9b | 2016-04-12 08:30:44 -0700 | [diff] [blame] | 243 | /* Newer style, RSS done by the PF so we can ignore hardware vagaries. */ |
| 244 | #define I40EVF_FLAG_AQ_GET_HENA BIT(11) |
| 245 | #define I40EVF_FLAG_AQ_SET_HENA BIT(12) |
| 246 | #define I40EVF_FLAG_AQ_SET_RSS_KEY BIT(13) |
| 247 | #define I40EVF_FLAG_AQ_SET_RSS_LUT BIT(14) |
Anjali Singhai Jain | 47d3483 | 2016-04-12 08:30:52 -0700 | [diff] [blame] | 248 | #define I40EVF_FLAG_AQ_REQUEST_PROMISC BIT(15) |
| 249 | #define I40EVF_FLAG_AQ_RELEASE_PROMISC BIT(16) |
Anjali Singhai Jain | f42a5c7 | 2016-05-03 15:13:10 -0700 | [diff] [blame] | 250 | #define I40EVF_FLAG_AQ_REQUEST_ALLMULTI BIT(17) |
| 251 | #define I40EVF_FLAG_AQ_RELEASE_ALLMULTI BIT(18) |
Mitch Williams | ef8693e | 2014-02-13 03:48:53 -0800 | [diff] [blame] | 252 | |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 253 | /* OS defined structs */ |
| 254 | struct net_device *netdev; |
| 255 | struct pci_dev *pdev; |
| 256 | struct net_device_stats net_stats; |
| 257 | |
Mitch Williams | 708e8c2 | 2014-02-13 03:48:50 -0800 | [diff] [blame] | 258 | struct i40e_hw hw; /* defined in i40e_type.h */ |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 259 | |
| 260 | enum i40evf_state_t state; |
Mitch Williams | 75a6443 | 2014-11-11 20:02:42 +0000 | [diff] [blame] | 261 | unsigned long crit_section; |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 262 | |
| 263 | struct work_struct watchdog_task; |
| 264 | bool netdev_registered; |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 265 | bool link_up; |
Mitch Williams | fe458e5 | 2016-08-04 11:37:02 -0700 | [diff] [blame] | 266 | enum i40e_aq_link_speed link_speed; |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 267 | enum i40e_virtchnl_ops current_op; |
Mitch Williams | ed0e894 | 2017-01-24 10:23:59 -0800 | [diff] [blame] | 268 | #define CLIENT_ALLOWED(_a) ((_a)->vf_res ? \ |
Mitch Williams | c0913c2 | 2016-04-12 08:30:41 -0700 | [diff] [blame] | 269 | (_a)->vf_res->vf_offload_flags & \ |
| 270 | I40E_VIRTCHNL_VF_OFFLOAD_IWARP : \ |
| 271 | 0) |
Mitch Williams | ed0e894 | 2017-01-24 10:23:59 -0800 | [diff] [blame] | 272 | #define CLIENT_ENABLED(_a) ((_a)->cinst) |
Mitch Williams | 43a3d9b | 2016-04-12 08:30:44 -0700 | [diff] [blame] | 273 | /* RSS by the PF should be preferred over RSS via other methods. */ |
| 274 | #define RSS_PF(_a) ((_a)->vf_res->vf_offload_flags & \ |
| 275 | I40E_VIRTCHNL_VF_OFFLOAD_RSS_PF) |
Mitch Williams | 17a65a7 | 2015-06-04 16:23:56 -0400 | [diff] [blame] | 276 | #define RSS_AQ(_a) ((_a)->vf_res->vf_offload_flags & \ |
| 277 | I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ) |
Mitch Williams | 43a3d9b | 2016-04-12 08:30:44 -0700 | [diff] [blame] | 278 | #define RSS_REG(_a) (!((_a)->vf_res->vf_offload_flags & \ |
| 279 | (I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ | \ |
| 280 | I40E_VIRTCHNL_VF_OFFLOAD_RSS_PF))) |
Mitch Williams | 17a65a7 | 2015-06-04 16:23:56 -0400 | [diff] [blame] | 281 | #define VLAN_ALLOWED(_a) ((_a)->vf_res->vf_offload_flags & \ |
| 282 | I40E_VIRTCHNL_VF_OFFLOAD_VLAN) |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 283 | struct i40e_virtchnl_vf_resource *vf_res; /* incl. all VSIs */ |
| 284 | struct i40e_virtchnl_vsi_resource *vsi_res; /* our LAN VSI */ |
Mitch Williams | 17a65a7 | 2015-06-04 16:23:56 -0400 | [diff] [blame] | 285 | struct i40e_virtchnl_version_info pf_version; |
| 286 | #define PF_IS_V11(_a) (((_a)->pf_version.major == 1) && \ |
| 287 | ((_a)->pf_version.minor == 1)) |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 288 | u16 msg_enable; |
| 289 | struct i40e_eth_stats current_stats; |
| 290 | struct i40e_vsi vsi; |
| 291 | u32 aq_wait_count; |
Mitch Williams | 43a3d9b | 2016-04-12 08:30:44 -0700 | [diff] [blame] | 292 | /* RSS stuff */ |
| 293 | u64 hena; |
| 294 | u16 rss_key_size; |
| 295 | u16 rss_lut_size; |
| 296 | u8 *rss_key; |
| 297 | u8 *rss_lut; |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 298 | }; |
| 299 | |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 300 | |
Mitch Williams | 00e5ec4 | 2016-01-15 14:33:10 -0800 | [diff] [blame] | 301 | /* Ethtool Private Flags */ |
Mitch Williams | 00e5ec4 | 2016-01-15 14:33:10 -0800 | [diff] [blame] | 302 | |
Mitch Williams | ed0e894 | 2017-01-24 10:23:59 -0800 | [diff] [blame] | 303 | /* lan device */ |
| 304 | struct i40e_device { |
| 305 | struct list_head list; |
| 306 | struct i40evf_adapter *vf; |
| 307 | }; |
| 308 | |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 309 | /* needed by i40evf_ethtool.c */ |
| 310 | extern char i40evf_driver_name[]; |
| 311 | extern const char i40evf_driver_version[]; |
| 312 | |
| 313 | int i40evf_up(struct i40evf_adapter *adapter); |
| 314 | void i40evf_down(struct i40evf_adapter *adapter); |
Mitch Williams | e6d038d | 2015-06-04 16:23:58 -0400 | [diff] [blame] | 315 | int i40evf_process_config(struct i40evf_adapter *adapter); |
Mitch Williams | 00e5ec4 | 2016-01-15 14:33:10 -0800 | [diff] [blame] | 316 | void i40evf_schedule_reset(struct i40evf_adapter *adapter); |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 317 | void i40evf_reset(struct i40evf_adapter *adapter); |
| 318 | void i40evf_set_ethtool_ops(struct net_device *netdev); |
| 319 | void i40evf_update_stats(struct i40evf_adapter *adapter); |
| 320 | void i40evf_reset_interrupt_capability(struct i40evf_adapter *adapter); |
| 321 | int i40evf_init_interrupt_scheme(struct i40evf_adapter *adapter); |
| 322 | void i40evf_irq_enable_queues(struct i40evf_adapter *adapter, u32 mask); |
Mitch Williams | e284fc8 | 2015-03-27 00:12:09 -0700 | [diff] [blame] | 323 | void i40evf_free_all_tx_resources(struct i40evf_adapter *adapter); |
| 324 | void i40evf_free_all_rx_resources(struct i40evf_adapter *adapter); |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 325 | |
| 326 | void i40e_napi_add_all(struct i40evf_adapter *adapter); |
| 327 | void i40e_napi_del_all(struct i40evf_adapter *adapter); |
| 328 | |
| 329 | int i40evf_send_api_ver(struct i40evf_adapter *adapter); |
| 330 | int i40evf_verify_api_ver(struct i40evf_adapter *adapter); |
| 331 | int i40evf_send_vf_config_msg(struct i40evf_adapter *adapter); |
| 332 | int i40evf_get_vf_config(struct i40evf_adapter *adapter); |
| 333 | void i40evf_irq_enable(struct i40evf_adapter *adapter, bool flush); |
| 334 | void i40evf_configure_queues(struct i40evf_adapter *adapter); |
| 335 | void i40evf_deconfigure_queues(struct i40evf_adapter *adapter); |
| 336 | void i40evf_enable_queues(struct i40evf_adapter *adapter); |
| 337 | void i40evf_disable_queues(struct i40evf_adapter *adapter); |
| 338 | void i40evf_map_queues(struct i40evf_adapter *adapter); |
| 339 | void i40evf_add_ether_addrs(struct i40evf_adapter *adapter); |
| 340 | void i40evf_del_ether_addrs(struct i40evf_adapter *adapter); |
| 341 | void i40evf_add_vlans(struct i40evf_adapter *adapter); |
| 342 | void i40evf_del_vlans(struct i40evf_adapter *adapter); |
| 343 | void i40evf_set_promiscuous(struct i40evf_adapter *adapter, int flags); |
| 344 | void i40evf_request_stats(struct i40evf_adapter *adapter); |
Mitch Williams | 625777e | 2014-02-20 19:29:05 -0800 | [diff] [blame] | 345 | void i40evf_request_reset(struct i40evf_adapter *adapter); |
Mitch Williams | 43a3d9b | 2016-04-12 08:30:44 -0700 | [diff] [blame] | 346 | void i40evf_get_hena(struct i40evf_adapter *adapter); |
| 347 | void i40evf_set_hena(struct i40evf_adapter *adapter); |
| 348 | void i40evf_set_rss_key(struct i40evf_adapter *adapter); |
| 349 | void i40evf_set_rss_lut(struct i40evf_adapter *adapter); |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 350 | void i40evf_virtchnl_completion(struct i40evf_adapter *adapter, |
| 351 | enum i40e_virtchnl_ops v_opcode, |
| 352 | i40e_status v_retval, u8 *msg, u16 msglen); |
Mitch Williams | 43a3d9b | 2016-04-12 08:30:44 -0700 | [diff] [blame] | 353 | int i40evf_config_rss(struct i40evf_adapter *adapter); |
Mitch Williams | ed0e894 | 2017-01-24 10:23:59 -0800 | [diff] [blame] | 354 | int i40evf_lan_add_device(struct i40evf_adapter *adapter); |
| 355 | int i40evf_lan_del_device(struct i40evf_adapter *adapter); |
| 356 | void i40evf_client_subtask(struct i40evf_adapter *adapter); |
| 357 | void i40evf_notify_client_message(struct i40e_vsi *vsi, u8 *msg, u16 len); |
| 358 | void i40evf_notify_client_l2_params(struct i40e_vsi *vsi); |
| 359 | void i40evf_notify_client_open(struct i40e_vsi *vsi); |
| 360 | void i40evf_notify_client_close(struct i40e_vsi *vsi, bool reset); |
Greg Rose | 5321a21 | 2013-12-21 06:13:06 +0000 | [diff] [blame] | 361 | #endif /* _I40EVF_H_ */ |