Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 1 | /* |
| 2 | * drivers/rtc/rtc-pl031.c |
| 3 | * |
| 4 | * Real Time Clock interface for ARM AMBA PrimeCell 031 RTC |
| 5 | * |
| 6 | * Author: Deepak Saxena <dsaxena@plexity.net> |
| 7 | * |
| 8 | * Copyright 2006 (c) MontaVista Software, Inc. |
| 9 | * |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 10 | * Author: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com> |
| 11 | * Copyright 2010 (c) ST-Ericsson AB |
| 12 | * |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 13 | * This program is free software; you can redistribute it and/or |
| 14 | * modify it under the terms of the GNU General Public License |
| 15 | * as published by the Free Software Foundation; either version |
| 16 | * 2 of the License, or (at your option) any later version. |
| 17 | */ |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 18 | #include <linux/module.h> |
| 19 | #include <linux/rtc.h> |
| 20 | #include <linux/init.h> |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 21 | #include <linux/interrupt.h> |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 22 | #include <linux/amba/bus.h> |
Russell King | 2dba851 | 2008-04-20 12:08:04 +0100 | [diff] [blame] | 23 | #include <linux/io.h> |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 24 | #include <linux/bcd.h> |
| 25 | #include <linux/delay.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 26 | #include <linux/slab.h> |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 27 | |
| 28 | /* |
| 29 | * Register definitions |
| 30 | */ |
| 31 | #define RTC_DR 0x00 /* Data read register */ |
| 32 | #define RTC_MR 0x04 /* Match register */ |
| 33 | #define RTC_LR 0x08 /* Data load register */ |
| 34 | #define RTC_CR 0x0c /* Control register */ |
| 35 | #define RTC_IMSC 0x10 /* Interrupt mask and set register */ |
| 36 | #define RTC_RIS 0x14 /* Raw interrupt status register */ |
| 37 | #define RTC_MIS 0x18 /* Masked interrupt status register */ |
| 38 | #define RTC_ICR 0x1c /* Interrupt clear register */ |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 39 | /* ST variants have additional timer functionality */ |
| 40 | #define RTC_TDR 0x20 /* Timer data read register */ |
| 41 | #define RTC_TLR 0x24 /* Timer data load register */ |
| 42 | #define RTC_TCR 0x28 /* Timer control register */ |
| 43 | #define RTC_YDR 0x30 /* Year data read register */ |
| 44 | #define RTC_YMR 0x34 /* Year match register */ |
| 45 | #define RTC_YLR 0x38 /* Year data load register */ |
| 46 | |
| 47 | #define RTC_CR_CWEN (1 << 26) /* Clockwatch enable bit */ |
| 48 | |
| 49 | #define RTC_TCR_EN (1 << 1) /* Periodic timer enable bit */ |
| 50 | |
| 51 | /* Common bit definitions for Interrupt status and control registers */ |
| 52 | #define RTC_BIT_AI (1 << 0) /* Alarm interrupt bit */ |
| 53 | #define RTC_BIT_PI (1 << 1) /* Periodic interrupt bit. ST variants only. */ |
| 54 | |
| 55 | /* Common bit definations for ST v2 for reading/writing time */ |
| 56 | #define RTC_SEC_SHIFT 0 |
| 57 | #define RTC_SEC_MASK (0x3F << RTC_SEC_SHIFT) /* Second [0-59] */ |
| 58 | #define RTC_MIN_SHIFT 6 |
| 59 | #define RTC_MIN_MASK (0x3F << RTC_MIN_SHIFT) /* Minute [0-59] */ |
| 60 | #define RTC_HOUR_SHIFT 12 |
| 61 | #define RTC_HOUR_MASK (0x1F << RTC_HOUR_SHIFT) /* Hour [0-23] */ |
| 62 | #define RTC_WDAY_SHIFT 17 |
| 63 | #define RTC_WDAY_MASK (0x7 << RTC_WDAY_SHIFT) /* Day of Week [1-7] 1=Sunday */ |
| 64 | #define RTC_MDAY_SHIFT 20 |
| 65 | #define RTC_MDAY_MASK (0x1F << RTC_MDAY_SHIFT) /* Day of Month [1-31] */ |
| 66 | #define RTC_MON_SHIFT 25 |
| 67 | #define RTC_MON_MASK (0xF << RTC_MON_SHIFT) /* Month [1-12] 1=January */ |
| 68 | |
| 69 | #define RTC_TIMER_FREQ 32768 |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 70 | |
Linus Walleij | aff05ed | 2012-07-30 14:41:34 -0700 | [diff] [blame] | 71 | /** |
| 72 | * struct pl031_vendor_data - per-vendor variations |
| 73 | * @ops: the vendor-specific operations used on this silicon version |
Linus Walleij | 1bb457f | 2012-07-30 14:41:36 -0700 | [diff] [blame^] | 74 | * @clockwatch: if this is an ST Microelectronics silicon version with a |
| 75 | * clockwatch function |
| 76 | * @st_weekday: if this is an ST Microelectronics silicon version that need |
| 77 | * the weekday fix |
Linus Walleij | aff05ed | 2012-07-30 14:41:34 -0700 | [diff] [blame] | 78 | */ |
| 79 | struct pl031_vendor_data { |
| 80 | struct rtc_class_ops ops; |
Linus Walleij | 1bb457f | 2012-07-30 14:41:36 -0700 | [diff] [blame^] | 81 | bool clockwatch; |
| 82 | bool st_weekday; |
Linus Walleij | aff05ed | 2012-07-30 14:41:34 -0700 | [diff] [blame] | 83 | }; |
| 84 | |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 85 | struct pl031_local { |
Linus Walleij | aff05ed | 2012-07-30 14:41:34 -0700 | [diff] [blame] | 86 | struct pl031_vendor_data *vendor; |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 87 | struct rtc_device *rtc; |
| 88 | void __iomem *base; |
| 89 | }; |
| 90 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 91 | static int pl031_alarm_irq_enable(struct device *dev, |
| 92 | unsigned int enabled) |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 93 | { |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 94 | struct pl031_local *ldata = dev_get_drvdata(dev); |
| 95 | unsigned long imsc; |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 96 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 97 | /* Clear any pending alarm interrupts. */ |
| 98 | writel(RTC_BIT_AI, ldata->base + RTC_ICR); |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 99 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 100 | imsc = readl(ldata->base + RTC_IMSC); |
| 101 | |
| 102 | if (enabled == 1) |
| 103 | writel(imsc | RTC_BIT_AI, ldata->base + RTC_IMSC); |
| 104 | else |
| 105 | writel(imsc & ~RTC_BIT_AI, ldata->base + RTC_IMSC); |
| 106 | |
| 107 | return 0; |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 108 | } |
| 109 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 110 | /* |
| 111 | * Convert Gregorian date to ST v2 RTC format. |
| 112 | */ |
| 113 | static int pl031_stv2_tm_to_time(struct device *dev, |
| 114 | struct rtc_time *tm, unsigned long *st_time, |
| 115 | unsigned long *bcd_year) |
| 116 | { |
| 117 | int year = tm->tm_year + 1900; |
| 118 | int wday = tm->tm_wday; |
| 119 | |
| 120 | /* wday masking is not working in hardware so wday must be valid */ |
| 121 | if (wday < -1 || wday > 6) { |
| 122 | dev_err(dev, "invalid wday value %d\n", tm->tm_wday); |
| 123 | return -EINVAL; |
| 124 | } else if (wday == -1) { |
| 125 | /* wday is not provided, calculate it here */ |
| 126 | unsigned long time; |
| 127 | struct rtc_time calc_tm; |
| 128 | |
| 129 | rtc_tm_to_time(tm, &time); |
| 130 | rtc_time_to_tm(time, &calc_tm); |
| 131 | wday = calc_tm.tm_wday; |
| 132 | } |
| 133 | |
| 134 | *bcd_year = (bin2bcd(year % 100) | bin2bcd(year / 100) << 8); |
| 135 | |
| 136 | *st_time = ((tm->tm_mon + 1) << RTC_MON_SHIFT) |
| 137 | | (tm->tm_mday << RTC_MDAY_SHIFT) |
| 138 | | ((wday + 1) << RTC_WDAY_SHIFT) |
| 139 | | (tm->tm_hour << RTC_HOUR_SHIFT) |
| 140 | | (tm->tm_min << RTC_MIN_SHIFT) |
| 141 | | (tm->tm_sec << RTC_SEC_SHIFT); |
| 142 | |
| 143 | return 0; |
| 144 | } |
| 145 | |
| 146 | /* |
| 147 | * Convert ST v2 RTC format to Gregorian date. |
| 148 | */ |
| 149 | static int pl031_stv2_time_to_tm(unsigned long st_time, unsigned long bcd_year, |
| 150 | struct rtc_time *tm) |
| 151 | { |
| 152 | tm->tm_year = bcd2bin(bcd_year) + (bcd2bin(bcd_year >> 8) * 100); |
| 153 | tm->tm_mon = ((st_time & RTC_MON_MASK) >> RTC_MON_SHIFT) - 1; |
| 154 | tm->tm_mday = ((st_time & RTC_MDAY_MASK) >> RTC_MDAY_SHIFT); |
| 155 | tm->tm_wday = ((st_time & RTC_WDAY_MASK) >> RTC_WDAY_SHIFT) - 1; |
| 156 | tm->tm_hour = ((st_time & RTC_HOUR_MASK) >> RTC_HOUR_SHIFT); |
| 157 | tm->tm_min = ((st_time & RTC_MIN_MASK) >> RTC_MIN_SHIFT); |
| 158 | tm->tm_sec = ((st_time & RTC_SEC_MASK) >> RTC_SEC_SHIFT); |
| 159 | |
| 160 | tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year); |
| 161 | tm->tm_year -= 1900; |
| 162 | |
| 163 | return 0; |
| 164 | } |
| 165 | |
| 166 | static int pl031_stv2_read_time(struct device *dev, struct rtc_time *tm) |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 167 | { |
| 168 | struct pl031_local *ldata = dev_get_drvdata(dev); |
| 169 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 170 | pl031_stv2_time_to_tm(readl(ldata->base + RTC_DR), |
| 171 | readl(ldata->base + RTC_YDR), tm); |
| 172 | |
| 173 | return 0; |
| 174 | } |
| 175 | |
| 176 | static int pl031_stv2_set_time(struct device *dev, struct rtc_time *tm) |
| 177 | { |
| 178 | unsigned long time; |
| 179 | unsigned long bcd_year; |
| 180 | struct pl031_local *ldata = dev_get_drvdata(dev); |
| 181 | int ret; |
| 182 | |
| 183 | ret = pl031_stv2_tm_to_time(dev, tm, &time, &bcd_year); |
| 184 | if (ret == 0) { |
| 185 | writel(bcd_year, ldata->base + RTC_YLR); |
| 186 | writel(time, ldata->base + RTC_LR); |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 187 | } |
| 188 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 189 | return ret; |
| 190 | } |
| 191 | |
| 192 | static int pl031_stv2_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
| 193 | { |
| 194 | struct pl031_local *ldata = dev_get_drvdata(dev); |
| 195 | int ret; |
| 196 | |
| 197 | ret = pl031_stv2_time_to_tm(readl(ldata->base + RTC_MR), |
| 198 | readl(ldata->base + RTC_YMR), &alarm->time); |
| 199 | |
| 200 | alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI; |
| 201 | alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI; |
| 202 | |
| 203 | return ret; |
| 204 | } |
| 205 | |
| 206 | static int pl031_stv2_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
| 207 | { |
| 208 | struct pl031_local *ldata = dev_get_drvdata(dev); |
| 209 | unsigned long time; |
| 210 | unsigned long bcd_year; |
| 211 | int ret; |
| 212 | |
| 213 | /* At the moment, we can only deal with non-wildcarded alarm times. */ |
| 214 | ret = rtc_valid_tm(&alarm->time); |
| 215 | if (ret == 0) { |
| 216 | ret = pl031_stv2_tm_to_time(dev, &alarm->time, |
| 217 | &time, &bcd_year); |
| 218 | if (ret == 0) { |
| 219 | writel(bcd_year, ldata->base + RTC_YMR); |
| 220 | writel(time, ldata->base + RTC_MR); |
| 221 | |
| 222 | pl031_alarm_irq_enable(dev, alarm->enabled); |
| 223 | } |
| 224 | } |
| 225 | |
| 226 | return ret; |
| 227 | } |
| 228 | |
| 229 | static irqreturn_t pl031_interrupt(int irq, void *dev_id) |
| 230 | { |
| 231 | struct pl031_local *ldata = dev_id; |
| 232 | unsigned long rtcmis; |
| 233 | unsigned long events = 0; |
| 234 | |
| 235 | rtcmis = readl(ldata->base + RTC_MIS); |
Rajkumar Kasirajan | ac2dee5 | 2012-05-29 15:07:40 -0700 | [diff] [blame] | 236 | if (rtcmis & RTC_BIT_AI) { |
| 237 | writel(RTC_BIT_AI, ldata->base + RTC_ICR); |
| 238 | events |= (RTC_AF | RTC_IRQF); |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 239 | rtc_update_irq(ldata->rtc, 1, events); |
| 240 | |
| 241 | return IRQ_HANDLED; |
| 242 | } |
| 243 | |
| 244 | return IRQ_NONE; |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 245 | } |
| 246 | |
| 247 | static int pl031_read_time(struct device *dev, struct rtc_time *tm) |
| 248 | { |
| 249 | struct pl031_local *ldata = dev_get_drvdata(dev); |
| 250 | |
Linus Walleij | 2934d6a | 2009-12-15 16:46:13 -0800 | [diff] [blame] | 251 | rtc_time_to_tm(readl(ldata->base + RTC_DR), tm); |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 252 | |
| 253 | return 0; |
| 254 | } |
| 255 | |
| 256 | static int pl031_set_time(struct device *dev, struct rtc_time *tm) |
| 257 | { |
| 258 | unsigned long time; |
| 259 | struct pl031_local *ldata = dev_get_drvdata(dev); |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 260 | int ret; |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 261 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 262 | ret = rtc_tm_to_time(tm, &time); |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 263 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 264 | if (ret == 0) |
| 265 | writel(time, ldata->base + RTC_LR); |
| 266 | |
| 267 | return ret; |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 268 | } |
| 269 | |
| 270 | static int pl031_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
| 271 | { |
| 272 | struct pl031_local *ldata = dev_get_drvdata(dev); |
| 273 | |
Linus Walleij | 2934d6a | 2009-12-15 16:46:13 -0800 | [diff] [blame] | 274 | rtc_time_to_tm(readl(ldata->base + RTC_MR), &alarm->time); |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 275 | |
| 276 | alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI; |
| 277 | alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI; |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 278 | |
| 279 | return 0; |
| 280 | } |
| 281 | |
| 282 | static int pl031_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
| 283 | { |
| 284 | struct pl031_local *ldata = dev_get_drvdata(dev); |
| 285 | unsigned long time; |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 286 | int ret; |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 287 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 288 | /* At the moment, we can only deal with non-wildcarded alarm times. */ |
| 289 | ret = rtc_valid_tm(&alarm->time); |
| 290 | if (ret == 0) { |
| 291 | ret = rtc_tm_to_time(&alarm->time, &time); |
| 292 | if (ret == 0) { |
| 293 | writel(time, ldata->base + RTC_MR); |
| 294 | pl031_alarm_irq_enable(dev, alarm->enabled); |
| 295 | } |
| 296 | } |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 297 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 298 | return ret; |
| 299 | } |
| 300 | |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 301 | static int pl031_remove(struct amba_device *adev) |
| 302 | { |
| 303 | struct pl031_local *ldata = dev_get_drvdata(&adev->dev); |
| 304 | |
Russell King | 2dba851 | 2008-04-20 12:08:04 +0100 | [diff] [blame] | 305 | amba_set_drvdata(adev, NULL); |
| 306 | free_irq(adev->irq[0], ldata->rtc); |
| 307 | rtc_device_unregister(ldata->rtc); |
| 308 | iounmap(ldata->base); |
| 309 | kfree(ldata); |
| 310 | amba_release_regions(adev); |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 311 | |
| 312 | return 0; |
| 313 | } |
| 314 | |
Russell King | aa25afa | 2011-02-19 15:55:00 +0000 | [diff] [blame] | 315 | static int pl031_probe(struct amba_device *adev, const struct amba_id *id) |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 316 | { |
| 317 | int ret; |
| 318 | struct pl031_local *ldata; |
Linus Walleij | aff05ed | 2012-07-30 14:41:34 -0700 | [diff] [blame] | 319 | struct pl031_vendor_data *vendor = id->data; |
| 320 | struct rtc_class_ops *ops = &vendor->ops; |
Rajkumar Kasirajan | c0a5f4a | 2012-05-17 17:03:24 -0700 | [diff] [blame] | 321 | unsigned long time; |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 322 | |
Russell King | 2dba851 | 2008-04-20 12:08:04 +0100 | [diff] [blame] | 323 | ret = amba_request_regions(adev, NULL); |
| 324 | if (ret) |
| 325 | goto err_req; |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 326 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 327 | ldata = kzalloc(sizeof(struct pl031_local), GFP_KERNEL); |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 328 | if (!ldata) { |
| 329 | ret = -ENOMEM; |
| 330 | goto out; |
| 331 | } |
Linus Walleij | aff05ed | 2012-07-30 14:41:34 -0700 | [diff] [blame] | 332 | ldata->vendor = vendor; |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 333 | |
Linus Walleij | dc890c2 | 2009-06-07 23:27:31 +0100 | [diff] [blame] | 334 | ldata->base = ioremap(adev->res.start, resource_size(&adev->res)); |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 335 | |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 336 | if (!ldata->base) { |
| 337 | ret = -ENOMEM; |
| 338 | goto out_no_remap; |
| 339 | } |
| 340 | |
Russell King | 2dba851 | 2008-04-20 12:08:04 +0100 | [diff] [blame] | 341 | amba_set_drvdata(adev, ldata); |
| 342 | |
Linus Walleij | 1bb457f | 2012-07-30 14:41:36 -0700 | [diff] [blame^] | 343 | dev_dbg(&adev->dev, "designer ID = 0x%02x\n", amba_manf(adev)); |
| 344 | dev_dbg(&adev->dev, "revision = 0x%01x\n", amba_rev(adev)); |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 345 | |
| 346 | /* Enable the clockwatch on ST Variants */ |
Linus Walleij | 1bb457f | 2012-07-30 14:41:36 -0700 | [diff] [blame^] | 347 | if (vendor->clockwatch) |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 348 | writel(readl(ldata->base + RTC_CR) | RTC_CR_CWEN, |
| 349 | ldata->base + RTC_CR); |
| 350 | |
Rajkumar Kasirajan | c0a5f4a | 2012-05-17 17:03:24 -0700 | [diff] [blame] | 351 | /* |
| 352 | * On ST PL031 variants, the RTC reset value does not provide correct |
| 353 | * weekday for 2000-01-01. Correct the erroneous sunday to saturday. |
| 354 | */ |
Linus Walleij | 1bb457f | 2012-07-30 14:41:36 -0700 | [diff] [blame^] | 355 | if (vendor->st_weekday) { |
Rajkumar Kasirajan | c0a5f4a | 2012-05-17 17:03:24 -0700 | [diff] [blame] | 356 | if (readl(ldata->base + RTC_YDR) == 0x2000) { |
| 357 | time = readl(ldata->base + RTC_DR); |
| 358 | if ((time & |
| 359 | (RTC_MON_MASK | RTC_MDAY_MASK | RTC_WDAY_MASK)) |
| 360 | == 0x02120000) { |
| 361 | time = time | (0x7 << RTC_WDAY_SHIFT); |
| 362 | writel(0x2000, ldata->base + RTC_YLR); |
| 363 | writel(time, ldata->base + RTC_LR); |
| 364 | } |
| 365 | } |
| 366 | } |
| 367 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 368 | ldata->rtc = rtc_device_register("pl031", &adev->dev, ops, |
| 369 | THIS_MODULE); |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 370 | if (IS_ERR(ldata->rtc)) { |
| 371 | ret = PTR_ERR(ldata->rtc); |
| 372 | goto out_no_rtc; |
| 373 | } |
| 374 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 375 | if (request_irq(adev->irq[0], pl031_interrupt, |
Yong Zhang | 2f6e5f9 | 2012-03-23 15:02:34 -0700 | [diff] [blame] | 376 | 0, "rtc-pl031", ldata)) { |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 377 | ret = -EIO; |
| 378 | goto out_no_irq; |
| 379 | } |
| 380 | |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 381 | return 0; |
| 382 | |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 383 | out_no_irq: |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 384 | rtc_device_unregister(ldata->rtc); |
| 385 | out_no_rtc: |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 386 | iounmap(ldata->base); |
Russell King | 2dba851 | 2008-04-20 12:08:04 +0100 | [diff] [blame] | 387 | amba_set_drvdata(adev, NULL); |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 388 | out_no_remap: |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 389 | kfree(ldata); |
| 390 | out: |
Russell King | 2dba851 | 2008-04-20 12:08:04 +0100 | [diff] [blame] | 391 | amba_release_regions(adev); |
| 392 | err_req: |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 393 | |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 394 | return ret; |
| 395 | } |
| 396 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 397 | /* Operations for the original ARM version */ |
Linus Walleij | aff05ed | 2012-07-30 14:41:34 -0700 | [diff] [blame] | 398 | static struct pl031_vendor_data arm_pl031 = { |
| 399 | .ops = { |
| 400 | .read_time = pl031_read_time, |
| 401 | .set_time = pl031_set_time, |
| 402 | .read_alarm = pl031_read_alarm, |
| 403 | .set_alarm = pl031_set_alarm, |
| 404 | .alarm_irq_enable = pl031_alarm_irq_enable, |
| 405 | }, |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 406 | }; |
| 407 | |
| 408 | /* The First ST derivative */ |
Linus Walleij | aff05ed | 2012-07-30 14:41:34 -0700 | [diff] [blame] | 409 | static struct pl031_vendor_data stv1_pl031 = { |
| 410 | .ops = { |
| 411 | .read_time = pl031_read_time, |
| 412 | .set_time = pl031_set_time, |
| 413 | .read_alarm = pl031_read_alarm, |
| 414 | .set_alarm = pl031_set_alarm, |
| 415 | .alarm_irq_enable = pl031_alarm_irq_enable, |
| 416 | }, |
Linus Walleij | 1bb457f | 2012-07-30 14:41:36 -0700 | [diff] [blame^] | 417 | .clockwatch = true, |
| 418 | .st_weekday = true, |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 419 | }; |
| 420 | |
| 421 | /* And the second ST derivative */ |
Linus Walleij | aff05ed | 2012-07-30 14:41:34 -0700 | [diff] [blame] | 422 | static struct pl031_vendor_data stv2_pl031 = { |
| 423 | .ops = { |
| 424 | .read_time = pl031_stv2_read_time, |
| 425 | .set_time = pl031_stv2_set_time, |
| 426 | .read_alarm = pl031_stv2_read_alarm, |
| 427 | .set_alarm = pl031_stv2_set_alarm, |
| 428 | .alarm_irq_enable = pl031_alarm_irq_enable, |
| 429 | }, |
Linus Walleij | 1bb457f | 2012-07-30 14:41:36 -0700 | [diff] [blame^] | 430 | .clockwatch = true, |
| 431 | .st_weekday = true, |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 432 | }; |
| 433 | |
Russell King | 2c39c9e | 2010-07-27 08:50:16 +0100 | [diff] [blame] | 434 | static struct amba_id pl031_ids[] = { |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 435 | { |
Linus Walleij | 2934d6a | 2009-12-15 16:46:13 -0800 | [diff] [blame] | 436 | .id = 0x00041031, |
| 437 | .mask = 0x000fffff, |
Linus Walleij | aff05ed | 2012-07-30 14:41:34 -0700 | [diff] [blame] | 438 | .data = &arm_pl031, |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 439 | }, |
| 440 | /* ST Micro variants */ |
| 441 | { |
| 442 | .id = 0x00180031, |
| 443 | .mask = 0x00ffffff, |
Linus Walleij | aff05ed | 2012-07-30 14:41:34 -0700 | [diff] [blame] | 444 | .data = &stv1_pl031, |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 445 | }, |
| 446 | { |
| 447 | .id = 0x00280031, |
| 448 | .mask = 0x00ffffff, |
Linus Walleij | aff05ed | 2012-07-30 14:41:34 -0700 | [diff] [blame] | 449 | .data = &stv2_pl031, |
Linus Walleij | 2934d6a | 2009-12-15 16:46:13 -0800 | [diff] [blame] | 450 | }, |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 451 | {0, 0}, |
| 452 | }; |
| 453 | |
Dave Martin | f5feac2 | 2011-10-05 15:15:22 +0100 | [diff] [blame] | 454 | MODULE_DEVICE_TABLE(amba, pl031_ids); |
| 455 | |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 456 | static struct amba_driver pl031_driver = { |
| 457 | .drv = { |
| 458 | .name = "rtc-pl031", |
| 459 | }, |
| 460 | .id_table = pl031_ids, |
| 461 | .probe = pl031_probe, |
| 462 | .remove = pl031_remove, |
| 463 | }; |
| 464 | |
viresh kumar | 9e5ed09 | 2012-03-15 10:40:38 +0100 | [diff] [blame] | 465 | module_amba_driver(pl031_driver); |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 466 | |
| 467 | MODULE_AUTHOR("Deepak Saxena <dsaxena@plexity.net"); |
| 468 | MODULE_DESCRIPTION("ARM AMBA PL031 RTC Driver"); |
| 469 | MODULE_LICENSE("GPL"); |