| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame^] | 1 | #ifndef _LINUX_AMIFDREG_H |
| 2 | #define _LINUX_AMIFDREG_H |
| 3 | |
| 4 | /* |
| 5 | ** CIAAPRA bits (read only) |
| 6 | */ |
| 7 | |
| 8 | #define DSKRDY (0x1<<5) /* disk ready when low */ |
| 9 | #define DSKTRACK0 (0x1<<4) /* head at track zero when low */ |
| 10 | #define DSKPROT (0x1<<3) /* disk protected when low */ |
| 11 | #define DSKCHANGE (0x1<<2) /* low when disk removed */ |
| 12 | |
| 13 | /* |
| 14 | ** CIAAPRB bits (read/write) |
| 15 | */ |
| 16 | |
| 17 | #define DSKMOTOR (0x1<<7) /* motor on when low */ |
| 18 | #define DSKSEL3 (0x1<<6) /* select drive 3 when low */ |
| 19 | #define DSKSEL2 (0x1<<5) /* select drive 2 when low */ |
| 20 | #define DSKSEL1 (0x1<<4) /* select drive 1 when low */ |
| 21 | #define DSKSEL0 (0x1<<3) /* select drive 0 when low */ |
| 22 | #define DSKSIDE (0x1<<2) /* side selection: 0 = upper, 1 = lower */ |
| 23 | #define DSKDIREC (0x1<<1) /* step direction: 0=in, 1=out (to trk 0) */ |
| 24 | #define DSKSTEP (0x1) /* pulse low to step head 1 track */ |
| 25 | |
| 26 | /* |
| 27 | ** DSKBYTR bits (read only) |
| 28 | */ |
| 29 | |
| 30 | #define DSKBYT (1<<15) /* register contains valid byte when set */ |
| 31 | #define DMAON (1<<14) /* disk DMA enabled */ |
| 32 | #define DISKWRITE (1<<13) /* disk write bit in DSKLEN enabled */ |
| 33 | #define WORDEQUAL (1<<12) /* DSKSYNC register match when true */ |
| 34 | /* bits 7-0 are data */ |
| 35 | |
| 36 | /* |
| 37 | ** ADKCON/ADKCONR bits |
| 38 | */ |
| 39 | |
| 40 | #ifndef SETCLR |
| 41 | #define ADK_SETCLR (1<<15) /* control bit */ |
| 42 | #endif |
| 43 | #define ADK_PRECOMP1 (1<<14) /* precompensation selection */ |
| 44 | #define ADK_PRECOMP0 (1<<13) /* 00=none, 01=140ns, 10=280ns, 11=500ns */ |
| 45 | #define ADK_MFMPREC (1<<12) /* 0=GCR precomp., 1=MFM precomp. */ |
| 46 | #define ADK_WORDSYNC (1<<10) /* enable DSKSYNC auto DMA */ |
| 47 | #define ADK_MSBSYNC (1<<9) /* when 1, enable sync on MSbit (for GCR) */ |
| 48 | #define ADK_FAST (1<<8) /* bit cell: 0=2us (GCR), 1=1us (MFM) */ |
| 49 | |
| 50 | /* |
| 51 | ** DSKLEN bits |
| 52 | */ |
| 53 | |
| 54 | #define DSKLEN_DMAEN (1<<15) |
| 55 | #define DSKLEN_WRITE (1<<14) |
| 56 | |
| 57 | /* |
| 58 | ** INTENA/INTREQ bits |
| 59 | */ |
| 60 | |
| 61 | #define DSKINDEX (0x1<<4) /* DSKINDEX bit */ |
| 62 | |
| 63 | /* |
| 64 | ** Misc |
| 65 | */ |
| 66 | |
| 67 | #define MFM_SYNC 0x4489 /* standard MFM sync value */ |
| 68 | |
| 69 | /* Values for FD_COMMAND */ |
| 70 | #define FD_RECALIBRATE 0x07 /* move to track 0 */ |
| 71 | #define FD_SEEK 0x0F /* seek track */ |
| 72 | #define FD_READ 0xE6 /* read with MT, MFM, SKip deleted */ |
| 73 | #define FD_WRITE 0xC5 /* write with MT, MFM */ |
| 74 | #define FD_SENSEI 0x08 /* Sense Interrupt Status */ |
| 75 | #define FD_SPECIFY 0x03 /* specify HUT etc */ |
| 76 | #define FD_FORMAT 0x4D /* format one track */ |
| 77 | #define FD_VERSION 0x10 /* get version code */ |
| 78 | #define FD_CONFIGURE 0x13 /* configure FIFO operation */ |
| 79 | #define FD_PERPENDICULAR 0x12 /* perpendicular r/w mode */ |
| 80 | |
| 81 | #endif /* _LINUX_AMIFDREG_H */ |