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Clemens Ladischd0ce9942007-12-23 19:50:57 +01001/*
2 * C-Media CMI8788 driver for C-Media's reference design and for the X-Meridian
3 *
4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
5 *
6 *
7 * This driver is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License, version 2.
9 *
10 * This driver is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this driver; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20/*
21 * SPI 0 -> 1st AK4396 (front)
Clemens Ladisch7113e952008-01-14 08:55:03 +010022 * SPI 1 -> 2nd AK4396 (surround)
Clemens Ladischd0ce9942007-12-23 19:50:57 +010023 * SPI 2 -> 3rd AK4396 (center/LFE)
24 * SPI 3 -> WM8785
Clemens Ladisch7113e952008-01-14 08:55:03 +010025 * SPI 4 -> 4th AK4396 (back)
Clemens Ladischd0ce9942007-12-23 19:50:57 +010026 *
27 * GPIO 0 -> DFS0 of AK5385
28 * GPIO 1 -> DFS1 of AK5385
29 */
30
Clemens Ladischd0ce9942007-12-23 19:50:57 +010031#include <linux/pci.h>
Clemens Ladischccc80fb2008-01-16 08:32:08 +010032#include <sound/control.h>
Clemens Ladischd0ce9942007-12-23 19:50:57 +010033#include <sound/core.h>
34#include <sound/initval.h>
35#include <sound/pcm.h>
36#include <sound/pcm_params.h>
37#include <sound/tlv.h>
38#include "oxygen.h"
Clemens Ladischc6260262008-01-25 08:41:52 +010039#include "ak4396.h"
Clemens Ladischd0ce9942007-12-23 19:50:57 +010040
41MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
42MODULE_DESCRIPTION("C-Media CMI8788 driver");
43MODULE_LICENSE("GPL");
44MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8788}}");
45
46static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
47static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
48static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
49
50module_param_array(index, int, NULL, 0444);
51MODULE_PARM_DESC(index, "card index");
52module_param_array(id, charp, NULL, 0444);
53MODULE_PARM_DESC(id, "ID string");
54module_param_array(enable, bool, NULL, 0444);
55MODULE_PARM_DESC(enable, "enable card");
56
57static struct pci_device_id oxygen_ids[] __devinitdata = {
58 { OXYGEN_PCI_SUBID(0x10b0, 0x0216) },
59 { OXYGEN_PCI_SUBID(0x10b0, 0x0218) },
60 { OXYGEN_PCI_SUBID(0x10b0, 0x0219) },
61 { OXYGEN_PCI_SUBID(0x13f6, 0x0001) },
62 { OXYGEN_PCI_SUBID(0x13f6, 0x0010) },
63 { OXYGEN_PCI_SUBID(0x13f6, 0x8788) },
64 { OXYGEN_PCI_SUBID(0x147a, 0xa017) },
Clemens Ladischd0ce9942007-12-23 19:50:57 +010065 { OXYGEN_PCI_SUBID(0x1a58, 0x0910) },
66 { OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = 1 },
67 { OXYGEN_PCI_SUBID(0x7284, 0x9761) },
68 { }
69};
70MODULE_DEVICE_TABLE(pci, oxygen_ids);
71
Clemens Ladisch878ac3e2008-01-21 08:50:19 +010072
73#define GPIO_AK5385_DFS_MASK 0x0003
74#define GPIO_AK5385_DFS_NORMAL 0x0000
75#define GPIO_AK5385_DFS_DOUBLE 0x0001
76#define GPIO_AK5385_DFS_QUAD 0x0002
77
Clemens Ladisch878ac3e2008-01-21 08:50:19 +010078#define WM8785_R0 0
79#define WM8785_R1 1
80#define WM8785_R2 2
81#define WM8785_R7 7
82
83/* R0 */
84#define WM8785_MCR_MASK 0x007
85#define WM8785_MCR_SLAVE 0x000
86#define WM8785_MCR_MASTER_128 0x001
87#define WM8785_MCR_MASTER_192 0x002
88#define WM8785_MCR_MASTER_256 0x003
89#define WM8785_MCR_MASTER_384 0x004
90#define WM8785_MCR_MASTER_512 0x005
91#define WM8785_MCR_MASTER_768 0x006
92#define WM8785_OSR_MASK 0x018
Clemens Ladischd0ce9942007-12-23 19:50:57 +010093#define WM8785_OSR_SINGLE 0x000
94#define WM8785_OSR_DOUBLE 0x008
95#define WM8785_OSR_QUAD 0x010
Clemens Ladisch878ac3e2008-01-21 08:50:19 +010096#define WM8785_FORMAT_MASK 0x060
97#define WM8785_FORMAT_RJUST 0x000
Clemens Ladischd0ce9942007-12-23 19:50:57 +010098#define WM8785_FORMAT_LJUST 0x020
99#define WM8785_FORMAT_I2S 0x040
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100100#define WM8785_FORMAT_DSP 0x060
101/* R1 */
102#define WM8785_WL_MASK 0x003
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100103#define WM8785_WL_16 0x000
104#define WM8785_WL_20 0x001
105#define WM8785_WL_24 0x002
106#define WM8785_WL_32 0x003
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100107#define WM8785_LRP 0x004
108#define WM8785_BCLKINV 0x008
109#define WM8785_LRSWAP 0x010
110#define WM8785_DEVNO_MASK 0x0e0
111/* R2 */
112#define WM8785_HPFR 0x001
113#define WM8785_HPFL 0x002
114#define WM8785_SDODIS 0x004
115#define WM8785_PWRDNR 0x008
116#define WM8785_PWRDNL 0x010
117#define WM8785_TDM_MASK 0x1c0
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100118
Clemens Ladisch7ef37cd2008-01-21 08:51:55 +0100119struct generic_data {
120 u8 ak4396_ctl2;
121};
122
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100123static void ak4396_write(struct oxygen *chip, unsigned int codec,
124 u8 reg, u8 value)
125{
126 /* maps ALSA channel pair number to SPI output */
127 static const u8 codec_spi_map[4] = {
Clemens Ladisch7113e952008-01-14 08:55:03 +0100128 0, 1, 2, 4
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100129 };
Clemens Ladischc2353a02008-01-18 09:17:53 +0100130 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100131 OXYGEN_SPI_DATA_LENGTH_2 |
Clemens Ladisch3b942532008-01-21 08:51:19 +0100132 OXYGEN_SPI_CLOCK_320 |
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100133 (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
Clemens Ladischc2353a02008-01-18 09:17:53 +0100134 OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100135 AK4396_WRITE | (reg << 8) | value);
136}
137
138static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
139{
Clemens Ladischc2353a02008-01-18 09:17:53 +0100140 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100141 OXYGEN_SPI_DATA_LENGTH_2 |
Clemens Ladisch3b942532008-01-21 08:51:19 +0100142 OXYGEN_SPI_CLOCK_320 |
Clemens Ladischc2353a02008-01-18 09:17:53 +0100143 (3 << OXYGEN_SPI_CODEC_SHIFT) |
144 OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100145 (reg << 9) | value);
146}
147
148static void ak4396_init(struct oxygen *chip)
149{
Clemens Ladisch7ef37cd2008-01-21 08:51:55 +0100150 struct generic_data *data = chip->model_data;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100151 unsigned int i;
152
Clemens Ladisch7ef37cd2008-01-21 08:51:55 +0100153 data->ak4396_ctl2 = AK4396_DEM_OFF | AK4396_DFS_NORMAL;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100154 for (i = 0; i < 4; ++i) {
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100155 ak4396_write(chip, i,
156 AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
157 ak4396_write(chip, i,
Clemens Ladisch7ef37cd2008-01-21 08:51:55 +0100158 AK4396_CONTROL_2, data->ak4396_ctl2);
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100159 ak4396_write(chip, i,
160 AK4396_CONTROL_3, AK4396_PCM);
161 ak4396_write(chip, i, AK4396_LCH_ATT, 0xff);
162 ak4396_write(chip, i, AK4396_RCH_ATT, 0xff);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100163 }
164 snd_component_add(chip->card, "AK4396");
165}
166
167static void ak5385_init(struct oxygen *chip)
168{
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100169 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
170 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100171 snd_component_add(chip->card, "AK5385");
172}
173
174static void wm8785_init(struct oxygen *chip)
175{
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100176 wm8785_write(chip, WM8785_R7, 0);
177 wm8785_write(chip, WM8785_R0, WM8785_MCR_SLAVE |
178 WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST);
179 wm8785_write(chip, WM8785_R1, WM8785_WL_24);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100180 snd_component_add(chip->card, "WM8785");
181}
182
183static void generic_init(struct oxygen *chip)
184{
185 ak4396_init(chip);
186 wm8785_init(chip);
187}
188
189static void meridian_init(struct oxygen *chip)
190{
191 ak4396_init(chip);
192 ak5385_init(chip);
193}
194
195static void generic_cleanup(struct oxygen *chip)
196{
197}
198
199static void set_ak4396_params(struct oxygen *chip,
200 struct snd_pcm_hw_params *params)
201{
Clemens Ladisch7ef37cd2008-01-21 08:51:55 +0100202 struct generic_data *data = chip->model_data;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100203 unsigned int i;
204 u8 value;
205
Clemens Ladisch7ef37cd2008-01-21 08:51:55 +0100206 value = data->ak4396_ctl2 & ~AK4396_DFS_MASK;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100207 if (params_rate(params) <= 54000)
208 value |= AK4396_DFS_NORMAL;
Clemens Ladisch236c4922008-01-28 08:32:58 +0100209 else if (params_rate(params) <= 108000)
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100210 value |= AK4396_DFS_DOUBLE;
211 else
212 value |= AK4396_DFS_QUAD;
Clemens Ladisch7ef37cd2008-01-21 08:51:55 +0100213 data->ak4396_ctl2 = value;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100214 for (i = 0; i < 4; ++i) {
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100215 ak4396_write(chip, i,
216 AK4396_CONTROL_1, AK4396_DIF_24_MSB);
217 ak4396_write(chip, i,
218 AK4396_CONTROL_2, value);
219 ak4396_write(chip, i,
220 AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100221 }
222}
223
224static void update_ak4396_volume(struct oxygen *chip)
225{
226 unsigned int i;
227
228 for (i = 0; i < 4; ++i) {
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100229 ak4396_write(chip, i,
230 AK4396_LCH_ATT, chip->dac_volume[i * 2]);
231 ak4396_write(chip, i,
232 AK4396_RCH_ATT, chip->dac_volume[i * 2 + 1]);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100233 }
234}
235
236static void update_ak4396_mute(struct oxygen *chip)
237{
Clemens Ladisch7ef37cd2008-01-21 08:51:55 +0100238 struct generic_data *data = chip->model_data;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100239 unsigned int i;
240 u8 value;
241
Clemens Ladisch7ef37cd2008-01-21 08:51:55 +0100242 value = data->ak4396_ctl2 & ~AK4396_SMUTE;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100243 if (chip->dac_mute)
244 value |= AK4396_SMUTE;
Clemens Ladisch7ef37cd2008-01-21 08:51:55 +0100245 data->ak4396_ctl2 = value;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100246 for (i = 0; i < 4; ++i)
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100247 ak4396_write(chip, i, AK4396_CONTROL_2, value);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100248}
249
250static void set_wm8785_params(struct oxygen *chip,
251 struct snd_pcm_hw_params *params)
252{
253 unsigned int value;
254
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100255 wm8785_write(chip, WM8785_R7, 0);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100256
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100257 value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
Clemens Ladisch71e22a42008-01-21 08:50:51 +0100258 if (params_rate(params) <= 48000)
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100259 value |= WM8785_OSR_SINGLE;
Clemens Ladisch71e22a42008-01-21 08:50:51 +0100260 else if (params_rate(params) <= 96000)
261 value |= WM8785_OSR_DOUBLE;
262 else
263 value |= WM8785_OSR_QUAD;
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100264 wm8785_write(chip, WM8785_R0, value);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100265
266 if (snd_pcm_format_width(params_format(params)) <= 16)
267 value = WM8785_WL_16;
268 else
269 value = WM8785_WL_24;
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100270 wm8785_write(chip, WM8785_R1, value);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100271}
272
273static void set_ak5385_params(struct oxygen *chip,
274 struct snd_pcm_hw_params *params)
275{
276 unsigned int value;
277
278 if (params_rate(params) <= 54000)
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100279 value = GPIO_AK5385_DFS_NORMAL;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100280 else if (params_rate(params) <= 108000)
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100281 value = GPIO_AK5385_DFS_DOUBLE;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100282 else
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100283 value = GPIO_AK5385_DFS_QUAD;
284 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
285 value, GPIO_AK5385_DFS_MASK);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100286}
287
288static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
289
Clemens Ladischccc80fb2008-01-16 08:32:08 +0100290static int ak4396_control_filter(struct snd_kcontrol_new *template)
291{
292 if (!strcmp(template->name, "Master Playback Volume")) {
293 template->access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ;
294 template->tlv.p = ak4396_db_scale;
295 }
296 return 0;
297}
298
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100299static const struct oxygen_model model_generic = {
300 .shortname = "C-Media CMI8788",
301 .longname = "C-Media Oxygen HD Audio",
302 .chip = "CMI8788",
303 .owner = THIS_MODULE,
304 .init = generic_init,
Clemens Ladischccc80fb2008-01-16 08:32:08 +0100305 .control_filter = ak4396_control_filter,
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100306 .cleanup = generic_cleanup,
307 .set_dac_params = set_ak4396_params,
308 .set_adc_params = set_wm8785_params,
309 .update_dac_volume = update_ak4396_volume,
310 .update_dac_mute = update_ak4396_mute,
Clemens Ladisch7ef37cd2008-01-21 08:51:55 +0100311 .model_data_size = sizeof(struct generic_data),
Clemens Ladisch976cd622008-01-25 08:37:49 +0100312 .dac_channels = 8,
Clemens Ladische85e0922008-01-16 08:30:38 +0100313 .used_channels = OXYGEN_CHANNEL_A |
314 OXYGEN_CHANNEL_C |
315 OXYGEN_CHANNEL_SPDIF |
316 OXYGEN_CHANNEL_MULTICH |
317 OXYGEN_CHANNEL_AC97,
Clemens Ladisch84aa6b72008-01-16 08:28:54 +0100318 .function_flags = OXYGEN_FUNCTION_ENABLE_SPI_4_5,
Clemens Ladisch05855ba2008-01-17 09:05:09 +0100319 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
320 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100321};
322static const struct oxygen_model model_meridian = {
323 .shortname = "C-Media CMI8788",
324 .longname = "C-Media Oxygen HD Audio",
325 .chip = "CMI8788",
326 .owner = THIS_MODULE,
327 .init = meridian_init,
Clemens Ladischccc80fb2008-01-16 08:32:08 +0100328 .control_filter = ak4396_control_filter,
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100329 .cleanup = generic_cleanup,
330 .set_dac_params = set_ak4396_params,
331 .set_adc_params = set_ak5385_params,
332 .update_dac_volume = update_ak4396_volume,
333 .update_dac_mute = update_ak4396_mute,
Clemens Ladisch7ef37cd2008-01-21 08:51:55 +0100334 .model_data_size = sizeof(struct generic_data),
Clemens Ladisch976cd622008-01-25 08:37:49 +0100335 .dac_channels = 8,
Clemens Ladische85e0922008-01-16 08:30:38 +0100336 .used_channels = OXYGEN_CHANNEL_B |
337 OXYGEN_CHANNEL_C |
338 OXYGEN_CHANNEL_SPDIF |
339 OXYGEN_CHANNEL_MULTICH |
340 OXYGEN_CHANNEL_AC97,
Clemens Ladisch84aa6b72008-01-16 08:28:54 +0100341 .function_flags = OXYGEN_FUNCTION_ENABLE_SPI_4_5,
Clemens Ladisch05855ba2008-01-17 09:05:09 +0100342 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
343 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100344};
345
346static int __devinit generic_oxygen_probe(struct pci_dev *pci,
347 const struct pci_device_id *pci_id)
348{
349 static int dev;
Clemens Ladischcd93dc82008-01-24 08:43:39 +0100350 int is_meridian;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100351 int err;
352
353 if (dev >= SNDRV_CARDS)
354 return -ENODEV;
355 if (!enable[dev]) {
356 ++dev;
357 return -ENOENT;
358 }
Clemens Ladischcd93dc82008-01-24 08:43:39 +0100359 is_meridian = pci_id->driver_data;
360 err = oxygen_pci_probe(pci, index[dev], id[dev], is_meridian,
361 is_meridian ? &model_meridian : &model_generic);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100362 if (err >= 0)
363 ++dev;
364 return err;
365}
366
367static struct pci_driver oxygen_driver = {
368 .name = "CMI8788",
369 .id_table = oxygen_ids,
370 .probe = generic_oxygen_probe,
371 .remove = __devexit_p(oxygen_pci_remove),
372};
373
374static int __init alsa_card_oxygen_init(void)
375{
376 return pci_register_driver(&oxygen_driver);
377}
378
379static void __exit alsa_card_oxygen_exit(void)
380{
381 pci_unregister_driver(&oxygen_driver);
382}
383
384module_init(alsa_card_oxygen_init)
385module_exit(alsa_card_oxygen_exit)