blob: 5827573875d483295ae3e5e2607759099f146721 [file] [log] [blame]
Selvin Xavier1ac5a402017-02-10 03:19:33 -08001/*
2 * Broadcom NetXtreme-E RoCE driver.
3 *
4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term
5 * Broadcom refers to Broadcom Limited and/or its subsidiaries.
6 *
7 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU
9 * General Public License (GPL) Version 2, available from the file
10 * COPYING in the main directory of this source tree, or the
11 * BSD license below:
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 *
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the
22 * distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 *
36 * Description: Slow Path Operators
37 */
38
39#include <linux/interrupt.h>
40#include <linux/spinlock.h>
41#include <linux/sched.h>
42#include <linux/pci.h>
43
44#include "roce_hsi.h"
45
46#include "qplib_res.h"
47#include "qplib_rcfw.h"
48#include "qplib_sp.h"
49
50const struct bnxt_qplib_gid bnxt_qplib_gid_zero = {{ 0, 0, 0, 0, 0, 0, 0, 0,
51 0, 0, 0, 0, 0, 0, 0, 0 } };
52
53/* Device */
54int bnxt_qplib_get_dev_attr(struct bnxt_qplib_rcfw *rcfw,
55 struct bnxt_qplib_dev_attr *attr)
56{
57 struct cmdq_query_func req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -070058 struct creq_query_func_resp resp;
59 struct bnxt_qplib_rcfw_sbuf *sbuf;
Selvin Xavier1ac5a402017-02-10 03:19:33 -080060 struct creq_query_func_resp_sb *sb;
61 u16 cmd_flags = 0;
62 u32 temp;
63 u8 *tqm_alloc;
Devesh Sharmacc1ec762017-05-22 03:15:31 -070064 int i, rc = 0;
Selvin Xavier1ac5a402017-02-10 03:19:33 -080065
66 RCFW_CMD_PREP(req, QUERY_FUNC, cmd_flags);
67
Devesh Sharmacc1ec762017-05-22 03:15:31 -070068 sbuf = bnxt_qplib_rcfw_alloc_sbuf(rcfw, sizeof(*sb));
69 if (!sbuf) {
Selvin Xavier1ac5a402017-02-10 03:19:33 -080070 dev_err(&rcfw->pdev->dev,
Devesh Sharmacc1ec762017-05-22 03:15:31 -070071 "QPLIB: SP: QUERY_FUNC alloc side buffer failed");
72 return -ENOMEM;
Selvin Xavier1ac5a402017-02-10 03:19:33 -080073 }
Devesh Sharmacc1ec762017-05-22 03:15:31 -070074
75 sb = sbuf->sb;
76 req.resp_size = sizeof(*sb) / BNXT_QPLIB_CMDQE_UNITS;
77 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp,
78 (void *)sbuf, 0);
79 if (rc)
80 goto bail;
81
Selvin Xavier1ac5a402017-02-10 03:19:33 -080082 /* Extract the context from the side buffer */
83 attr->max_qp = le32_to_cpu(sb->max_qp);
Selvin Xavier58d4a672017-06-29 12:28:12 -070084 /* max_qp value reported by FW for PF doesn't include the QP1 for PF */
85 attr->max_qp += 1;
Selvin Xavier1ac5a402017-02-10 03:19:33 -080086 attr->max_qp_rd_atom =
87 sb->max_qp_rd_atom > BNXT_QPLIB_MAX_OUT_RD_ATOM ?
88 BNXT_QPLIB_MAX_OUT_RD_ATOM : sb->max_qp_rd_atom;
89 attr->max_qp_init_rd_atom =
90 sb->max_qp_init_rd_atom > BNXT_QPLIB_MAX_OUT_RD_ATOM ?
91 BNXT_QPLIB_MAX_OUT_RD_ATOM : sb->max_qp_init_rd_atom;
92 attr->max_qp_wqes = le16_to_cpu(sb->max_qp_wr);
Eddie Wai9152e0b2017-06-14 03:26:23 -070093 /*
94 * 128 WQEs needs to be reserved for the HW (8916). Prevent
95 * reporting the max number
96 */
97 attr->max_qp_wqes -= BNXT_QPLIB_RESERVED_QP_WRS;
Selvin Xavier1ac5a402017-02-10 03:19:33 -080098 attr->max_qp_sges = sb->max_sge;
99 attr->max_cq = le32_to_cpu(sb->max_cq);
100 attr->max_cq_wqes = le32_to_cpu(sb->max_cqe);
101 attr->max_cq_sges = attr->max_qp_sges;
102 attr->max_mr = le32_to_cpu(sb->max_mr);
103 attr->max_mw = le32_to_cpu(sb->max_mw);
104
105 attr->max_mr_size = le64_to_cpu(sb->max_mr_size);
106 attr->max_pd = 64 * 1024;
107 attr->max_raw_ethy_qp = le32_to_cpu(sb->max_raw_eth_qp);
108 attr->max_ah = le32_to_cpu(sb->max_ah);
109
110 attr->max_fmr = le32_to_cpu(sb->max_fmr);
111 attr->max_map_per_fmr = sb->max_map_per_fmr;
112
113 attr->max_srq = le16_to_cpu(sb->max_srq);
114 attr->max_srq_wqes = le32_to_cpu(sb->max_srq_wr) - 1;
115 attr->max_srq_sges = sb->max_srq_sge;
116 /* Bono only reports 1 PKEY for now, but it can support > 1 */
117 attr->max_pkey = le32_to_cpu(sb->max_pkeys);
118
119 attr->max_inline_data = le32_to_cpu(sb->max_inline_data);
120 attr->l2_db_size = (sb->l2_db_space_size + 1) * PAGE_SIZE;
121 attr->max_sgid = le32_to_cpu(sb->max_gid);
122
123 strlcpy(attr->fw_ver, "20.6.28.0", sizeof(attr->fw_ver));
124
125 for (i = 0; i < MAX_TQM_ALLOC_REQ / 4; i++) {
126 temp = le32_to_cpu(sb->tqm_alloc_reqs[i]);
127 tqm_alloc = (u8 *)&temp;
128 attr->tqm_alloc_reqs[i * 4] = *tqm_alloc;
129 attr->tqm_alloc_reqs[i * 4 + 1] = *(++tqm_alloc);
130 attr->tqm_alloc_reqs[i * 4 + 2] = *(++tqm_alloc);
131 attr->tqm_alloc_reqs[i * 4 + 3] = *(++tqm_alloc);
132 }
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700133
134bail:
135 bnxt_qplib_rcfw_free_sbuf(rcfw, sbuf);
136 return rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800137}
138
139/* SGID */
140int bnxt_qplib_get_sgid(struct bnxt_qplib_res *res,
141 struct bnxt_qplib_sgid_tbl *sgid_tbl, int index,
142 struct bnxt_qplib_gid *gid)
143{
144 if (index > sgid_tbl->max) {
145 dev_err(&res->pdev->dev,
146 "QPLIB: Index %d exceeded SGID table max (%d)",
147 index, sgid_tbl->max);
148 return -EINVAL;
149 }
150 memcpy(gid, &sgid_tbl->tbl[index], sizeof(*gid));
151 return 0;
152}
153
154int bnxt_qplib_del_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl,
155 struct bnxt_qplib_gid *gid, bool update)
156{
157 struct bnxt_qplib_res *res = to_bnxt_qplib(sgid_tbl,
158 struct bnxt_qplib_res,
159 sgid_tbl);
160 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
161 int index;
162
163 if (!sgid_tbl) {
164 dev_err(&res->pdev->dev, "QPLIB: SGID table not allocated");
165 return -EINVAL;
166 }
167 /* Do we need a sgid_lock here? */
168 if (!sgid_tbl->active) {
169 dev_err(&res->pdev->dev,
170 "QPLIB: SGID table has no active entries");
171 return -ENOMEM;
172 }
173 for (index = 0; index < sgid_tbl->max; index++) {
174 if (!memcmp(&sgid_tbl->tbl[index], gid, sizeof(*gid)))
175 break;
176 }
177 if (index == sgid_tbl->max) {
178 dev_warn(&res->pdev->dev, "GID not found in the SGID table");
179 return 0;
180 }
181 /* Remove GID from the SGID table */
182 if (update) {
183 struct cmdq_delete_gid req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700184 struct creq_delete_gid_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800185 u16 cmd_flags = 0;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700186 int rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800187
188 RCFW_CMD_PREP(req, DELETE_GID, cmd_flags);
189 if (sgid_tbl->hw_id[index] == 0xFFFF) {
190 dev_err(&res->pdev->dev,
191 "QPLIB: GID entry contains an invalid HW id");
192 return -EINVAL;
193 }
194 req.gid_index = cpu_to_le16(sgid_tbl->hw_id[index]);
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700195 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
196 (void *)&resp, NULL, 0);
197 if (rc)
198 return rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800199 }
200 memcpy(&sgid_tbl->tbl[index], &bnxt_qplib_gid_zero,
201 sizeof(bnxt_qplib_gid_zero));
202 sgid_tbl->active--;
203 dev_dbg(&res->pdev->dev,
204 "QPLIB: SGID deleted hw_id[0x%x] = 0x%x active = 0x%x",
205 index, sgid_tbl->hw_id[index], sgid_tbl->active);
206 sgid_tbl->hw_id[index] = (u16)-1;
207
208 /* unlock */
209 return 0;
210}
211
212int bnxt_qplib_add_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl,
213 struct bnxt_qplib_gid *gid, u8 *smac, u16 vlan_id,
214 bool update, u32 *index)
215{
216 struct bnxt_qplib_res *res = to_bnxt_qplib(sgid_tbl,
217 struct bnxt_qplib_res,
218 sgid_tbl);
219 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700220 int i, free_idx;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800221
222 if (!sgid_tbl) {
223 dev_err(&res->pdev->dev, "QPLIB: SGID table not allocated");
224 return -EINVAL;
225 }
226 /* Do we need a sgid_lock here? */
227 if (sgid_tbl->active == sgid_tbl->max) {
228 dev_err(&res->pdev->dev, "QPLIB: SGID table is full");
229 return -ENOMEM;
230 }
231 free_idx = sgid_tbl->max;
232 for (i = 0; i < sgid_tbl->max; i++) {
233 if (!memcmp(&sgid_tbl->tbl[i], gid, sizeof(*gid))) {
234 dev_dbg(&res->pdev->dev,
235 "QPLIB: SGID entry already exist in entry %d!",
236 i);
237 *index = i;
238 return -EALREADY;
239 } else if (!memcmp(&sgid_tbl->tbl[i], &bnxt_qplib_gid_zero,
240 sizeof(bnxt_qplib_gid_zero)) &&
241 free_idx == sgid_tbl->max) {
242 free_idx = i;
243 }
244 }
245 if (free_idx == sgid_tbl->max) {
246 dev_err(&res->pdev->dev,
247 "QPLIB: SGID table is FULL but count is not MAX??");
248 return -ENOMEM;
249 }
250 if (update) {
251 struct cmdq_add_gid req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700252 struct creq_add_gid_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800253 u16 cmd_flags = 0;
254 u32 temp32[4];
255 u16 temp16[3];
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700256 int rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800257
258 RCFW_CMD_PREP(req, ADD_GID, cmd_flags);
259
260 memcpy(temp32, gid->data, sizeof(struct bnxt_qplib_gid));
261 req.gid[0] = cpu_to_be32(temp32[3]);
262 req.gid[1] = cpu_to_be32(temp32[2]);
263 req.gid[2] = cpu_to_be32(temp32[1]);
264 req.gid[3] = cpu_to_be32(temp32[0]);
265 if (vlan_id != 0xFFFF)
266 req.vlan = cpu_to_le16((vlan_id &
267 CMDQ_ADD_GID_VLAN_VLAN_ID_MASK) |
268 CMDQ_ADD_GID_VLAN_TPID_TPID_8100 |
269 CMDQ_ADD_GID_VLAN_VLAN_EN);
270
271 /* MAC in network format */
272 memcpy(temp16, smac, 6);
273 req.src_mac[0] = cpu_to_be16(temp16[0]);
274 req.src_mac[1] = cpu_to_be16(temp16[1]);
275 req.src_mac[2] = cpu_to_be16(temp16[2]);
276
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700277 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
278 (void *)&resp, NULL, 0);
279 if (rc)
280 return rc;
281 sgid_tbl->hw_id[free_idx] = le32_to_cpu(resp.xid);
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800282 }
283 /* Add GID to the sgid_tbl */
284 memcpy(&sgid_tbl->tbl[free_idx], gid, sizeof(*gid));
285 sgid_tbl->active++;
286 dev_dbg(&res->pdev->dev,
287 "QPLIB: SGID added hw_id[0x%x] = 0x%x active = 0x%x",
288 free_idx, sgid_tbl->hw_id[free_idx], sgid_tbl->active);
289
290 *index = free_idx;
291 /* unlock */
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700292 return 0;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800293}
294
295/* pkeys */
296int bnxt_qplib_get_pkey(struct bnxt_qplib_res *res,
297 struct bnxt_qplib_pkey_tbl *pkey_tbl, u16 index,
298 u16 *pkey)
299{
300 if (index == 0xFFFF) {
301 *pkey = 0xFFFF;
302 return 0;
303 }
304 if (index > pkey_tbl->max) {
305 dev_err(&res->pdev->dev,
306 "QPLIB: Index %d exceeded PKEY table max (%d)",
307 index, pkey_tbl->max);
308 return -EINVAL;
309 }
310 memcpy(pkey, &pkey_tbl->tbl[index], sizeof(*pkey));
311 return 0;
312}
313
314int bnxt_qplib_del_pkey(struct bnxt_qplib_res *res,
315 struct bnxt_qplib_pkey_tbl *pkey_tbl, u16 *pkey,
316 bool update)
317{
318 int i, rc = 0;
319
320 if (!pkey_tbl) {
321 dev_err(&res->pdev->dev, "QPLIB: PKEY table not allocated");
322 return -EINVAL;
323 }
324
325 /* Do we need a pkey_lock here? */
326 if (!pkey_tbl->active) {
327 dev_err(&res->pdev->dev,
328 "QPLIB: PKEY table has no active entries");
329 return -ENOMEM;
330 }
331 for (i = 0; i < pkey_tbl->max; i++) {
332 if (!memcmp(&pkey_tbl->tbl[i], pkey, sizeof(*pkey)))
333 break;
334 }
335 if (i == pkey_tbl->max) {
336 dev_err(&res->pdev->dev,
337 "QPLIB: PKEY 0x%04x not found in the pkey table",
338 *pkey);
339 return -ENOMEM;
340 }
341 memset(&pkey_tbl->tbl[i], 0, sizeof(*pkey));
342 pkey_tbl->active--;
343
344 /* unlock */
345 return rc;
346}
347
348int bnxt_qplib_add_pkey(struct bnxt_qplib_res *res,
349 struct bnxt_qplib_pkey_tbl *pkey_tbl, u16 *pkey,
350 bool update)
351{
352 int i, free_idx, rc = 0;
353
354 if (!pkey_tbl) {
355 dev_err(&res->pdev->dev, "QPLIB: PKEY table not allocated");
356 return -EINVAL;
357 }
358
359 /* Do we need a pkey_lock here? */
360 if (pkey_tbl->active == pkey_tbl->max) {
361 dev_err(&res->pdev->dev, "QPLIB: PKEY table is full");
362 return -ENOMEM;
363 }
364 free_idx = pkey_tbl->max;
365 for (i = 0; i < pkey_tbl->max; i++) {
366 if (!memcmp(&pkey_tbl->tbl[i], pkey, sizeof(*pkey)))
367 return -EALREADY;
368 else if (!pkey_tbl->tbl[i] && free_idx == pkey_tbl->max)
369 free_idx = i;
370 }
371 if (free_idx == pkey_tbl->max) {
372 dev_err(&res->pdev->dev,
373 "QPLIB: PKEY table is FULL but count is not MAX??");
374 return -ENOMEM;
375 }
376 /* Add PKEY to the pkey_tbl */
377 memcpy(&pkey_tbl->tbl[free_idx], pkey, sizeof(*pkey));
378 pkey_tbl->active++;
379
380 /* unlock */
381 return rc;
382}
383
384/* AH */
385int bnxt_qplib_create_ah(struct bnxt_qplib_res *res, struct bnxt_qplib_ah *ah)
386{
387 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
388 struct cmdq_create_ah req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700389 struct creq_create_ah_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800390 u16 cmd_flags = 0;
391 u32 temp32[4];
392 u16 temp16[3];
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700393 int rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800394
395 RCFW_CMD_PREP(req, CREATE_AH, cmd_flags);
396
397 memcpy(temp32, ah->dgid.data, sizeof(struct bnxt_qplib_gid));
398 req.dgid[0] = cpu_to_le32(temp32[0]);
399 req.dgid[1] = cpu_to_le32(temp32[1]);
400 req.dgid[2] = cpu_to_le32(temp32[2]);
401 req.dgid[3] = cpu_to_le32(temp32[3]);
402
403 req.type = ah->nw_type;
404 req.hop_limit = ah->hop_limit;
405 req.sgid_index = cpu_to_le16(res->sgid_tbl.hw_id[ah->sgid_index]);
406 req.dest_vlan_id_flow_label = cpu_to_le32((ah->flow_label &
407 CMDQ_CREATE_AH_FLOW_LABEL_MASK) |
408 CMDQ_CREATE_AH_DEST_VLAN_ID_MASK);
409 req.pd_id = cpu_to_le32(ah->pd->id);
410 req.traffic_class = ah->traffic_class;
411
412 /* MAC in network format */
413 memcpy(temp16, ah->dmac, 6);
414 req.dest_mac[0] = cpu_to_le16(temp16[0]);
415 req.dest_mac[1] = cpu_to_le16(temp16[1]);
416 req.dest_mac[2] = cpu_to_le16(temp16[2]);
417
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700418 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp,
419 NULL, 1);
420 if (rc)
421 return rc;
422
423 ah->id = le32_to_cpu(resp.xid);
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800424 return 0;
425}
426
427int bnxt_qplib_destroy_ah(struct bnxt_qplib_res *res, struct bnxt_qplib_ah *ah)
428{
429 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
430 struct cmdq_destroy_ah req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700431 struct creq_destroy_ah_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800432 u16 cmd_flags = 0;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700433 int rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800434
435 /* Clean up the AH table in the device */
436 RCFW_CMD_PREP(req, DESTROY_AH, cmd_flags);
437
438 req.ah_cid = cpu_to_le32(ah->id);
439
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700440 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp,
441 NULL, 1);
442 if (rc)
443 return rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800444 return 0;
445}
446
447/* MRW */
448int bnxt_qplib_free_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mrw)
449{
450 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
451 struct cmdq_deallocate_key req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700452 struct creq_deallocate_key_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800453 u16 cmd_flags = 0;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700454 int rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800455
456 if (mrw->lkey == 0xFFFFFFFF) {
457 dev_info(&res->pdev->dev,
458 "QPLIB: SP: Free a reserved lkey MRW");
459 return 0;
460 }
461
462 RCFW_CMD_PREP(req, DEALLOCATE_KEY, cmd_flags);
463
464 req.mrw_flags = mrw->type;
465
466 if ((mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE1) ||
467 (mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2A) ||
468 (mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2B))
469 req.key = cpu_to_le32(mrw->rkey);
470 else
471 req.key = cpu_to_le32(mrw->lkey);
472
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700473 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp,
474 NULL, 0);
475 if (rc)
476 return rc;
477
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800478 /* Free the qplib's MRW memory */
479 if (mrw->hwq.max_elements)
480 bnxt_qplib_free_hwq(res->pdev, &mrw->hwq);
481
482 return 0;
483}
484
485int bnxt_qplib_alloc_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mrw)
486{
487 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
488 struct cmdq_allocate_mrw req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700489 struct creq_allocate_mrw_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800490 u16 cmd_flags = 0;
491 unsigned long tmp;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700492 int rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800493
494 RCFW_CMD_PREP(req, ALLOCATE_MRW, cmd_flags);
495
496 req.pd_id = cpu_to_le32(mrw->pd->id);
497 req.mrw_flags = mrw->type;
498 if ((mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_PMR &&
499 mrw->flags & BNXT_QPLIB_FR_PMR) ||
500 mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2A ||
501 mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2B)
502 req.access = CMDQ_ALLOCATE_MRW_ACCESS_CONSUMER_OWNED_KEY;
503 tmp = (unsigned long)mrw;
504 req.mrw_handle = cpu_to_le64(tmp);
505
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700506 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
507 (void *)&resp, NULL, 0);
508 if (rc)
509 return rc;
510
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800511 if ((mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE1) ||
512 (mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2A) ||
513 (mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2B))
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700514 mrw->rkey = le32_to_cpu(resp.xid);
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800515 else
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700516 mrw->lkey = le32_to_cpu(resp.xid);
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800517 return 0;
518}
519
520int bnxt_qplib_dereg_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mrw,
521 bool block)
522{
523 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
524 struct cmdq_deregister_mr req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700525 struct creq_deregister_mr_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800526 u16 cmd_flags = 0;
527 int rc;
528
529 RCFW_CMD_PREP(req, DEREGISTER_MR, cmd_flags);
530
531 req.lkey = cpu_to_le32(mrw->lkey);
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700532 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
533 (void *)&resp, NULL, block);
534 if (rc)
535 return rc;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800536
537 /* Free the qplib's MR memory */
538 if (mrw->hwq.max_elements) {
539 mrw->va = 0;
540 mrw->total_size = 0;
541 bnxt_qplib_free_hwq(res->pdev, &mrw->hwq);
542 }
543
544 return 0;
545}
546
547int bnxt_qplib_reg_mr(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mr,
548 u64 *pbl_tbl, int num_pbls, bool block)
549{
550 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
551 struct cmdq_register_mr req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700552 struct creq_register_mr_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800553 u16 cmd_flags = 0, level;
554 int pg_ptrs, pages, i, rc;
555 dma_addr_t **pbl_ptr;
556 u32 pg_size;
557
558 if (num_pbls) {
559 pg_ptrs = roundup_pow_of_two(num_pbls);
560 pages = pg_ptrs >> MAX_PBL_LVL_1_PGS_SHIFT;
561 if (!pages)
562 pages++;
563
564 if (pages > MAX_PBL_LVL_1_PGS) {
565 dev_err(&res->pdev->dev, "QPLIB: SP: Reg MR pages ");
566 dev_err(&res->pdev->dev,
567 "requested (0x%x) exceeded max (0x%x)",
568 pages, MAX_PBL_LVL_1_PGS);
569 return -ENOMEM;
570 }
571 /* Free the hwq if it already exist, must be a rereg */
572 if (mr->hwq.max_elements)
573 bnxt_qplib_free_hwq(res->pdev, &mr->hwq);
574
575 mr->hwq.max_elements = pages;
576 rc = bnxt_qplib_alloc_init_hwq(res->pdev, &mr->hwq, NULL, 0,
577 &mr->hwq.max_elements,
578 PAGE_SIZE, 0, PAGE_SIZE,
579 HWQ_TYPE_CTX);
580 if (rc) {
581 dev_err(&res->pdev->dev,
582 "SP: Reg MR memory allocation failed");
583 return -ENOMEM;
584 }
585 /* Write to the hwq */
586 pbl_ptr = (dma_addr_t **)mr->hwq.pbl_ptr;
587 for (i = 0; i < num_pbls; i++)
588 pbl_ptr[PTR_PG(i)][PTR_IDX(i)] =
589 (pbl_tbl[i] & PAGE_MASK) | PTU_PTE_VALID;
590 }
591
592 RCFW_CMD_PREP(req, REGISTER_MR, cmd_flags);
593
594 /* Configure the request */
595 if (mr->hwq.level == PBL_LVL_MAX) {
596 level = 0;
597 req.pbl = 0;
598 pg_size = PAGE_SIZE;
599 } else {
600 level = mr->hwq.level + 1;
601 req.pbl = cpu_to_le64(mr->hwq.pbl[PBL_LVL_0].pg_map_arr[0]);
602 pg_size = mr->hwq.pbl[PBL_LVL_0].pg_size;
603 }
604 req.log2_pg_size_lvl = (level << CMDQ_REGISTER_MR_LVL_SFT) |
605 ((ilog2(pg_size) <<
606 CMDQ_REGISTER_MR_LOG2_PG_SIZE_SFT) &
607 CMDQ_REGISTER_MR_LOG2_PG_SIZE_MASK);
608 req.access = (mr->flags & 0xFFFF);
609 req.va = cpu_to_le64(mr->va);
610 req.key = cpu_to_le32(mr->lkey);
611 req.mr_size = cpu_to_le64(mr->total_size);
612
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700613 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
614 (void *)&resp, NULL, block);
615 if (rc)
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800616 goto fail;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700617
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800618 return 0;
619
620fail:
621 if (mr->hwq.max_elements)
622 bnxt_qplib_free_hwq(res->pdev, &mr->hwq);
623 return rc;
624}
625
626int bnxt_qplib_alloc_fast_reg_page_list(struct bnxt_qplib_res *res,
627 struct bnxt_qplib_frpl *frpl,
628 int max_pg_ptrs)
629{
630 int pg_ptrs, pages, rc;
631
632 /* Re-calculate the max to fit the HWQ allocation model */
633 pg_ptrs = roundup_pow_of_two(max_pg_ptrs);
634 pages = pg_ptrs >> MAX_PBL_LVL_1_PGS_SHIFT;
635 if (!pages)
636 pages++;
637
638 if (pages > MAX_PBL_LVL_1_PGS)
639 return -ENOMEM;
640
641 frpl->hwq.max_elements = pages;
642 rc = bnxt_qplib_alloc_init_hwq(res->pdev, &frpl->hwq, NULL, 0,
643 &frpl->hwq.max_elements, PAGE_SIZE, 0,
644 PAGE_SIZE, HWQ_TYPE_CTX);
645 if (!rc)
646 frpl->max_pg_ptrs = pg_ptrs;
647
648 return rc;
649}
650
651int bnxt_qplib_free_fast_reg_page_list(struct bnxt_qplib_res *res,
652 struct bnxt_qplib_frpl *frpl)
653{
654 bnxt_qplib_free_hwq(res->pdev, &frpl->hwq);
655 return 0;
656}
657
658int bnxt_qplib_map_tc2cos(struct bnxt_qplib_res *res, u16 *cids)
659{
660 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
661 struct cmdq_map_tc_to_cos req;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700662 struct creq_map_tc_to_cos_resp resp;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800663 u16 cmd_flags = 0;
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700664 int rc = 0;
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800665
666 RCFW_CMD_PREP(req, MAP_TC_TO_COS, cmd_flags);
667 req.cos0 = cpu_to_le16(cids[0]);
668 req.cos1 = cpu_to_le16(cids[1]);
669
Devesh Sharmacc1ec762017-05-22 03:15:31 -0700670 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
671 (void *)&resp, NULL, 0);
Selvin Xavier1ac5a402017-02-10 03:19:33 -0800672 return 0;
673}