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Len Brown103a8fe2010-10-22 23:53:03 -04001.TH TURBOSTAT 8
2.SH NAME
3turbostat \- Report processor frequency and idle statistics
4.SH SYNOPSIS
5.ft B
6.B turbostat
Len Browne23da032012-02-06 18:37:16 -05007.RB [ "\-s" ]
Len Brown103a8fe2010-10-22 23:53:03 -04008.RB [ "\-v" ]
9.RB [ "\-M MSR#" ]
10.RB command
11.br
12.B turbostat
Len Browne23da032012-02-06 18:37:16 -050013.RB [ "\-s" ]
Len Brown103a8fe2010-10-22 23:53:03 -040014.RB [ "\-v" ]
15.RB [ "\-M MSR#" ]
16.RB [ "\-i interval_sec" ]
17.SH DESCRIPTION
18\fBturbostat \fP reports processor topology, frequency
19and idle power state statistics on modern X86 processors.
20Either \fBcommand\fP is forked and statistics are printed
21upon its completion, or statistics are printed periodically.
22
23\fBturbostat \fP
24requires that the processor
25supports an "invariant" TSC, plus the APERF and MPERF MSRs.
26\fBturbostat \fP will report idle cpu power state residency
27on processors that additionally support C-state residency counters.
28
29.SS Options
Len Brownc98d5d92012-06-04 00:56:40 -040030The \fB-s\fP option limits output to a 1-line system summary for each interval.
31.PP
32The \fB-c\fP option limits output to the 1st thread in each core.
33.PP
34The \fB-p\fP option limits output to the 1st thread in each package.
Len Browne23da032012-02-06 18:37:16 -050035.PP
Len Brown103a8fe2010-10-22 23:53:03 -040036The \fB-v\fP option increases verbosity.
37.PP
38The \fB-M MSR#\fP option dumps the specified MSR,
39in addition to the usual frequency and idle statistics.
40.PP
41The \fB-i interval_sec\fP option prints statistics every \fiinterval_sec\fP seconds.
42The default is 5 seconds.
43.PP
44The \fBcommand\fP parameter forks \fBcommand\fP and upon its exit,
45displays the statistics gathered since it was forked.
46.PP
47.SH FIELD DESCRIPTIONS
48.nf
Arun Thomas9b6cf1a2011-08-17 00:34:14 +020049\fBpk\fP processor package number.
Len Browne23da032012-02-06 18:37:16 -050050\fBcor\fP processor core number.
Len Brown103a8fe2010-10-22 23:53:03 -040051\fBCPU\fP Linux CPU (logical processor) number.
Len Browne23da032012-02-06 18:37:16 -050052Note that multiple CPUs per core indicate support for Intel(R) Hyper-Threading Technology.
Len Brown103a8fe2010-10-22 23:53:03 -040053\fB%c0\fP percent of the interval that the CPU retired instructions.
54\fBGHz\fP average clock rate while the CPU was in c0 state.
55\fBTSC\fP average GHz that the TSC ran during the entire interval.
Len Browne23da032012-02-06 18:37:16 -050056\fB%c1, %c3, %c6, %c7\fP show the percentage residency in hardware core idle states.
57\fB%pc2, %pc3, %pc6, %pc7\fP percentage residency in hardware package idle states.
Len Brown103a8fe2010-10-22 23:53:03 -040058.fi
59.PP
60.SH EXAMPLE
61Without any parameters, turbostat prints out counters ever 5 seconds.
62(override interval with "-i sec" option, or specify a command
63for turbostat to fork).
64
Len Browne23da032012-02-06 18:37:16 -050065The first row of statistics is a summary for the entire system.
66Note that the summary is a weighted average.
Len Brown103a8fe2010-10-22 23:53:03 -040067Subsequent rows show per-CPU statistics.
68
69.nf
70[root@x980]# ./turbostat
Len Browne23da032012-02-06 18:37:16 -050071cor CPU %c0 GHz TSC %c1 %c3 %c6 %pc3 %pc6
Len Brownc98d5d92012-06-04 00:56:40 -040072 0.09 1.62 3.38 1.83 0.32 97.76 1.26 83.61
73 0 0 0.15 1.62 3.38 10.23 0.05 89.56 1.26 83.61
74 0 6 0.05 1.62 3.38 10.34
75 1 2 0.03 1.62 3.38 0.07 0.05 99.86
76 1 8 0.03 1.62 3.38 0.06
77 2 4 0.21 1.62 3.38 0.10 1.49 98.21
78 2 10 0.02 1.62 3.38 0.29
79 8 1 0.04 1.62 3.38 0.04 0.08 99.84
80 8 7 0.01 1.62 3.38 0.06
81 9 3 0.53 1.62 3.38 0.10 0.20 99.17
82 9 9 0.02 1.62 3.38 0.60
83 10 5 0.01 1.62 3.38 0.02 0.04 99.92
84 10 11 0.02 1.62 3.38 0.02
Len Browne23da032012-02-06 18:37:16 -050085.fi
86.SH SUMMARY EXAMPLE
87The "-s" option prints the column headers just once,
88and then the one line system summary for each sample interval.
89
90.nf
91[root@x980]# ./turbostat -s
92 %c0 GHz TSC %c1 %c3 %c6 %pc3 %pc6
Len Brownc98d5d92012-06-04 00:56:40 -040093 0.23 1.67 3.38 2.00 0.30 97.47 1.07 82.12
94 0.10 1.62 3.38 1.87 2.25 95.77 12.02 72.60
95 0.20 1.64 3.38 1.98 0.11 97.72 0.30 83.36
96 0.11 1.70 3.38 1.86 1.81 96.22 9.71 74.90
Len Brown103a8fe2010-10-22 23:53:03 -040097.fi
98.SH VERBOSE EXAMPLE
99The "-v" option adds verbosity to the output:
100
101.nf
102GenuineIntel 11 CPUID levels; family:model:stepping 0x6:2c:2 (6:44:2)
10312 * 133 = 1600 MHz max efficiency
10425 * 133 = 3333 MHz TSC frequency
10526 * 133 = 3467 MHz max turbo 4 active cores
10626 * 133 = 3467 MHz max turbo 3 active cores
10727 * 133 = 3600 MHz max turbo 2 active cores
10827 * 133 = 3600 MHz max turbo 1 active cores
109
110.fi
111The \fBmax efficiency\fP frequency, a.k.a. Low Frequency Mode, is the frequency
112available at the minimum package voltage. The \fBTSC frequency\fP is the nominal
113maximum frequency of the processor if turbo-mode were not available. This frequency
114should be sustainable on all CPUs indefinitely, given nominal power and cooling.
115The remaining rows show what maximum turbo frequency is possible
116depending on the number of idle cores. Note that this information is
117not available on all processors.
118.SH FORK EXAMPLE
119If turbostat is invoked with a command, it will fork that command
120and output the statistics gathered when the command exits.
121eg. Here a cycle soaker is run on 1 CPU (see %c0) for a few seconds
122until ^C while the other CPUs are mostly idle:
123
124.nf
125[root@x980 lenb]# ./turbostat cat /dev/zero > /dev/null
Len Browne23da032012-02-06 18:37:16 -0500126^C
127cor CPU %c0 GHz TSC %c1 %c3 %c6 %pc3 %pc6
Len Brownc98d5d92012-06-04 00:56:40 -0400128 8.86 3.61 3.38 15.06 31.19 44.89 0.00 0.00
129 0 0 1.46 3.22 3.38 16.84 29.48 52.22 0.00 0.00
130 0 6 0.21 3.06 3.38 18.09
131 1 2 0.53 3.33 3.38 2.80 46.40 50.27
132 1 8 0.89 3.47 3.38 2.44
133 2 4 1.36 3.43 3.38 9.04 23.71 65.89
134 2 10 0.18 2.86 3.38 10.22
135 8 1 0.04 2.87 3.38 99.96 0.01 0.00
136 8 7 99.72 3.63 3.38 0.27
137 9 3 0.31 3.21 3.38 7.64 56.55 35.50
138 9 9 0.08 2.95 3.38 7.88
139 10 5 1.42 3.43 3.38 2.14 30.99 65.44
140 10 11 0.16 2.88 3.38 3.40
Len Brown103a8fe2010-10-22 23:53:03 -0400141.fi
Len Brownc98d5d92012-06-04 00:56:40 -0400142Above the cycle soaker drives cpu7 up its 3.6 Ghz turbo limit
Len Brown103a8fe2010-10-22 23:53:03 -0400143while the other processors are generally in various states of idle.
144
Len Brownc98d5d92012-06-04 00:56:40 -0400145Note that cpu1 and cpu7 are HT siblings within core8.
146As cpu7 is very busy, it prevents its sibling, cpu1,
147from entering a c-state deeper than c1.
Len Brown103a8fe2010-10-22 23:53:03 -0400148
Len Brownc98d5d92012-06-04 00:56:40 -0400149Note that turbostat reports average GHz of 3.63, while
Len Browne23da032012-02-06 18:37:16 -0500150the arithmetic average of the GHz column above is lower.
Len Brown103a8fe2010-10-22 23:53:03 -0400151This is a weighted average, where the weight is %c0. ie. it is the total number of
152un-halted cycles elapsed per time divided by the number of CPUs.
153.SH NOTES
154
155.B "turbostat "
156must be run as root.
157
158.B "turbostat "
159reads hardware counters, but doesn't write them.
160So it will not interfere with the OS or other programs, including
161multiple invocations of itself.
162
163\fBturbostat \fP
164may work poorly on Linux-2.6.20 through 2.6.29,
165as \fBacpi-cpufreq \fPperiodically cleared the APERF and MPERF
166in those kernels.
167
168The APERF, MPERF MSRs are defined to count non-halted cycles.
169Although it is not guaranteed by the architecture, turbostat assumes
170that they count at TSC rate, which is true on all processors tested to date.
171
172.SH REFERENCES
173"Intel® Turbo Boost Technology
174in Intel® Core™ Microarchitecture (Nehalem) Based Processors"
175http://download.intel.com/design/processor/applnots/320354.pdf
176
177"Intel® 64 and IA-32 Architectures Software Developer's Manual
178Volume 3B: System Programming Guide"
179http://www.intel.com/products/processor/manuals/
180
181.SH FILES
182.ta
183.nf
184/dev/cpu/*/msr
185.fi
186
187.SH "SEE ALSO"
188msr(4), vmstat(8)
189.PP
Len Browne23da032012-02-06 18:37:16 -0500190.SH AUTHOR
Len Brown103a8fe2010-10-22 23:53:03 -0400191.nf
192Written by Len Brown <len.brown@intel.com>