blob: bb1c52864f138401ec0fc2fafa917adb6a804b69 [file] [log] [blame]
Liviu Dudauad49f862016-03-07 10:00:53 +00001/*
2 * (C) COPYRIGHT 2016 ARM Limited. All rights reserved.
3 * Author: Liviu Dudau <Liviu.Dudau@arm.com>
4 *
5 * This program is free software and is provided to you under the terms of the
6 * GNU General Public License version 2 as published by the Free Software
7 * Foundation, and any use by you of this program is subject to the terms
8 * of such GNU licence.
9 *
10 * ARM Mali DP plane manipulation routines.
11 */
12
13#include <drm/drmP.h>
14#include <drm/drm_atomic_helper.h>
15#include <drm/drm_fb_cma_helper.h>
16#include <drm/drm_gem_cma_helper.h>
17#include <drm/drm_plane_helper.h>
18
19#include "malidp_hw.h"
20#include "malidp_drv.h"
21
22/* Layer specific register offsets */
23#define MALIDP_LAYER_FORMAT 0x000
24#define MALIDP_LAYER_CONTROL 0x004
25#define LAYER_ENABLE (1 << 0)
26#define LAYER_ROT_OFFSET 8
27#define LAYER_H_FLIP (1 << 10)
28#define LAYER_V_FLIP (1 << 11)
29#define LAYER_ROT_MASK (0xf << 8)
Brian Starkeyc57eb712016-10-11 15:26:08 +010030#define LAYER_COMP_MASK (0x3 << 12)
31#define LAYER_COMP_PIXEL (0x3 << 12)
32#define LAYER_COMP_PLANE (0x2 << 12)
33#define MALIDP_LAYER_COMPOSE 0x008
Liviu Dudauad49f862016-03-07 10:00:53 +000034#define MALIDP_LAYER_SIZE 0x00c
35#define LAYER_H_VAL(x) (((x) & 0x1fff) << 0)
36#define LAYER_V_VAL(x) (((x) & 0x1fff) << 16)
37#define MALIDP_LAYER_COMP_SIZE 0x010
38#define MALIDP_LAYER_OFFSET 0x014
39#define MALIDP_LAYER_STRIDE 0x018
40
Brian Starkeyc57eb712016-10-11 15:26:08 +010041/*
42 * This 4-entry look-up-table is used to determine the full 8-bit alpha value
43 * for formats with 1- or 2-bit alpha channels.
44 * We set it to give 100%/0% opacity for 1-bit formats and 100%/66%/33%/0%
45 * opacity for 2-bit formats.
46 */
47#define MALIDP_ALPHA_LUT 0xffaa5500
48
Liviu Dudauad49f862016-03-07 10:00:53 +000049static void malidp_de_plane_destroy(struct drm_plane *plane)
50{
51 struct malidp_plane *mp = to_malidp_plane(plane);
52
53 if (mp->base.fb)
54 drm_framebuffer_unreference(mp->base.fb);
55
56 drm_plane_helper_disable(plane);
57 drm_plane_cleanup(plane);
58 devm_kfree(plane->dev->dev, mp);
59}
60
61struct drm_plane_state *malidp_duplicate_plane_state(struct drm_plane *plane)
62{
63 struct malidp_plane_state *state, *m_state;
64
65 if (!plane->state)
66 return NULL;
67
68 state = kmalloc(sizeof(*state), GFP_KERNEL);
69 if (state) {
70 m_state = to_malidp_plane_state(plane->state);
71 __drm_atomic_helper_plane_duplicate_state(plane, &state->base);
72 state->rotmem_size = m_state->rotmem_size;
Brian Starkey70c94a32016-10-11 15:26:09 +010073 state->format = m_state->format;
74 state->n_planes = m_state->n_planes;
Liviu Dudauad49f862016-03-07 10:00:53 +000075 }
76
77 return &state->base;
78}
79
80void malidp_destroy_plane_state(struct drm_plane *plane,
81 struct drm_plane_state *state)
82{
83 struct malidp_plane_state *m_state = to_malidp_plane_state(state);
84
85 __drm_atomic_helper_plane_destroy_state(state);
86 kfree(m_state);
87}
88
89static const struct drm_plane_funcs malidp_de_plane_funcs = {
90 .update_plane = drm_atomic_helper_update_plane,
91 .disable_plane = drm_atomic_helper_disable_plane,
92 .destroy = malidp_de_plane_destroy,
93 .reset = drm_atomic_helper_plane_reset,
94 .atomic_duplicate_state = malidp_duplicate_plane_state,
95 .atomic_destroy_state = malidp_destroy_plane_state,
96};
97
98static int malidp_de_plane_check(struct drm_plane *plane,
99 struct drm_plane_state *state)
100{
101 struct malidp_plane *mp = to_malidp_plane(plane);
102 struct malidp_plane_state *ms = to_malidp_plane_state(state);
Brian Starkeya46a0962016-10-11 15:26:05 +0100103 struct drm_framebuffer *fb;
Brian Starkey70c94a32016-10-11 15:26:09 +0100104 int i;
Liviu Dudauad49f862016-03-07 10:00:53 +0000105 u32 src_w, src_h;
106
107 if (!state->crtc || !state->fb)
108 return 0;
109
Brian Starkeya46a0962016-10-11 15:26:05 +0100110 fb = state->fb;
111
Brian Starkey70c94a32016-10-11 15:26:09 +0100112 ms->format = malidp_hw_get_format_id(&mp->hwdev->map, mp->layer->id,
Brian Starkeya46a0962016-10-11 15:26:05 +0100113 fb->pixel_format);
Brian Starkey70c94a32016-10-11 15:26:09 +0100114 if (ms->format == MALIDP_INVALID_FORMAT_ID)
Liviu Dudauad49f862016-03-07 10:00:53 +0000115 return -EINVAL;
116
Brian Starkey70c94a32016-10-11 15:26:09 +0100117 ms->n_planes = drm_format_num_planes(fb->pixel_format);
118 for (i = 0; i < ms->n_planes; i++) {
Brian Starkeya46a0962016-10-11 15:26:05 +0100119 if (!malidp_hw_pitch_valid(mp->hwdev, fb->pitches[i])) {
120 DRM_DEBUG_KMS("Invalid pitch %u for plane %d\n",
121 fb->pitches[i], i);
122 return -EINVAL;
123 }
124 }
125
Liviu Dudauad49f862016-03-07 10:00:53 +0000126 src_w = state->src_w >> 16;
127 src_h = state->src_h >> 16;
128
129 if ((state->crtc_w > mp->hwdev->max_line_size) ||
130 (state->crtc_h > mp->hwdev->max_line_size) ||
131 (state->crtc_w < mp->hwdev->min_line_size) ||
132 (state->crtc_h < mp->hwdev->min_line_size) ||
133 (state->crtc_w != src_w) || (state->crtc_h != src_h))
134 return -EINVAL;
135
136 /* packed RGB888 / BGR888 can't be rotated or flipped */
Joonas Lahtinen31ad61e2016-07-29 08:50:05 +0300137 if (state->rotation != DRM_ROTATE_0 &&
Liviu Dudauad49f862016-03-07 10:00:53 +0000138 (state->fb->pixel_format == DRM_FORMAT_RGB888 ||
139 state->fb->pixel_format == DRM_FORMAT_BGR888))
140 return -EINVAL;
141
142 ms->rotmem_size = 0;
143 if (state->rotation & MALIDP_ROTATED_MASK) {
144 int val;
145
146 val = mp->hwdev->rotmem_required(mp->hwdev, state->crtc_h,
147 state->crtc_w,
148 state->fb->pixel_format);
149 if (val < 0)
150 return val;
151
152 ms->rotmem_size = val;
153 }
154
155 return 0;
156}
157
158static void malidp_de_plane_update(struct drm_plane *plane,
159 struct drm_plane_state *old_state)
160{
161 struct drm_gem_cma_object *obj;
162 struct malidp_plane *mp;
163 const struct malidp_hw_regmap *map;
Brian Starkey70c94a32016-10-11 15:26:09 +0100164 struct malidp_plane_state *ms = to_malidp_plane_state(plane->state);
Liviu Dudauad49f862016-03-07 10:00:53 +0000165 u16 ptr;
Brian Starkey70c94a32016-10-11 15:26:09 +0100166 u32 src_w, src_h, dest_w, dest_h, val;
167 int i;
Liviu Dudauad49f862016-03-07 10:00:53 +0000168
169 mp = to_malidp_plane(plane);
Liviu Dudauad49f862016-03-07 10:00:53 +0000170 map = &mp->hwdev->map;
Liviu Dudauad49f862016-03-07 10:00:53 +0000171
172 /* convert src values from Q16 fixed point to integer */
173 src_w = plane->state->src_w >> 16;
174 src_h = plane->state->src_h >> 16;
175 if (plane->state->rotation & MALIDP_ROTATED_MASK) {
176 dest_w = plane->state->crtc_h;
177 dest_h = plane->state->crtc_w;
178 } else {
179 dest_w = plane->state->crtc_w;
180 dest_h = plane->state->crtc_h;
181 }
182
Brian Starkey70c94a32016-10-11 15:26:09 +0100183 malidp_hw_write(mp->hwdev, ms->format, mp->layer->base);
Liviu Dudauad49f862016-03-07 10:00:53 +0000184
Brian Starkey70c94a32016-10-11 15:26:09 +0100185 for (i = 0; i < ms->n_planes; i++) {
Liviu Dudauad49f862016-03-07 10:00:53 +0000186 /* calculate the offset for the layer's plane registers */
187 ptr = mp->layer->ptr + (i << 4);
188
189 obj = drm_fb_cma_get_gem_obj(plane->state->fb, i);
190 malidp_hw_write(mp->hwdev, lower_32_bits(obj->paddr), ptr);
191 malidp_hw_write(mp->hwdev, upper_32_bits(obj->paddr), ptr + 4);
192 malidp_hw_write(mp->hwdev, plane->state->fb->pitches[i],
193 mp->layer->base + MALIDP_LAYER_STRIDE);
194 }
195
196 malidp_hw_write(mp->hwdev, LAYER_H_VAL(src_w) | LAYER_V_VAL(src_h),
197 mp->layer->base + MALIDP_LAYER_SIZE);
198
199 malidp_hw_write(mp->hwdev, LAYER_H_VAL(dest_w) | LAYER_V_VAL(dest_h),
200 mp->layer->base + MALIDP_LAYER_COMP_SIZE);
201
202 malidp_hw_write(mp->hwdev, LAYER_H_VAL(plane->state->crtc_x) |
203 LAYER_V_VAL(plane->state->crtc_y),
204 mp->layer->base + MALIDP_LAYER_OFFSET);
205
Brian Starkeyc57eb712016-10-11 15:26:08 +0100206 /* first clear the rotation bits */
207 val = malidp_hw_read(mp->hwdev, mp->layer->base + MALIDP_LAYER_CONTROL);
208 val &= ~LAYER_ROT_MASK;
Liviu Dudauad49f862016-03-07 10:00:53 +0000209
210 /* setup the rotation and axis flip bits */
211 if (plane->state->rotation & DRM_ROTATE_MASK)
212 val = ilog2(plane->state->rotation & DRM_ROTATE_MASK) << LAYER_ROT_OFFSET;
Joonas Lahtinen31ad61e2016-07-29 08:50:05 +0300213 if (plane->state->rotation & DRM_REFLECT_X)
Liviu Dudauad49f862016-03-07 10:00:53 +0000214 val |= LAYER_V_FLIP;
Joonas Lahtinen31ad61e2016-07-29 08:50:05 +0300215 if (plane->state->rotation & DRM_REFLECT_Y)
Liviu Dudauad49f862016-03-07 10:00:53 +0000216 val |= LAYER_H_FLIP;
217
Brian Starkeyc57eb712016-10-11 15:26:08 +0100218 /*
219 * always enable pixel alpha blending until we have a way to change
220 * blend modes
221 */
222 val &= ~LAYER_COMP_MASK;
223 val |= LAYER_COMP_PIXEL;
224
Liviu Dudauad49f862016-03-07 10:00:53 +0000225 /* set the 'enable layer' bit */
226 val |= LAYER_ENABLE;
227
Brian Starkeyc57eb712016-10-11 15:26:08 +0100228 malidp_hw_write(mp->hwdev, val,
229 mp->layer->base + MALIDP_LAYER_CONTROL);
Liviu Dudauad49f862016-03-07 10:00:53 +0000230}
231
232static void malidp_de_plane_disable(struct drm_plane *plane,
233 struct drm_plane_state *state)
234{
235 struct malidp_plane *mp = to_malidp_plane(plane);
236
237 malidp_hw_clearbits(mp->hwdev, LAYER_ENABLE,
238 mp->layer->base + MALIDP_LAYER_CONTROL);
239}
240
241static const struct drm_plane_helper_funcs malidp_de_plane_helper_funcs = {
242 .atomic_check = malidp_de_plane_check,
243 .atomic_update = malidp_de_plane_update,
244 .atomic_disable = malidp_de_plane_disable,
245};
246
247int malidp_de_planes_init(struct drm_device *drm)
248{
249 struct malidp_drm *malidp = drm->dev_private;
250 const struct malidp_hw_regmap *map = &malidp->dev->map;
251 struct malidp_plane *plane = NULL;
252 enum drm_plane_type plane_type;
253 unsigned long crtcs = 1 << drm->mode_config.num_crtc;
Brian Starkey15807782016-10-11 15:26:07 +0100254 unsigned long flags = DRM_ROTATE_0 | DRM_ROTATE_90 | DRM_ROTATE_180 |
255 DRM_ROTATE_270 | DRM_REFLECT_X | DRM_REFLECT_Y;
Liviu Dudauad49f862016-03-07 10:00:53 +0000256 u32 *formats;
257 int ret, i, j, n;
258
259 formats = kcalloc(map->n_input_formats, sizeof(*formats), GFP_KERNEL);
260 if (!formats) {
261 ret = -ENOMEM;
262 goto cleanup;
263 }
264
265 for (i = 0; i < map->n_layers; i++) {
266 u8 id = map->layers[i].id;
267
268 plane = kzalloc(sizeof(*plane), GFP_KERNEL);
269 if (!plane) {
270 ret = -ENOMEM;
271 goto cleanup;
272 }
273
274 /* build the list of DRM supported formats based on the map */
275 for (n = 0, j = 0; j < map->n_input_formats; j++) {
276 if ((map->input_formats[j].layer & id) == id)
277 formats[n++] = map->input_formats[j].format;
278 }
279
280 plane_type = (i == 0) ? DRM_PLANE_TYPE_PRIMARY :
281 DRM_PLANE_TYPE_OVERLAY;
282 ret = drm_universal_plane_init(drm, &plane->base, crtcs,
283 &malidp_de_plane_funcs, formats,
284 n, plane_type, NULL);
285 if (ret < 0)
286 goto cleanup;
287
Liviu Dudauad49f862016-03-07 10:00:53 +0000288 drm_plane_helper_add(&plane->base,
289 &malidp_de_plane_helper_funcs);
290 plane->hwdev = malidp->dev;
291 plane->layer = &map->layers[i];
Brian Starkey15807782016-10-11 15:26:07 +0100292
293 /* Skip the features which the SMART layer doesn't have */
294 if (id == DE_SMART)
295 continue;
296
297 drm_plane_create_rotation_property(&plane->base, DRM_ROTATE_0, flags);
Brian Starkeyc57eb712016-10-11 15:26:08 +0100298 malidp_hw_write(malidp->dev, MALIDP_ALPHA_LUT,
299 plane->layer->base + MALIDP_LAYER_COMPOSE);
Liviu Dudauad49f862016-03-07 10:00:53 +0000300 }
301
302 kfree(formats);
303
304 return 0;
305
306cleanup:
307 malidp_de_planes_destroy(drm);
308 kfree(formats);
309
310 return ret;
311}
312
313void malidp_de_planes_destroy(struct drm_device *drm)
314{
315 struct drm_plane *p, *pt;
316
317 list_for_each_entry_safe(p, pt, &drm->mode_config.plane_list, head) {
318 drm_plane_cleanup(p);
319 kfree(p);
320 }
321}