blob: f6423a139ca074a60909db7d369c42eb34394c27 [file] [log] [blame]
Yuval Mintzfe56b9e2015-10-26 11:02:25 +02001/* QLogic qed NIC Driver
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02002 * Copyright (c) 2015-2017 QLogic Corporation
Yuval Mintzfe56b9e2015-10-26 11:02:25 +02003 *
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02004 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020031 */
32
33#include <linux/types.h>
34#include <asm/byteorder.h>
35#include <linux/io.h>
36#include <linux/delay.h>
37#include <linux/dma-mapping.h>
38#include <linux/errno.h>
39#include <linux/kernel.h>
40#include <linux/list.h>
41#include <linux/pci.h>
42#include <linux/slab.h>
43#include <linux/spinlock.h>
44#include <linux/string.h>
45#include "qed.h"
46#include "qed_cxt.h"
47#include "qed_dev_api.h"
48#include "qed_hsi.h"
49#include "qed_hw.h"
50#include "qed_int.h"
Yuval Mintzfc831822016-12-01 00:21:06 -080051#include "qed_iscsi.h"
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020052#include "qed_mcp.h"
Yuval Mintz1d6cff42016-12-01 00:21:07 -080053#include "qed_ooo.h"
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020054#include "qed_reg_addr.h"
55#include "qed_sp.h"
Yuval Mintz37bff2b2016-05-11 16:36:13 +030056#include "qed_sriov.h"
Ram Amrani51ff1722016-10-01 21:59:57 +030057#include "qed_roce.h"
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020058
59/***************************************************************************
60* Structures & Definitions
61***************************************************************************/
62
63#define SPQ_HIGH_PRI_RESERVE_DEFAULT (1)
Yuval Mintzc59f52912016-10-14 05:19:21 -040064
65#define SPQ_BLOCK_DELAY_MAX_ITER (10)
66#define SPQ_BLOCK_DELAY_US (10)
67#define SPQ_BLOCK_SLEEP_MAX_ITER (1000)
68#define SPQ_BLOCK_SLEEP_MS (5)
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020069
70/***************************************************************************
71* Blocking Imp. (BLOCK/EBLOCK mode)
72***************************************************************************/
73static void qed_spq_blocking_cb(struct qed_hwfn *p_hwfn,
74 void *cookie,
Yuval Mintz1a635e42016-08-15 10:42:43 +030075 union event_ring_data *data, u8 fw_return_code)
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020076{
77 struct qed_spq_comp_done *comp_done;
78
79 comp_done = (struct qed_spq_comp_done *)cookie;
80
Manish Choprad5df7682016-10-14 05:19:23 -040081 comp_done->fw_return_code = fw_return_code;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020082
Manish Choprad5df7682016-10-14 05:19:23 -040083 /* Make sure completion done is visible on waiting thread */
84 smp_store_release(&comp_done->done, 0x1);
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020085}
86
Yuval Mintzc59f52912016-10-14 05:19:21 -040087static int __qed_spq_block(struct qed_hwfn *p_hwfn,
88 struct qed_spq_entry *p_ent,
89 u8 *p_fw_ret, bool sleep_between_iter)
90{
91 struct qed_spq_comp_done *comp_done;
92 u32 iter_cnt;
93
94 comp_done = (struct qed_spq_comp_done *)p_ent->comp_cb.cookie;
95 iter_cnt = sleep_between_iter ? SPQ_BLOCK_SLEEP_MAX_ITER
96 : SPQ_BLOCK_DELAY_MAX_ITER;
97
98 while (iter_cnt--) {
99 /* Validate we receive completion update */
Manish Choprad5df7682016-10-14 05:19:23 -0400100 if (READ_ONCE(comp_done->done) == 1) {
101 /* Read updated FW return value */
102 smp_read_barrier_depends();
Yuval Mintzc59f52912016-10-14 05:19:21 -0400103 if (p_fw_ret)
104 *p_fw_ret = comp_done->fw_return_code;
105 return 0;
106 }
107
108 if (sleep_between_iter)
109 msleep(SPQ_BLOCK_SLEEP_MS);
110 else
111 udelay(SPQ_BLOCK_DELAY_US);
112 }
113
114 return -EBUSY;
115}
116
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200117static int qed_spq_block(struct qed_hwfn *p_hwfn,
118 struct qed_spq_entry *p_ent,
Yuval Mintzc59f52912016-10-14 05:19:21 -0400119 u8 *p_fw_ret, bool skip_quick_poll)
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200120{
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200121 struct qed_spq_comp_done *comp_done;
Rahul Verma15582962017-04-06 15:58:29 +0300122 struct qed_ptt *p_ptt;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200123 int rc;
124
Yuval Mintzc59f52912016-10-14 05:19:21 -0400125 /* A relatively short polling period w/o sleeping, to allow the FW to
126 * complete the ramrod and thus possibly to avoid the following sleeps.
127 */
128 if (!skip_quick_poll) {
129 rc = __qed_spq_block(p_hwfn, p_ent, p_fw_ret, false);
130 if (!rc)
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200131 return 0;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200132 }
133
Yuval Mintzc59f52912016-10-14 05:19:21 -0400134 /* Move to polling with a sleeping period between iterations */
135 rc = __qed_spq_block(p_hwfn, p_ent, p_fw_ret, true);
136 if (!rc)
137 return 0;
138
Rahul Verma15582962017-04-06 15:58:29 +0300139 p_ptt = qed_ptt_acquire(p_hwfn);
140 if (!p_ptt) {
141 DP_NOTICE(p_hwfn, "ptt, failed to acquire\n");
142 return -EAGAIN;
143 }
144
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200145 DP_INFO(p_hwfn, "Ramrod is stuck, requesting MCP drain\n");
Rahul Verma15582962017-04-06 15:58:29 +0300146 rc = qed_mcp_drain(p_hwfn, p_ptt);
Yuval Mintzc59f52912016-10-14 05:19:21 -0400147 if (rc) {
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200148 DP_NOTICE(p_hwfn, "MCP drain failed\n");
Yuval Mintzc59f52912016-10-14 05:19:21 -0400149 goto err;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200150 }
151
Yuval Mintzc59f52912016-10-14 05:19:21 -0400152 /* Retry after drain */
153 rc = __qed_spq_block(p_hwfn, p_ent, p_fw_ret, true);
154 if (!rc)
Rahul Verma15582962017-04-06 15:58:29 +0300155 goto out;
Yuval Mintzc59f52912016-10-14 05:19:21 -0400156
157 comp_done = (struct qed_spq_comp_done *)p_ent->comp_cb.cookie;
Rahul Verma15582962017-04-06 15:58:29 +0300158 if (comp_done->done == 1)
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200159 if (p_fw_ret)
160 *p_fw_ret = comp_done->fw_return_code;
Rahul Verma15582962017-04-06 15:58:29 +0300161out:
162 qed_ptt_release(p_hwfn, p_ptt);
163 return 0;
164
Yuval Mintzc59f52912016-10-14 05:19:21 -0400165err:
Rahul Verma15582962017-04-06 15:58:29 +0300166 qed_ptt_release(p_hwfn, p_ptt);
Yuval Mintzc59f52912016-10-14 05:19:21 -0400167 DP_NOTICE(p_hwfn,
168 "Ramrod is stuck [CID %08x cmd %02x protocol %02x echo %04x]\n",
169 le32_to_cpu(p_ent->elem.hdr.cid),
170 p_ent->elem.hdr.cmd_id,
171 p_ent->elem.hdr.protocol_id,
172 le16_to_cpu(p_ent->elem.hdr.echo));
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200173
174 return -EBUSY;
175}
176
177/***************************************************************************
178* SPQ entries inner API
179***************************************************************************/
Yuval Mintz1a635e42016-08-15 10:42:43 +0300180static int qed_spq_fill_entry(struct qed_hwfn *p_hwfn,
181 struct qed_spq_entry *p_ent)
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200182{
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200183 p_ent->flags = 0;
184
185 switch (p_ent->comp_mode) {
186 case QED_SPQ_MODE_EBLOCK:
187 case QED_SPQ_MODE_BLOCK:
188 p_ent->comp_cb.function = qed_spq_blocking_cb;
189 break;
190 case QED_SPQ_MODE_CB:
191 break;
192 default:
193 DP_NOTICE(p_hwfn, "Unknown SPQE completion mode %d\n",
194 p_ent->comp_mode);
195 return -EINVAL;
196 }
197
198 DP_VERBOSE(p_hwfn, QED_MSG_SPQ,
199 "Ramrod header: [CID 0x%08x CMD 0x%02x protocol 0x%02x] Data pointer: [%08x:%08x] Completion Mode: %s\n",
200 p_ent->elem.hdr.cid,
201 p_ent->elem.hdr.cmd_id,
202 p_ent->elem.hdr.protocol_id,
203 p_ent->elem.data_ptr.hi,
204 p_ent->elem.data_ptr.lo,
205 D_TRINE(p_ent->comp_mode, QED_SPQ_MODE_EBLOCK,
206 QED_SPQ_MODE_BLOCK, "MODE_EBLOCK", "MODE_BLOCK",
207 "MODE_CB"));
208
209 return 0;
210}
211
212/***************************************************************************
213* HSI access
214***************************************************************************/
215static void qed_spq_hw_initialize(struct qed_hwfn *p_hwfn,
216 struct qed_spq *p_spq)
217{
Ariel Eliorb5a9ee72017-04-03 12:21:09 +0300218 struct core_conn_context *p_cxt;
219 struct qed_cxt_info cxt_info;
220 u16 physical_q;
221 int rc;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200222
223 cxt_info.iid = p_spq->cid;
224
225 rc = qed_cxt_get_cid_info(p_hwfn, &cxt_info);
226
227 if (rc < 0) {
228 DP_NOTICE(p_hwfn, "Cannot find context info for cid=%d\n",
229 p_spq->cid);
230 return;
231 }
232
233 p_cxt = cxt_info.p_cxt;
234
235 SET_FIELD(p_cxt->xstorm_ag_context.flags10,
236 XSTORM_CORE_CONN_AG_CTX_DQ_CF_EN, 1);
237 SET_FIELD(p_cxt->xstorm_ag_context.flags1,
238 XSTORM_CORE_CONN_AG_CTX_DQ_CF_ACTIVE, 1);
239 SET_FIELD(p_cxt->xstorm_ag_context.flags9,
240 XSTORM_CORE_CONN_AG_CTX_CONSOLID_PROD_CF_EN, 1);
241
242 /* QM physical queue */
Ariel Eliorb5a9ee72017-04-03 12:21:09 +0300243 physical_q = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LB);
244 p_cxt->xstorm_ag_context.physical_q0 = cpu_to_le16(physical_q);
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200245
246 p_cxt->xstorm_st_context.spq_base_lo =
247 DMA_LO_LE(p_spq->chain.p_phys_addr);
248 p_cxt->xstorm_st_context.spq_base_hi =
249 DMA_HI_LE(p_spq->chain.p_phys_addr);
250
Yuval Mintz94494592016-02-21 11:40:10 +0200251 DMA_REGPAIR_LE(p_cxt->xstorm_st_context.consolid_base_addr,
252 p_hwfn->p_consq->chain.p_phys_addr);
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200253}
254
255static int qed_spq_hw_post(struct qed_hwfn *p_hwfn,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300256 struct qed_spq *p_spq, struct qed_spq_entry *p_ent)
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200257{
Tomer Tayar76a9a362015-12-07 06:25:57 -0500258 struct qed_chain *p_chain = &p_hwfn->p_spq->chain;
259 u16 echo = qed_chain_get_prod_idx(p_chain);
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200260 struct slow_path_element *elem;
261 struct core_db_data db;
262
Tomer Tayar76a9a362015-12-07 06:25:57 -0500263 p_ent->elem.hdr.echo = cpu_to_le16(echo);
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200264 elem = qed_chain_produce(p_chain);
265 if (!elem) {
266 DP_NOTICE(p_hwfn, "Failed to produce from SPQ chain\n");
267 return -EINVAL;
268 }
269
270 *elem = p_ent->elem; /* struct assignment */
271
272 /* send a doorbell on the slow hwfn session */
273 memset(&db, 0, sizeof(db));
274 SET_FIELD(db.params, CORE_DB_DATA_DEST, DB_DEST_XCM);
275 SET_FIELD(db.params, CORE_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
276 SET_FIELD(db.params, CORE_DB_DATA_AGG_VAL_SEL,
277 DQ_XCM_CORE_SPQ_PROD_CMD);
278 db.agg_flags = DQ_XCM_CORE_DQ_CF_CMD;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200279 db.spq_prod = cpu_to_le16(qed_chain_get_prod_idx(p_chain));
280
Sudarsana Reddy Kalluru34c7bb42016-06-28 07:46:03 -0400281 /* make sure the SPQE is updated before the doorbell */
282 wmb();
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200283
284 DOORBELL(p_hwfn, qed_db_addr(p_spq->cid, DQ_DEMS_LEGACY), *(u32 *)&db);
285
286 /* make sure doorbell is rang */
Sudarsana Reddy Kalluru34c7bb42016-06-28 07:46:03 -0400287 wmb();
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200288
289 DP_VERBOSE(p_hwfn, QED_MSG_SPQ,
290 "Doorbelled [0x%08x, CID 0x%08x] with Flags: %02x agg_params: %02x, prod: %04x\n",
291 qed_db_addr(p_spq->cid, DQ_DEMS_LEGACY),
292 p_spq->cid, db.params, db.agg_flags,
293 qed_chain_get_prod_idx(p_chain));
294
295 return 0;
296}
297
298/***************************************************************************
299* Asynchronous events
300***************************************************************************/
301static int
302qed_async_event_completion(struct qed_hwfn *p_hwfn,
303 struct event_ring_entry *p_eqe)
304{
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300305 switch (p_eqe->protocol_id) {
Mintz, Yuvalbe086e72017-03-11 18:39:18 +0200306#if IS_ENABLED(CONFIG_QED_RDMA)
Ram Amrani51ff1722016-10-01 21:59:57 +0300307 case PROTOCOLID_ROCE:
Mintz, Yuvalbe086e72017-03-11 18:39:18 +0200308 qed_roce_async_event(p_hwfn, p_eqe->opcode,
309 &p_eqe->data.rdma_data);
Ram Amrani51ff1722016-10-01 21:59:57 +0300310 return 0;
Mintz, Yuvalbe086e72017-03-11 18:39:18 +0200311#endif
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300312 case PROTOCOLID_COMMON:
313 return qed_sriov_eqe_event(p_hwfn,
314 p_eqe->opcode,
315 p_eqe->echo, &p_eqe->data);
Yuval Mintzfc831822016-12-01 00:21:06 -0800316 case PROTOCOLID_ISCSI:
317 if (!IS_ENABLED(CONFIG_QED_ISCSI))
318 return -EINVAL;
319
320 if (p_hwfn->p_iscsi_info->event_cb) {
321 struct qed_iscsi_info *p_iscsi = p_hwfn->p_iscsi_info;
322
323 return p_iscsi->event_cb(p_iscsi->event_context,
324 p_eqe->opcode, &p_eqe->data);
325 } else {
326 DP_NOTICE(p_hwfn,
327 "iSCSI async completion is not set\n");
328 return -EINVAL;
329 }
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300330 default:
331 DP_NOTICE(p_hwfn,
332 "Unknown Async completion for protocol: %d\n",
333 p_eqe->protocol_id);
334 return -EINVAL;
335 }
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200336}
337
338/***************************************************************************
339* EQ API
340***************************************************************************/
Yuval Mintz1a635e42016-08-15 10:42:43 +0300341void qed_eq_prod_update(struct qed_hwfn *p_hwfn, u16 prod)
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200342{
343 u32 addr = GTT_BAR0_MAP_REG_USDM_RAM +
344 USTORM_EQE_CONS_OFFSET(p_hwfn->rel_pf_id);
345
346 REG_WR16(p_hwfn, addr, prod);
347
348 /* keep prod updates ordered */
349 mmiowb();
350}
351
Yuval Mintz1a635e42016-08-15 10:42:43 +0300352int qed_eq_completion(struct qed_hwfn *p_hwfn, void *cookie)
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200353{
354 struct qed_eq *p_eq = cookie;
355 struct qed_chain *p_chain = &p_eq->chain;
356 int rc = 0;
357
358 /* take a snapshot of the FW consumer */
359 u16 fw_cons_idx = le16_to_cpu(*p_eq->p_fw_cons);
360
361 DP_VERBOSE(p_hwfn, QED_MSG_SPQ, "fw_cons_idx %x\n", fw_cons_idx);
362
363 /* Need to guarantee the fw_cons index we use points to a usuable
364 * element (to comply with our chain), so our macros would comply
365 */
366 if ((fw_cons_idx & qed_chain_get_usable_per_page(p_chain)) ==
367 qed_chain_get_usable_per_page(p_chain))
368 fw_cons_idx += qed_chain_get_unusable_per_page(p_chain);
369
370 /* Complete current segment of eq entries */
371 while (fw_cons_idx != qed_chain_get_cons_idx(p_chain)) {
372 struct event_ring_entry *p_eqe = qed_chain_consume(p_chain);
373
374 if (!p_eqe) {
375 rc = -EINVAL;
376 break;
377 }
378
379 DP_VERBOSE(p_hwfn, QED_MSG_SPQ,
380 "op %x prot %x res0 %x echo %x fwret %x flags %x\n",
381 p_eqe->opcode,
382 p_eqe->protocol_id,
383 p_eqe->reserved0,
384 le16_to_cpu(p_eqe->echo),
385 p_eqe->fw_return_code,
386 p_eqe->flags);
387
388 if (GET_FIELD(p_eqe->flags, EVENT_RING_ENTRY_ASYNC)) {
389 if (qed_async_event_completion(p_hwfn, p_eqe))
390 rc = -EINVAL;
391 } else if (qed_spq_completion(p_hwfn,
392 p_eqe->echo,
393 p_eqe->fw_return_code,
394 &p_eqe->data)) {
395 rc = -EINVAL;
396 }
397
398 qed_chain_recycle_consumed(p_chain);
399 }
400
401 qed_eq_prod_update(p_hwfn, qed_chain_get_prod_idx(p_chain));
402
403 return rc;
404}
405
Yuval Mintz1a635e42016-08-15 10:42:43 +0300406struct qed_eq *qed_eq_alloc(struct qed_hwfn *p_hwfn, u16 num_elem)
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200407{
408 struct qed_eq *p_eq;
409
410 /* Allocate EQ struct */
Yuval Mintz60fffb32016-02-21 11:40:07 +0200411 p_eq = kzalloc(sizeof(*p_eq), GFP_KERNEL);
Joe Perches2591c282016-09-04 14:24:03 -0700412 if (!p_eq)
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200413 return NULL;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200414
415 /* Allocate and initialize EQ chain*/
416 if (qed_chain_alloc(p_hwfn->cdev,
417 QED_CHAIN_USE_TO_PRODUCE,
418 QED_CHAIN_MODE_PBL,
Yuval Mintza91eb522016-06-03 14:35:32 +0300419 QED_CHAIN_CNT_TYPE_U16,
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200420 num_elem,
421 sizeof(union event_ring_element),
Joe Perches2591c282016-09-04 14:24:03 -0700422 &p_eq->chain))
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200423 goto eq_allocate_fail;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200424
425 /* register EQ completion on the SP SB */
Yuval Mintz1a635e42016-08-15 10:42:43 +0300426 qed_int_register_cb(p_hwfn, qed_eq_completion,
427 p_eq, &p_eq->eq_sb_index, &p_eq->p_fw_cons);
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200428
429 return p_eq;
430
431eq_allocate_fail:
432 qed_eq_free(p_hwfn, p_eq);
433 return NULL;
434}
435
Yuval Mintz1a635e42016-08-15 10:42:43 +0300436void qed_eq_setup(struct qed_hwfn *p_hwfn, struct qed_eq *p_eq)
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200437{
438 qed_chain_reset(&p_eq->chain);
439}
440
Yuval Mintz1a635e42016-08-15 10:42:43 +0300441void qed_eq_free(struct qed_hwfn *p_hwfn, struct qed_eq *p_eq)
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200442{
443 if (!p_eq)
444 return;
445 qed_chain_free(p_hwfn->cdev, &p_eq->chain);
446 kfree(p_eq);
447}
448
449/***************************************************************************
Manish Chopracee4d262015-10-26 11:02:28 +0200450* CQE API - manipulate EQ functionality
451***************************************************************************/
Yuval Mintz1a635e42016-08-15 10:42:43 +0300452static int qed_cqe_completion(struct qed_hwfn *p_hwfn,
453 struct eth_slow_path_rx_cqe *cqe,
454 enum protocol_type protocol)
Manish Chopracee4d262015-10-26 11:02:28 +0200455{
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300456 if (IS_VF(p_hwfn->cdev))
457 return 0;
458
Manish Chopracee4d262015-10-26 11:02:28 +0200459 /* @@@tmp - it's possible we'll eventually want to handle some
460 * actual commands that can arrive here, but for now this is only
461 * used to complete the ramrod using the echo value on the cqe
462 */
463 return qed_spq_completion(p_hwfn, cqe->echo, 0, NULL);
464}
465
466int qed_eth_cqe_completion(struct qed_hwfn *p_hwfn,
467 struct eth_slow_path_rx_cqe *cqe)
468{
469 int rc;
470
471 rc = qed_cqe_completion(p_hwfn, cqe, PROTOCOLID_ETH);
472 if (rc)
473 DP_NOTICE(p_hwfn,
474 "Failed to handle RXQ CQE [cmd 0x%02x]\n",
475 cqe->ramrod_cmd_id);
476
477 return rc;
478}
479
480/***************************************************************************
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200481* Slow hwfn Queue (spq)
482***************************************************************************/
483void qed_spq_setup(struct qed_hwfn *p_hwfn)
484{
Yuval Mintza91eb522016-06-03 14:35:32 +0300485 struct qed_spq *p_spq = p_hwfn->p_spq;
486 struct qed_spq_entry *p_virt = NULL;
487 dma_addr_t p_phys = 0;
488 u32 i, capacity;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200489
490 INIT_LIST_HEAD(&p_spq->pending);
491 INIT_LIST_HEAD(&p_spq->completion_pending);
492 INIT_LIST_HEAD(&p_spq->free_pool);
493 INIT_LIST_HEAD(&p_spq->unlimited_pending);
494 spin_lock_init(&p_spq->lock);
495
496 /* SPQ empty pool */
497 p_phys = p_spq->p_phys + offsetof(struct qed_spq_entry, ramrod);
498 p_virt = p_spq->p_virt;
499
Yuval Mintza91eb522016-06-03 14:35:32 +0300500 capacity = qed_chain_get_capacity(&p_spq->chain);
501 for (i = 0; i < capacity; i++) {
Yuval Mintz94494592016-02-21 11:40:10 +0200502 DMA_REGPAIR_LE(p_virt->elem.data_ptr, p_phys);
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200503
504 list_add_tail(&p_virt->list, &p_spq->free_pool);
505
506 p_virt++;
507 p_phys += sizeof(struct qed_spq_entry);
508 }
509
510 /* Statistics */
511 p_spq->normal_count = 0;
512 p_spq->comp_count = 0;
513 p_spq->comp_sent_count = 0;
514 p_spq->unlimited_pending_count = 0;
Tomer Tayar76a9a362015-12-07 06:25:57 -0500515
516 bitmap_zero(p_spq->p_comp_bitmap, SPQ_RING_SIZE);
517 p_spq->comp_bitmap_idx = 0;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200518
519 /* SPQ cid, cannot fail */
520 qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_CORE, &p_spq->cid);
521 qed_spq_hw_initialize(p_hwfn, p_spq);
522
523 /* reset the chain itself */
524 qed_chain_reset(&p_spq->chain);
525}
526
527int qed_spq_alloc(struct qed_hwfn *p_hwfn)
528{
Yuval Mintza91eb522016-06-03 14:35:32 +0300529 struct qed_spq_entry *p_virt = NULL;
530 struct qed_spq *p_spq = NULL;
531 dma_addr_t p_phys = 0;
532 u32 capacity;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200533
534 /* SPQ struct */
Yuval Mintz1a635e42016-08-15 10:42:43 +0300535 p_spq = kzalloc(sizeof(struct qed_spq), GFP_KERNEL);
Joe Perches2591c282016-09-04 14:24:03 -0700536 if (!p_spq)
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200537 return -ENOMEM;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200538
539 /* SPQ ring */
540 if (qed_chain_alloc(p_hwfn->cdev,
541 QED_CHAIN_USE_TO_PRODUCE,
542 QED_CHAIN_MODE_SINGLE,
Yuval Mintza91eb522016-06-03 14:35:32 +0300543 QED_CHAIN_CNT_TYPE_U16,
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200544 0, /* N/A when the mode is SINGLE */
545 sizeof(struct slow_path_element),
Joe Perches2591c282016-09-04 14:24:03 -0700546 &p_spq->chain))
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200547 goto spq_allocate_fail;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200548
549 /* allocate and fill the SPQ elements (incl. ramrod data list) */
Yuval Mintza91eb522016-06-03 14:35:32 +0300550 capacity = qed_chain_get_capacity(&p_spq->chain);
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200551 p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
Joe Perches2591c282016-09-04 14:24:03 -0700552 capacity * sizeof(struct qed_spq_entry),
Yuval Mintza91eb522016-06-03 14:35:32 +0300553 &p_phys, GFP_KERNEL);
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200554 if (!p_virt)
555 goto spq_allocate_fail;
556
557 p_spq->p_virt = p_virt;
558 p_spq->p_phys = p_phys;
559 p_hwfn->p_spq = p_spq;
560
561 return 0;
562
563spq_allocate_fail:
564 qed_chain_free(p_hwfn->cdev, &p_spq->chain);
565 kfree(p_spq);
566 return -ENOMEM;
567}
568
569void qed_spq_free(struct qed_hwfn *p_hwfn)
570{
571 struct qed_spq *p_spq = p_hwfn->p_spq;
Yuval Mintza91eb522016-06-03 14:35:32 +0300572 u32 capacity;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200573
574 if (!p_spq)
575 return;
576
Yuval Mintza91eb522016-06-03 14:35:32 +0300577 if (p_spq->p_virt) {
578 capacity = qed_chain_get_capacity(&p_spq->chain);
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200579 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
Yuval Mintza91eb522016-06-03 14:35:32 +0300580 capacity *
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200581 sizeof(struct qed_spq_entry),
Yuval Mintza91eb522016-06-03 14:35:32 +0300582 p_spq->p_virt, p_spq->p_phys);
583 }
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200584
585 qed_chain_free(p_hwfn->cdev, &p_spq->chain);
586 ;
587 kfree(p_spq);
588}
589
Yuval Mintz1a635e42016-08-15 10:42:43 +0300590int qed_spq_get_entry(struct qed_hwfn *p_hwfn, struct qed_spq_entry **pp_ent)
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200591{
592 struct qed_spq *p_spq = p_hwfn->p_spq;
593 struct qed_spq_entry *p_ent = NULL;
594 int rc = 0;
595
596 spin_lock_bh(&p_spq->lock);
597
598 if (list_empty(&p_spq->free_pool)) {
599 p_ent = kzalloc(sizeof(*p_ent), GFP_ATOMIC);
600 if (!p_ent) {
Yuval Mintz1a635e42016-08-15 10:42:43 +0300601 DP_NOTICE(p_hwfn,
602 "Failed to allocate an SPQ entry for a pending ramrod\n");
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200603 rc = -ENOMEM;
604 goto out_unlock;
605 }
606 p_ent->queue = &p_spq->unlimited_pending;
607 } else {
608 p_ent = list_first_entry(&p_spq->free_pool,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300609 struct qed_spq_entry, list);
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200610 list_del(&p_ent->list);
611 p_ent->queue = &p_spq->pending;
612 }
613
614 *pp_ent = p_ent;
615
616out_unlock:
617 spin_unlock_bh(&p_spq->lock);
618 return rc;
619}
620
621/* Locked variant; Should be called while the SPQ lock is taken */
622static void __qed_spq_return_entry(struct qed_hwfn *p_hwfn,
623 struct qed_spq_entry *p_ent)
624{
625 list_add_tail(&p_ent->list, &p_hwfn->p_spq->free_pool);
626}
627
Yuval Mintz1a635e42016-08-15 10:42:43 +0300628void qed_spq_return_entry(struct qed_hwfn *p_hwfn, struct qed_spq_entry *p_ent)
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200629{
630 spin_lock_bh(&p_hwfn->p_spq->lock);
631 __qed_spq_return_entry(p_hwfn, p_ent);
632 spin_unlock_bh(&p_hwfn->p_spq->lock);
633}
634
635/**
636 * @brief qed_spq_add_entry - adds a new entry to the pending
637 * list. Should be used while lock is being held.
638 *
639 * Addes an entry to the pending list is there is room (en empty
640 * element is available in the free_pool), or else places the
641 * entry in the unlimited_pending pool.
642 *
643 * @param p_hwfn
644 * @param p_ent
645 * @param priority
646 *
647 * @return int
648 */
Yuval Mintz1a635e42016-08-15 10:42:43 +0300649static int qed_spq_add_entry(struct qed_hwfn *p_hwfn,
650 struct qed_spq_entry *p_ent,
651 enum spq_priority priority)
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200652{
653 struct qed_spq *p_spq = p_hwfn->p_spq;
654
655 if (p_ent->queue == &p_spq->unlimited_pending) {
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200656
657 if (list_empty(&p_spq->free_pool)) {
658 list_add_tail(&p_ent->list, &p_spq->unlimited_pending);
659 p_spq->unlimited_pending_count++;
660
661 return 0;
Tomer Tayar76a9a362015-12-07 06:25:57 -0500662 } else {
663 struct qed_spq_entry *p_en2;
664
665 p_en2 = list_first_entry(&p_spq->free_pool,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300666 struct qed_spq_entry, list);
Tomer Tayar76a9a362015-12-07 06:25:57 -0500667 list_del(&p_en2->list);
668
669 /* Copy the ring element physical pointer to the new
670 * entry, since we are about to override the entire ring
671 * entry and don't want to lose the pointer.
672 */
673 p_ent->elem.data_ptr = p_en2->elem.data_ptr;
674
675 *p_en2 = *p_ent;
676
Yuval Mintzdb511c32016-06-19 15:18:14 +0300677 /* EBLOCK responsible to free the allocated p_ent */
678 if (p_ent->comp_mode != QED_SPQ_MODE_EBLOCK)
679 kfree(p_ent);
Tomer Tayar76a9a362015-12-07 06:25:57 -0500680
681 p_ent = p_en2;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200682 }
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200683 }
684
685 /* entry is to be placed in 'pending' queue */
686 switch (priority) {
687 case QED_SPQ_PRIORITY_NORMAL:
688 list_add_tail(&p_ent->list, &p_spq->pending);
689 p_spq->normal_count++;
690 break;
691 case QED_SPQ_PRIORITY_HIGH:
692 list_add(&p_ent->list, &p_spq->pending);
693 p_spq->high_count++;
694 break;
695 default:
696 return -EINVAL;
697 }
698
699 return 0;
700}
701
702/***************************************************************************
703* Accessor
704***************************************************************************/
705u32 qed_spq_get_cid(struct qed_hwfn *p_hwfn)
706{
707 if (!p_hwfn->p_spq)
708 return 0xffffffff; /* illegal */
709 return p_hwfn->p_spq->cid;
710}
711
712/***************************************************************************
713* Posting new Ramrods
714***************************************************************************/
715static int qed_spq_post_list(struct qed_hwfn *p_hwfn,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300716 struct list_head *head, u32 keep_reserve)
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200717{
718 struct qed_spq *p_spq = p_hwfn->p_spq;
719 int rc;
720
721 while (qed_chain_get_elem_left(&p_spq->chain) > keep_reserve &&
722 !list_empty(head)) {
723 struct qed_spq_entry *p_ent =
724 list_first_entry(head, struct qed_spq_entry, list);
725 list_del(&p_ent->list);
726 list_add_tail(&p_ent->list, &p_spq->completion_pending);
727 p_spq->comp_sent_count++;
728
729 rc = qed_spq_hw_post(p_hwfn, p_spq, p_ent);
730 if (rc) {
731 list_del(&p_ent->list);
732 __qed_spq_return_entry(p_hwfn, p_ent);
733 return rc;
734 }
735 }
736
737 return 0;
738}
739
740static int qed_spq_pend_post(struct qed_hwfn *p_hwfn)
741{
742 struct qed_spq *p_spq = p_hwfn->p_spq;
743 struct qed_spq_entry *p_ent = NULL;
744
745 while (!list_empty(&p_spq->free_pool)) {
746 if (list_empty(&p_spq->unlimited_pending))
747 break;
748
749 p_ent = list_first_entry(&p_spq->unlimited_pending,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300750 struct qed_spq_entry, list);
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200751 if (!p_ent)
752 return -EINVAL;
753
754 list_del(&p_ent->list);
755
756 qed_spq_add_entry(p_hwfn, p_ent, p_ent->priority);
757 }
758
759 return qed_spq_post_list(p_hwfn, &p_spq->pending,
760 SPQ_HIGH_PRI_RESERVE_DEFAULT);
761}
762
763int qed_spq_post(struct qed_hwfn *p_hwfn,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300764 struct qed_spq_entry *p_ent, u8 *fw_return_code)
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200765{
766 int rc = 0;
767 struct qed_spq *p_spq = p_hwfn ? p_hwfn->p_spq : NULL;
768 bool b_ret_ent = true;
769
770 if (!p_hwfn)
771 return -EINVAL;
772
773 if (!p_ent) {
774 DP_NOTICE(p_hwfn, "Got a NULL pointer\n");
775 return -EINVAL;
776 }
777
778 /* Complete the entry */
779 rc = qed_spq_fill_entry(p_hwfn, p_ent);
780
781 spin_lock_bh(&p_spq->lock);
782
783 /* Check return value after LOCK is taken for cleaner error flow */
784 if (rc)
785 goto spq_post_fail;
786
787 /* Add the request to the pending queue */
788 rc = qed_spq_add_entry(p_hwfn, p_ent, p_ent->priority);
789 if (rc)
790 goto spq_post_fail;
791
792 rc = qed_spq_pend_post(p_hwfn);
793 if (rc) {
794 /* Since it's possible that pending failed for a different
795 * entry [although unlikely], the failed entry was already
796 * dealt with; No need to return it here.
797 */
798 b_ret_ent = false;
799 goto spq_post_fail;
800 }
801
802 spin_unlock_bh(&p_spq->lock);
803
804 if (p_ent->comp_mode == QED_SPQ_MODE_EBLOCK) {
805 /* For entries in QED BLOCK mode, the completion code cannot
806 * perform the necessary cleanup - if it did, we couldn't
807 * access p_ent here to see whether it's successful or not.
808 * Thus, after gaining the answer perform the cleanup here.
809 */
Yuval Mintzc59f52912016-10-14 05:19:21 -0400810 rc = qed_spq_block(p_hwfn, p_ent, fw_return_code,
811 p_ent->queue == &p_spq->unlimited_pending);
Yuval Mintzdb511c32016-06-19 15:18:14 +0300812
813 if (p_ent->queue == &p_spq->unlimited_pending) {
814 /* This is an allocated p_ent which does not need to
815 * return to pool.
816 */
817 kfree(p_ent);
818 return rc;
819 }
820
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200821 if (rc)
822 goto spq_post_fail2;
823
824 /* return to pool */
825 qed_spq_return_entry(p_hwfn, p_ent);
826 }
827 return rc;
828
829spq_post_fail2:
830 spin_lock_bh(&p_spq->lock);
831 list_del(&p_ent->list);
832 qed_chain_return_produced(&p_spq->chain);
833
834spq_post_fail:
835 /* return to the free pool */
836 if (b_ret_ent)
837 __qed_spq_return_entry(p_hwfn, p_ent);
838 spin_unlock_bh(&p_spq->lock);
839
840 return rc;
841}
842
843int qed_spq_completion(struct qed_hwfn *p_hwfn,
844 __le16 echo,
845 u8 fw_return_code,
846 union event_ring_data *p_data)
847{
848 struct qed_spq *p_spq;
849 struct qed_spq_entry *p_ent = NULL;
850 struct qed_spq_entry *tmp;
851 struct qed_spq_entry *found = NULL;
852 int rc;
853
854 if (!p_hwfn)
855 return -EINVAL;
856
857 p_spq = p_hwfn->p_spq;
858 if (!p_spq)
859 return -EINVAL;
860
861 spin_lock_bh(&p_spq->lock);
Yuval Mintz1a635e42016-08-15 10:42:43 +0300862 list_for_each_entry_safe(p_ent, tmp, &p_spq->completion_pending, list) {
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200863 if (p_ent->elem.hdr.echo == echo) {
Tomer Tayar76a9a362015-12-07 06:25:57 -0500864 u16 pos = le16_to_cpu(echo) % SPQ_RING_SIZE;
865
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200866 list_del(&p_ent->list);
867
Tomer Tayar76a9a362015-12-07 06:25:57 -0500868 /* Avoid overriding of SPQ entries when getting
869 * out-of-order completions, by marking the completions
870 * in a bitmap and increasing the chain consumer only
871 * for the first successive completed entries.
872 */
Manish Chopra59d3f1c2016-07-25 19:07:46 +0300873 __set_bit(pos, p_spq->p_comp_bitmap);
Tomer Tayar76a9a362015-12-07 06:25:57 -0500874
875 while (test_bit(p_spq->comp_bitmap_idx,
876 p_spq->p_comp_bitmap)) {
Manish Chopra59d3f1c2016-07-25 19:07:46 +0300877 __clear_bit(p_spq->comp_bitmap_idx,
878 p_spq->p_comp_bitmap);
Tomer Tayar76a9a362015-12-07 06:25:57 -0500879 p_spq->comp_bitmap_idx++;
880 qed_chain_return_produced(&p_spq->chain);
881 }
882
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200883 p_spq->comp_count++;
884 found = p_ent;
885 break;
886 }
Tomer Tayar76a9a362015-12-07 06:25:57 -0500887
888 /* This is relatively uncommon - depends on scenarios
889 * which have mutliple per-PF sent ramrods.
890 */
891 DP_VERBOSE(p_hwfn, QED_MSG_SPQ,
892 "Got completion for echo %04x - doesn't match echo %04x in completion pending list\n",
893 le16_to_cpu(echo),
894 le16_to_cpu(p_ent->elem.hdr.echo));
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200895 }
896
897 /* Release lock before callback, as callback may post
898 * an additional ramrod.
899 */
900 spin_unlock_bh(&p_spq->lock);
901
902 if (!found) {
903 DP_NOTICE(p_hwfn,
Yuval Mintz525ef5c2016-08-15 10:42:45 +0300904 "Failed to find an entry this EQE [echo %04x] completes\n",
905 le16_to_cpu(echo));
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200906 return -EEXIST;
907 }
908
Yuval Mintz525ef5c2016-08-15 10:42:45 +0300909 DP_VERBOSE(p_hwfn, QED_MSG_SPQ,
910 "Complete EQE [echo %04x]: func %p cookie %p)\n",
911 le16_to_cpu(echo),
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200912 p_ent->comp_cb.function, p_ent->comp_cb.cookie);
913 if (found->comp_cb.function)
914 found->comp_cb.function(p_hwfn, found->comp_cb.cookie, p_data,
915 fw_return_code);
Yuval Mintz525ef5c2016-08-15 10:42:45 +0300916 else
917 DP_VERBOSE(p_hwfn,
918 QED_MSG_SPQ,
919 "Got a completion without a callback function\n");
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200920
Yuval Mintzdb511c32016-06-19 15:18:14 +0300921 if ((found->comp_mode != QED_SPQ_MODE_EBLOCK) ||
922 (found->queue == &p_spq->unlimited_pending))
923 /* EBLOCK is responsible for returning its own entry into the
924 * free list, unless it originally added the entry into the
925 * unlimited pending list.
926 */
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200927 qed_spq_return_entry(p_hwfn, found);
928
929 /* Attempt to post pending requests */
930 spin_lock_bh(&p_spq->lock);
931 rc = qed_spq_pend_post(p_hwfn);
932 spin_unlock_bh(&p_spq->lock);
933
934 return rc;
935}
936
937struct qed_consq *qed_consq_alloc(struct qed_hwfn *p_hwfn)
938{
939 struct qed_consq *p_consq;
940
941 /* Allocate ConsQ struct */
Yuval Mintz60fffb32016-02-21 11:40:07 +0200942 p_consq = kzalloc(sizeof(*p_consq), GFP_KERNEL);
Joe Perches2591c282016-09-04 14:24:03 -0700943 if (!p_consq)
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200944 return NULL;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200945
946 /* Allocate and initialize EQ chain*/
947 if (qed_chain_alloc(p_hwfn->cdev,
948 QED_CHAIN_USE_TO_PRODUCE,
949 QED_CHAIN_MODE_PBL,
Yuval Mintza91eb522016-06-03 14:35:32 +0300950 QED_CHAIN_CNT_TYPE_U16,
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200951 QED_CHAIN_PAGE_SIZE / 0x80,
Joe Perches2591c282016-09-04 14:24:03 -0700952 0x80, &p_consq->chain))
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200953 goto consq_allocate_fail;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200954
955 return p_consq;
956
957consq_allocate_fail:
958 qed_consq_free(p_hwfn, p_consq);
959 return NULL;
960}
961
Yuval Mintz1a635e42016-08-15 10:42:43 +0300962void qed_consq_setup(struct qed_hwfn *p_hwfn, struct qed_consq *p_consq)
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200963{
964 qed_chain_reset(&p_consq->chain);
965}
966
Yuval Mintz1a635e42016-08-15 10:42:43 +0300967void qed_consq_free(struct qed_hwfn *p_hwfn, struct qed_consq *p_consq)
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200968{
969 if (!p_consq)
970 return;
971 qed_chain_free(p_hwfn->cdev, &p_consq->chain);
972 kfree(p_consq);
973}