arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts

/*
 * Copyright 2013 Data Modul AG
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

/dts-v1/;

#include <dt-bindings/gpio/gpio.h>
#include "imx6q.dtsi"

/ {
	model = "Data Modul eDM-QMX6 Board";
	compatible = "dmo,imx6q-edmqmx6", "fsl,imx6q";

	chosen {
		stdout-path = &uart2;
	};

	aliases {
		gpio7 = &stmpe_gpio1;
		gpio8 = &stmpe_gpio2;
		stmpe-i2c0 = &stmpe1;
		stmpe-i2c1 = &stmpe2;
	};

	memory {
		reg = <0x10000000 0x80000000>;
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_3p3v: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "3P3V";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};

		reg_usb_otg_switch: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "usb_otg_switch";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio7 12 0>;
			regulator-boot-on;
			regulator-always-on;
		};

		reg_usb_host1: regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "usb_host1_en";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			gpio = <&gpio3 31 0>;
			enable-active-high;
		};
	};

	gpio-leds {
		compatible = "gpio-leds";

		led-blue {
			label = "blue";
			gpios = <&stmpe_gpio1 8 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
		};

		led-green {
			label = "green";
			gpios = <&stmpe_gpio1 9 GPIO_ACTIVE_HIGH>;
		};

		led-pink {
			label = "pink";
			gpios = <&stmpe_gpio1 10 GPIO_ACTIVE_HIGH>;
		};

		led-red {
			label = "red";
			gpios = <&stmpe_gpio1 11 GPIO_ACTIVE_HIGH>;
		};
	};
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can1>;
	status = "okay";
};

&ecspi5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi5>;
	fsl,spi-num-chipselects = <1>;
	cs-gpios = <&gpio1 12 0>;
	status = "okay";

	flash: m25p80@0 {
		compatible = "m25p80";
		spi-max-frequency = <40000000>;
		reg = <0>;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii";
	phy-reset-gpios = <&gpio1 25 0>;
	phy-supply = <&vgen2_1v2_eth>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2
		     &pinctrl_stmpe1
		     &pinctrl_stmpe2
		     &pinctrl_pfuze>;
	status = "okay";

	pmic: pfuze100@08 {
		compatible = "fsl,pfuze100";
		reg = <0x08>;
		interrupt-parent = <&gpio3>;
		interrupts = <20 8>;

		regulators {
			sw1a_reg: sw1ab {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw1c_reg: sw1c {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw2_reg: sw2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3a_reg: sw3a {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3b_reg: sw3b {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw4_reg: sw4 {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-always-on;
			};

			swbst_reg: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
				regulator-always-on;
			};

			snvs_reg: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vref_reg: vrefddr {
				regulator-boot-on;
				regulator-always-on;
			};

			vgen1_reg: vgen1 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vgen2_1v2_eth: vgen2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vdd_high_in: vgen3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vgen4_reg: vgen4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen5_reg: vgen5 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen6_reg: vgen6 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
		};
	};

	stmpe1: stmpe1601@40 {
		compatible = "st,stmpe1601";
		reg = <0x40>;
		interrupts = <30 0>;
		interrupt-parent = <&gpio3>;
		vcc-supply = <&sw2_reg>;
		vio-supply = <&sw2_reg>;

		stmpe_gpio1: stmpe_gpio {
			#gpio-cells = <2>;
			compatible = "st,stmpe-gpio";
		};
	};

	stmpe2: stmpe1601@44 {
		compatible = "st,stmpe1601";
		reg = <0x44>;
		interrupts = <2 0>;
		interrupt-parent = <&gpio5>;
		vcc-supply = <&sw2_reg>;
		vio-supply = <&sw2_reg>;

		stmpe_gpio2: stmpe_gpio {
			#gpio-cells = <2>;
			compatible = "st,stmpe-gpio";
		};
	};

	temp1: ad7414@4c {
		compatible = "ad,ad7414";
		reg = <0x4c>;
	};

	temp2: ad7414@4d {
		compatible = "ad,ad7414";
		reg = <0x4d>;
	};

	rtc: m41t62@68 {
		compatible = "stm,m41t62";
		reg = <0x68>;
	};
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	imx6q-dmo-edmqmx6 {
		pinctrl_hog: hoggrp {
			fsl,pins = <
				MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x80000000
				MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x80000000
			>;
		};

		pinctrl_can1: can1grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0
				MX6QDL_PAD_GPIO_7__FLEXCAN1_TX		0x1b0b0
			>;
		};

		pinctrl_ecspi5: ecspi5rp-1 {
			fsl,pins = <
				MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO	0x80000000
				MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI		0x80000000
				MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK		0x80000000
				MX6QDL_PAD_SD2_DAT3__GPIO1_IO12		0x80000000
			>;
		};

		pinctrl_enet: enetgrp {
			fsl,pins = <
				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b0b0
				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b0b0
				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b0b0
				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0
				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b0b0
				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b0b0
				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b0b0
				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b0b0
				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b0b0
				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b0b0
				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b0b0
				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	0x1b0b0
				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
			>;
		};

		pinctrl_i2c1: i2c1grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
				MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_EB2__I2C2_SCL		0x4001b8b1
				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
			>;
		};

		pinctrl_i2c3: i2c3grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D17__I2C3_SCL		0x4001b8b1
				MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
			>;
		};

		pinctrl_pcie: pciegrp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL1__GPIO4_IO08		0x100b1
			>;
		};

		pinctrl_pfuze: pfuze100grp1 {
			fsl,pins = <
				MX6QDL_PAD_EIM_D20__GPIO3_IO20		0x80000000
			>;
		};

		pinctrl_stmpe1: stmpe1grp {
			fsl,pins = <MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000>;
		};

		pinctrl_stmpe2: stmpe2grp {
			fsl,pins = <MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000>;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
				MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_uart2: uart2grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1
				MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_usbotg: usbotggrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x17059
			>;
		};

		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
			>;
		};

		pinctrl_usdhc4: usdhc4grp {
			fsl,pins = <
				MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059
				MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059
				MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059
				MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059
				MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059
				MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059
				MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059
				MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059
				MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059
				MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059
			>;
		};
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	reset-gpio = <&gpio4 8 0>;
	status = "okay";
};

&sata {
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_usb_host1>;
	disable-over-current;
	dr_mode = "host";
	status = "okay";
};

&usbotg {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	vmmc-supply = <&reg_3p3v>;
	status = "okay";
};

&usdhc4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc4>;
	vmmc-supply = <&reg_3p3v>;
	non-removable;
	bus-width = <8>;
	status = "okay";
};