blob: 23bae74ebf0ae9542b8d0dc5d5f863ab1928e14b [file] [log] [blame]
Steve Sakomancc175572008-10-30 21:35:26 -07001/*
2 * ALSA SoC TWL4030 codec driver
3 *
4 * Author: Steve Sakoman, <steve@sakoman.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
27#include <linux/i2c.h>
28#include <linux/platform_device.h>
29#include <linux/i2c/twl4030.h>
30#include <sound/core.h>
31#include <sound/pcm.h>
32#include <sound/pcm_params.h>
33#include <sound/soc.h>
34#include <sound/soc-dapm.h>
35#include <sound/initval.h>
Peter Ujfalusic10b82c2008-11-24 13:49:35 +020036#include <sound/tlv.h>
Steve Sakomancc175572008-10-30 21:35:26 -070037
38#include "twl4030.h"
39
40/*
41 * twl4030 register cache & default register settings
42 */
43static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
44 0x00, /* this register not used */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +020045 0x91, /* REG_CODEC_MODE (0x1) */
Steve Sakomancc175572008-10-30 21:35:26 -070046 0xc3, /* REG_OPTION (0x2) */
47 0x00, /* REG_UNKNOWN (0x3) */
48 0x00, /* REG_MICBIAS_CTL (0x4) */
Grazvydas Ignotas5920b452008-12-02 20:48:58 +020049 0x20, /* REG_ANAMICL (0x5) */
50 0x00, /* REG_ANAMICR (0x6) */
51 0x00, /* REG_AVADC_CTL (0x7) */
Steve Sakomancc175572008-10-30 21:35:26 -070052 0x00, /* REG_ADCMICSEL (0x8) */
53 0x00, /* REG_DIGMIXING (0x9) */
54 0x0c, /* REG_ATXL1PGA (0xA) */
55 0x0c, /* REG_ATXR1PGA (0xB) */
56 0x00, /* REG_AVTXL2PGA (0xC) */
57 0x00, /* REG_AVTXR2PGA (0xD) */
58 0x01, /* REG_AUDIO_IF (0xE) */
59 0x00, /* REG_VOICE_IF (0xF) */
60 0x00, /* REG_ARXR1PGA (0x10) */
61 0x00, /* REG_ARXL1PGA (0x11) */
62 0x6c, /* REG_ARXR2PGA (0x12) */
63 0x6c, /* REG_ARXL2PGA (0x13) */
64 0x00, /* REG_VRXPGA (0x14) */
65 0x00, /* REG_VSTPGA (0x15) */
66 0x00, /* REG_VRX2ARXPGA (0x16) */
67 0x0c, /* REG_AVDAC_CTL (0x17) */
68 0x00, /* REG_ARX2VTXPGA (0x18) */
69 0x00, /* REG_ARXL1_APGA_CTL (0x19) */
70 0x00, /* REG_ARXR1_APGA_CTL (0x1A) */
71 0x4b, /* REG_ARXL2_APGA_CTL (0x1B) */
72 0x4b, /* REG_ARXR2_APGA_CTL (0x1C) */
73 0x00, /* REG_ATX2ARXPGA (0x1D) */
74 0x00, /* REG_BT_IF (0x1E) */
75 0x00, /* REG_BTPGA (0x1F) */
76 0x00, /* REG_BTSTPGA (0x20) */
77 0x00, /* REG_EAR_CTL (0x21) */
78 0x24, /* REG_HS_SEL (0x22) */
79 0x0a, /* REG_HS_GAIN_SET (0x23) */
80 0x00, /* REG_HS_POPN_SET (0x24) */
81 0x00, /* REG_PREDL_CTL (0x25) */
82 0x00, /* REG_PREDR_CTL (0x26) */
83 0x00, /* REG_PRECKL_CTL (0x27) */
84 0x00, /* REG_PRECKR_CTL (0x28) */
85 0x00, /* REG_HFL_CTL (0x29) */
86 0x00, /* REG_HFR_CTL (0x2A) */
87 0x00, /* REG_ALC_CTL (0x2B) */
88 0x00, /* REG_ALC_SET1 (0x2C) */
89 0x00, /* REG_ALC_SET2 (0x2D) */
90 0x00, /* REG_BOOST_CTL (0x2E) */
Peter Ujfalusif8d05bd2008-11-24 08:25:45 +020091 0x00, /* REG_SOFTVOL_CTL (0x2F) */
Steve Sakomancc175572008-10-30 21:35:26 -070092 0x00, /* REG_DTMF_FREQSEL (0x30) */
93 0x00, /* REG_DTMF_TONEXT1H (0x31) */
94 0x00, /* REG_DTMF_TONEXT1L (0x32) */
95 0x00, /* REG_DTMF_TONEXT2H (0x33) */
96 0x00, /* REG_DTMF_TONEXT2L (0x34) */
97 0x00, /* REG_DTMF_TONOFF (0x35) */
98 0x00, /* REG_DTMF_WANONOFF (0x36) */
99 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
100 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
101 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
102 0x16, /* REG_APLL_CTL (0x3A) */
103 0x00, /* REG_DTMF_CTL (0x3B) */
104 0x00, /* REG_DTMF_PGA_CTL2 (0x3C) */
105 0x00, /* REG_DTMF_PGA_CTL1 (0x3D) */
106 0x00, /* REG_MISC_SET_1 (0x3E) */
107 0x00, /* REG_PCMBTMUX (0x3F) */
108 0x00, /* not used (0x40) */
109 0x00, /* not used (0x41) */
110 0x00, /* not used (0x42) */
111 0x00, /* REG_RX_PATH_SEL (0x43) */
112 0x00, /* REG_VDL_APGA_CTL (0x44) */
113 0x00, /* REG_VIBRA_CTL (0x45) */
114 0x00, /* REG_VIBRA_SET (0x46) */
115 0x00, /* REG_VIBRA_PWM_SET (0x47) */
116 0x00, /* REG_ANAMIC_GAIN (0x48) */
117 0x00, /* REG_MISC_SET_2 (0x49) */
118};
119
Peter Ujfalusi73939582009-01-29 14:57:50 +0200120/* codec private data */
121struct twl4030_priv {
122 unsigned int bypass_state;
123 unsigned int codec_powered;
124 unsigned int codec_muted;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +0200125
126 struct snd_pcm_substream *master_substream;
127 struct snd_pcm_substream *slave_substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +0300128
129 unsigned int configured;
130 unsigned int rate;
131 unsigned int sample_bits;
132 unsigned int channels;
Peter Ujfalusi73939582009-01-29 14:57:50 +0200133};
134
Steve Sakomancc175572008-10-30 21:35:26 -0700135/*
136 * read twl4030 register cache
137 */
138static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec *codec,
139 unsigned int reg)
140{
141 u8 *cache = codec->reg_cache;
142
Ian Molton91432e92009-01-17 17:44:23 +0000143 if (reg >= TWL4030_CACHEREGNUM)
144 return -EIO;
145
Steve Sakomancc175572008-10-30 21:35:26 -0700146 return cache[reg];
147}
148
149/*
150 * write twl4030 register cache
151 */
152static inline void twl4030_write_reg_cache(struct snd_soc_codec *codec,
153 u8 reg, u8 value)
154{
155 u8 *cache = codec->reg_cache;
156
157 if (reg >= TWL4030_CACHEREGNUM)
158 return;
159 cache[reg] = value;
160}
161
162/*
163 * write to the twl4030 register space
164 */
165static int twl4030_write(struct snd_soc_codec *codec,
166 unsigned int reg, unsigned int value)
167{
168 twl4030_write_reg_cache(codec, reg, value);
169 return twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg);
170}
171
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200172static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
Steve Sakomancc175572008-10-30 21:35:26 -0700173{
Peter Ujfalusi73939582009-01-29 14:57:50 +0200174 struct twl4030_priv *twl4030 = codec->private_data;
Steve Sakomancc175572008-10-30 21:35:26 -0700175 u8 mode;
176
Peter Ujfalusi73939582009-01-29 14:57:50 +0200177 if (enable == twl4030->codec_powered)
178 return;
179
Steve Sakomancc175572008-10-30 21:35:26 -0700180 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE);
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200181 if (enable)
182 mode |= TWL4030_CODECPDZ;
183 else
184 mode &= ~TWL4030_CODECPDZ;
Steve Sakomancc175572008-10-30 21:35:26 -0700185
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200186 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
Peter Ujfalusi73939582009-01-29 14:57:50 +0200187 twl4030->codec_powered = enable;
Steve Sakomancc175572008-10-30 21:35:26 -0700188
189 /* REVISIT: this delay is present in TI sample drivers */
190 /* but there seems to be no TRM requirement for it */
191 udelay(10);
192}
193
194static void twl4030_init_chip(struct snd_soc_codec *codec)
195{
196 int i;
197
198 /* clear CODECPDZ prior to setting register defaults */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200199 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -0700200
201 /* set all audio section registers to reasonable defaults */
202 for (i = TWL4030_REG_OPTION; i <= TWL4030_REG_MISC_SET_2; i++)
203 twl4030_write(codec, i, twl4030_reg[i]);
204
205}
206
Peter Ujfalusi73939582009-01-29 14:57:50 +0200207static void twl4030_codec_mute(struct snd_soc_codec *codec, int mute)
208{
209 struct twl4030_priv *twl4030 = codec->private_data;
210 u8 reg_val;
211
212 if (mute == twl4030->codec_muted)
213 return;
214
215 if (mute) {
216 /* Bypass the reg_cache and mute the volumes
217 * Headset mute is done in it's own event handler
218 * Things to mute: Earpiece, PreDrivL/R, CarkitL/R
219 */
220 reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_EAR_CTL);
221 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
222 reg_val & (~TWL4030_EAR_GAIN),
223 TWL4030_REG_EAR_CTL);
224
225 reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_PREDL_CTL);
226 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
227 reg_val & (~TWL4030_PREDL_GAIN),
228 TWL4030_REG_PREDL_CTL);
229 reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_PREDR_CTL);
230 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
231 reg_val & (~TWL4030_PREDR_GAIN),
232 TWL4030_REG_PREDL_CTL);
233
234 reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_PRECKL_CTL);
235 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
236 reg_val & (~TWL4030_PRECKL_GAIN),
237 TWL4030_REG_PRECKL_CTL);
238 reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_PRECKR_CTL);
239 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
240 reg_val & (~TWL4030_PRECKL_GAIN),
241 TWL4030_REG_PRECKR_CTL);
242
243 /* Disable PLL */
244 reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_APLL_CTL);
245 reg_val &= ~TWL4030_APLL_EN;
246 twl4030_write(codec, TWL4030_REG_APLL_CTL, reg_val);
247 } else {
248 /* Restore the volumes
249 * Headset mute is done in it's own event handler
250 * Things to restore: Earpiece, PreDrivL/R, CarkitL/R
251 */
252 twl4030_write(codec, TWL4030_REG_EAR_CTL,
253 twl4030_read_reg_cache(codec, TWL4030_REG_EAR_CTL));
254
255 twl4030_write(codec, TWL4030_REG_PREDL_CTL,
256 twl4030_read_reg_cache(codec, TWL4030_REG_PREDL_CTL));
257 twl4030_write(codec, TWL4030_REG_PREDR_CTL,
258 twl4030_read_reg_cache(codec, TWL4030_REG_PREDR_CTL));
259
260 twl4030_write(codec, TWL4030_REG_PRECKL_CTL,
261 twl4030_read_reg_cache(codec, TWL4030_REG_PRECKL_CTL));
262 twl4030_write(codec, TWL4030_REG_PRECKR_CTL,
263 twl4030_read_reg_cache(codec, TWL4030_REG_PRECKR_CTL));
264
265 /* Enable PLL */
266 reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_APLL_CTL);
267 reg_val |= TWL4030_APLL_EN;
268 twl4030_write(codec, TWL4030_REG_APLL_CTL, reg_val);
269 }
270
271 twl4030->codec_muted = mute;
272}
273
Peter Ujfalusi006f367e2009-01-27 11:29:43 +0200274static void twl4030_power_up(struct snd_soc_codec *codec)
275{
Peter Ujfalusi73939582009-01-29 14:57:50 +0200276 struct twl4030_priv *twl4030 = codec->private_data;
Peter Ujfalusi006f367e2009-01-27 11:29:43 +0200277 u8 anamicl, regmisc1, byte;
278 int i = 0;
279
Peter Ujfalusi73939582009-01-29 14:57:50 +0200280 if (twl4030->codec_powered)
281 return;
282
Peter Ujfalusi006f367e2009-01-27 11:29:43 +0200283 /* set CODECPDZ to turn on codec */
284 twl4030_codec_enable(codec, 1);
285
286 /* initiate offset cancellation */
287 anamicl = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL);
288 twl4030_write(codec, TWL4030_REG_ANAMICL,
289 anamicl | TWL4030_CNCL_OFFSET_START);
290
291 /* wait for offset cancellation to complete */
292 do {
293 /* this takes a little while, so don't slam i2c */
294 udelay(2000);
295 twl4030_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
296 TWL4030_REG_ANAMICL);
297 } while ((i++ < 100) &&
298 ((byte & TWL4030_CNCL_OFFSET_START) ==
299 TWL4030_CNCL_OFFSET_START));
300
301 /* Make sure that the reg_cache has the same value as the HW */
302 twl4030_write_reg_cache(codec, TWL4030_REG_ANAMICL, byte);
303
304 /* anti-pop when changing analog gain */
305 regmisc1 = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1);
306 twl4030_write(codec, TWL4030_REG_MISC_SET_1,
307 regmisc1 | TWL4030_SMOOTH_ANAVOL_EN);
308
309 /* toggle CODECPDZ as per TRM */
310 twl4030_codec_enable(codec, 0);
311 twl4030_codec_enable(codec, 1);
312}
313
Peter Ujfalusi73939582009-01-29 14:57:50 +0200314/*
315 * Unconditional power down
316 */
Peter Ujfalusi006f367e2009-01-27 11:29:43 +0200317static void twl4030_power_down(struct snd_soc_codec *codec)
318{
319 /* power down */
320 twl4030_codec_enable(codec, 0);
321}
322
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200323/* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900324static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
325 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
326 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
327 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
328 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
329};
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200330
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200331/* PreDrive Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900332static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
333 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
334 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
335 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
336 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
337};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200338
339/* PreDrive Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900340static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
341 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
342 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
343 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
344 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
345};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200346
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200347/* Headset Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900348static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
349 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
350 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
351 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
352};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200353
354/* Headset Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900355static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
356 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
357 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
358 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
359};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200360
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200361/* Carkit Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900362static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
363 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
364 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
365 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
366};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200367
368/* Carkit Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900369static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
370 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
371 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
372 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
373};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200374
Peter Ujfalusidf339802008-12-09 12:35:51 +0200375/* Handsfree Left */
376static const char *twl4030_handsfreel_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900377 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200378
379static const struct soc_enum twl4030_handsfreel_enum =
380 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL, 0,
381 ARRAY_SIZE(twl4030_handsfreel_texts),
382 twl4030_handsfreel_texts);
383
384static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
385SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
386
387/* Handsfree Right */
388static const char *twl4030_handsfreer_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900389 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200390
391static const struct soc_enum twl4030_handsfreer_enum =
392 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL, 0,
393 ARRAY_SIZE(twl4030_handsfreer_texts),
394 twl4030_handsfreer_texts);
395
396static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
397SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
398
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200399/* Left analog microphone selection */
400static const char *twl4030_analoglmic_texts[] =
Peter Ujfalusi2f423572009-01-05 09:54:58 +0200401 {"Off", "Main mic", "Headset mic", "AUXL", "Carkit mic"};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200402
Peter Ujfalusi2f423572009-01-05 09:54:58 +0200403static const unsigned int twl4030_analoglmic_values[] =
404 {0x0, 0x1, 0x2, 0x4, 0x8};
405
Peter Ujfalusicb1ace02009-01-08 13:34:30 +0200406static const struct soc_enum twl4030_analoglmic_enum =
Peter Ujfalusi2f423572009-01-05 09:54:58 +0200407 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_ANAMICL, 0, 0xf,
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200408 ARRAY_SIZE(twl4030_analoglmic_texts),
Peter Ujfalusi2f423572009-01-05 09:54:58 +0200409 twl4030_analoglmic_texts,
410 twl4030_analoglmic_values);
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200411
412static const struct snd_kcontrol_new twl4030_dapm_analoglmic_control =
Peter Ujfalusi2f423572009-01-05 09:54:58 +0200413SOC_DAPM_VALUE_ENUM("Route", twl4030_analoglmic_enum);
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200414
415/* Right analog microphone selection */
416static const char *twl4030_analogrmic_texts[] =
Peter Ujfalusi2f423572009-01-05 09:54:58 +0200417 {"Off", "Sub mic", "AUXR"};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200418
Peter Ujfalusi2f423572009-01-05 09:54:58 +0200419static const unsigned int twl4030_analogrmic_values[] =
420 {0x0, 0x1, 0x4};
421
Peter Ujfalusicb1ace02009-01-08 13:34:30 +0200422static const struct soc_enum twl4030_analogrmic_enum =
Peter Ujfalusi2f423572009-01-05 09:54:58 +0200423 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_ANAMICR, 0, 0x5,
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200424 ARRAY_SIZE(twl4030_analogrmic_texts),
Peter Ujfalusi2f423572009-01-05 09:54:58 +0200425 twl4030_analogrmic_texts,
426 twl4030_analogrmic_values);
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200427
428static const struct snd_kcontrol_new twl4030_dapm_analogrmic_control =
Peter Ujfalusi2f423572009-01-05 09:54:58 +0200429SOC_DAPM_VALUE_ENUM("Route", twl4030_analogrmic_enum);
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200430
431/* TX1 L/R Analog/Digital microphone selection */
432static const char *twl4030_micpathtx1_texts[] =
433 {"Analog", "Digimic0"};
434
435static const struct soc_enum twl4030_micpathtx1_enum =
436 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 0,
437 ARRAY_SIZE(twl4030_micpathtx1_texts),
438 twl4030_micpathtx1_texts);
439
440static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
441SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
442
443/* TX2 L/R Analog/Digital microphone selection */
444static const char *twl4030_micpathtx2_texts[] =
445 {"Analog", "Digimic1"};
446
447static const struct soc_enum twl4030_micpathtx2_enum =
448 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 2,
449 ARRAY_SIZE(twl4030_micpathtx2_texts),
450 twl4030_micpathtx2_texts);
451
452static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
453SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
454
Peter Ujfalusi73939582009-01-29 14:57:50 +0200455/* Analog bypass for AudioR1 */
456static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
457 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
458
459/* Analog bypass for AudioL1 */
460static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
461 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
462
463/* Analog bypass for AudioR2 */
464static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
465 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
466
467/* Analog bypass for AudioL2 */
468static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
469 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
470
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -0500471/* Analog bypass for Voice */
472static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
473 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
474
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200475/* Digital bypass gain, 0 mutes the bypass */
476static const unsigned int twl4030_dapm_dbypass_tlv[] = {
477 TLV_DB_RANGE_HEAD(2),
478 0, 3, TLV_DB_SCALE_ITEM(-2400, 0, 1),
479 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
480};
481
482/* Digital bypass left (TX1L -> RX2L) */
483static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
484 SOC_DAPM_SINGLE_TLV("Volume",
485 TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
486 twl4030_dapm_dbypass_tlv);
487
488/* Digital bypass right (TX1R -> RX2R) */
489static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
490 SOC_DAPM_SINGLE_TLV("Volume",
491 TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
492 twl4030_dapm_dbypass_tlv);
493
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -0500494/*
495 * Voice Sidetone GAIN volume control:
496 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
497 */
498static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
499
500/* Digital bypass voice: sidetone (VUL -> VDL)*/
501static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
502 SOC_DAPM_SINGLE_TLV("Volume",
503 TWL4030_REG_VSTPGA, 0, 0x29, 0,
504 twl4030_dapm_dbypassv_tlv);
505
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200506static int micpath_event(struct snd_soc_dapm_widget *w,
507 struct snd_kcontrol *kcontrol, int event)
508{
509 struct soc_enum *e = (struct soc_enum *)w->kcontrols->private_value;
510 unsigned char adcmicsel, micbias_ctl;
511
512 adcmicsel = twl4030_read_reg_cache(w->codec, TWL4030_REG_ADCMICSEL);
513 micbias_ctl = twl4030_read_reg_cache(w->codec, TWL4030_REG_MICBIAS_CTL);
514 /* Prepare the bits for the given TX path:
515 * shift_l == 0: TX1 microphone path
516 * shift_l == 2: TX2 microphone path */
517 if (e->shift_l) {
518 /* TX2 microphone path */
519 if (adcmicsel & TWL4030_TX2IN_SEL)
520 micbias_ctl |= TWL4030_MICBIAS2_CTL; /* digimic */
521 else
522 micbias_ctl &= ~TWL4030_MICBIAS2_CTL;
523 } else {
524 /* TX1 microphone path */
525 if (adcmicsel & TWL4030_TX1IN_SEL)
526 micbias_ctl |= TWL4030_MICBIAS1_CTL; /* digimic */
527 else
528 micbias_ctl &= ~TWL4030_MICBIAS1_CTL;
529 }
530
531 twl4030_write(w->codec, TWL4030_REG_MICBIAS_CTL, micbias_ctl);
532
533 return 0;
534}
535
Stanley.Miao49d92c72008-12-11 23:28:10 +0800536static int handsfree_event(struct snd_soc_dapm_widget *w,
537 struct snd_kcontrol *kcontrol, int event)
538{
539 struct soc_enum *e = (struct soc_enum *)w->kcontrols->private_value;
540 unsigned char hs_ctl;
541
542 hs_ctl = twl4030_read_reg_cache(w->codec, e->reg);
543
544 if (hs_ctl & TWL4030_HF_CTL_REF_EN) {
545 hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
546 twl4030_write(w->codec, e->reg, hs_ctl);
547 hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
548 twl4030_write(w->codec, e->reg, hs_ctl);
549 hs_ctl |= TWL4030_HF_CTL_HB_EN;
550 twl4030_write(w->codec, e->reg, hs_ctl);
551 } else {
552 hs_ctl &= ~(TWL4030_HF_CTL_RAMP_EN | TWL4030_HF_CTL_LOOP_EN
553 | TWL4030_HF_CTL_HB_EN);
554 twl4030_write(w->codec, e->reg, hs_ctl);
555 }
556
557 return 0;
558}
559
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200560static int headsetl_event(struct snd_soc_dapm_widget *w,
561 struct snd_kcontrol *kcontrol, int event)
562{
563 unsigned char hs_gain, hs_pop;
564
565 /* Save the current volume */
566 hs_gain = twl4030_read_reg_cache(w->codec, TWL4030_REG_HS_GAIN_SET);
Peter Ujfalusi89492be2009-03-05 12:48:49 +0200567 hs_pop = twl4030_read_reg_cache(w->codec, TWL4030_REG_HS_POPN_SET);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200568
569 switch (event) {
570 case SND_SOC_DAPM_POST_PMU:
571 /* Do the anti-pop/bias ramp enable according to the TRM */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200572 hs_pop |= TWL4030_VMID_EN;
573 twl4030_write(w->codec, TWL4030_REG_HS_POPN_SET, hs_pop);
574 /* Is this needed? Can we just use whatever gain here? */
575 twl4030_write(w->codec, TWL4030_REG_HS_GAIN_SET,
576 (hs_gain & (~0x0f)) | 0x0a);
577 hs_pop |= TWL4030_RAMP_EN;
578 twl4030_write(w->codec, TWL4030_REG_HS_POPN_SET, hs_pop);
579
580 /* Restore the original volume */
581 twl4030_write(w->codec, TWL4030_REG_HS_GAIN_SET, hs_gain);
582 break;
583 case SND_SOC_DAPM_POST_PMD:
584 /* Do the anti-pop/bias ramp disable according to the TRM */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200585 hs_pop &= ~TWL4030_RAMP_EN;
586 twl4030_write(w->codec, TWL4030_REG_HS_POPN_SET, hs_pop);
587 /* Bypass the reg_cache to mute the headset */
588 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
589 hs_gain & (~0x0f),
590 TWL4030_REG_HS_GAIN_SET);
591 hs_pop &= ~TWL4030_VMID_EN;
592 twl4030_write(w->codec, TWL4030_REG_HS_POPN_SET, hs_pop);
593 break;
594 }
595 return 0;
596}
597
Peter Ujfalusi73939582009-01-29 14:57:50 +0200598static int bypass_event(struct snd_soc_dapm_widget *w,
599 struct snd_kcontrol *kcontrol, int event)
600{
601 struct soc_mixer_control *m =
602 (struct soc_mixer_control *)w->kcontrols->private_value;
603 struct twl4030_priv *twl4030 = w->codec->private_data;
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -0500604 unsigned char reg, misc;
Peter Ujfalusi73939582009-01-29 14:57:50 +0200605
606 reg = twl4030_read_reg_cache(w->codec, m->reg);
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200607
608 if (m->reg <= TWL4030_REG_ARXR2_APGA_CTL) {
609 /* Analog bypass */
610 if (reg & (1 << m->shift))
611 twl4030->bypass_state |=
612 (1 << (m->reg - TWL4030_REG_ARXL1_APGA_CTL));
613 else
614 twl4030->bypass_state &=
615 ~(1 << (m->reg - TWL4030_REG_ARXL1_APGA_CTL));
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -0500616 } else if (m->reg == TWL4030_REG_VDL_APGA_CTL) {
617 /* Analog voice bypass */
618 if (reg & (1 << m->shift))
619 twl4030->bypass_state |= (1 << 4);
620 else
621 twl4030->bypass_state &= ~(1 << 4);
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -0500622 } else if (m->reg == TWL4030_REG_VSTPGA) {
623 /* Voice digital bypass */
624 if (reg)
625 twl4030->bypass_state |= (1 << 5);
626 else
627 twl4030->bypass_state &= ~(1 << 5);
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200628 } else {
629 /* Digital bypass */
630 if (reg & (0x7 << m->shift))
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -0500631 twl4030->bypass_state |= (1 << (m->shift ? 7 : 6));
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200632 else
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -0500633 twl4030->bypass_state &= ~(1 << (m->shift ? 7 : 6));
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200634 }
Peter Ujfalusi73939582009-01-29 14:57:50 +0200635
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -0500636 /* Enable master analog loopback mode if any analog switch is enabled*/
637 misc = twl4030_read_reg_cache(w->codec, TWL4030_REG_MISC_SET_1);
638 if (twl4030->bypass_state & 0x1F)
639 misc |= TWL4030_FMLOOP_EN;
640 else
641 misc &= ~TWL4030_FMLOOP_EN;
642 twl4030_write(w->codec, TWL4030_REG_MISC_SET_1, misc);
643
Peter Ujfalusi73939582009-01-29 14:57:50 +0200644 if (w->codec->bias_level == SND_SOC_BIAS_STANDBY) {
645 if (twl4030->bypass_state)
646 twl4030_codec_mute(w->codec, 0);
647 else
648 twl4030_codec_mute(w->codec, 1);
649 }
650 return 0;
651}
652
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200653/*
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200654 * Some of the gain controls in TWL (mostly those which are associated with
655 * the outputs) are implemented in an interesting way:
656 * 0x0 : Power down (mute)
657 * 0x1 : 6dB
658 * 0x2 : 0 dB
659 * 0x3 : -6 dB
660 * Inverting not going to help with these.
661 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
662 */
663#define SOC_DOUBLE_TLV_TWL4030(xname, xreg, shift_left, shift_right, xmax,\
664 xinvert, tlv_array) \
665{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
666 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
667 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
668 .tlv.p = (tlv_array), \
669 .info = snd_soc_info_volsw, \
670 .get = snd_soc_get_volsw_twl4030, \
671 .put = snd_soc_put_volsw_twl4030, \
672 .private_value = (unsigned long)&(struct soc_mixer_control) \
673 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
674 .max = xmax, .invert = xinvert} }
675#define SOC_DOUBLE_R_TLV_TWL4030(xname, reg_left, reg_right, xshift, xmax,\
676 xinvert, tlv_array) \
677{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
678 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
679 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
680 .tlv.p = (tlv_array), \
681 .info = snd_soc_info_volsw_2r, \
682 .get = snd_soc_get_volsw_r2_twl4030,\
683 .put = snd_soc_put_volsw_r2_twl4030, \
684 .private_value = (unsigned long)&(struct soc_mixer_control) \
685 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
Mark Brown64089b82008-12-08 19:17:58 +0000686 .rshift = xshift, .max = xmax, .invert = xinvert} }
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200687#define SOC_SINGLE_TLV_TWL4030(xname, xreg, xshift, xmax, xinvert, tlv_array) \
688 SOC_DOUBLE_TLV_TWL4030(xname, xreg, xshift, xshift, xmax, \
689 xinvert, tlv_array)
690
691static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
692 struct snd_ctl_elem_value *ucontrol)
693{
694 struct soc_mixer_control *mc =
695 (struct soc_mixer_control *)kcontrol->private_value;
696 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
697 unsigned int reg = mc->reg;
698 unsigned int shift = mc->shift;
699 unsigned int rshift = mc->rshift;
700 int max = mc->max;
701 int mask = (1 << fls(max)) - 1;
702
703 ucontrol->value.integer.value[0] =
704 (snd_soc_read(codec, reg) >> shift) & mask;
705 if (ucontrol->value.integer.value[0])
706 ucontrol->value.integer.value[0] =
707 max + 1 - ucontrol->value.integer.value[0];
708
709 if (shift != rshift) {
710 ucontrol->value.integer.value[1] =
711 (snd_soc_read(codec, reg) >> rshift) & mask;
712 if (ucontrol->value.integer.value[1])
713 ucontrol->value.integer.value[1] =
714 max + 1 - ucontrol->value.integer.value[1];
715 }
716
717 return 0;
718}
719
720static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
721 struct snd_ctl_elem_value *ucontrol)
722{
723 struct soc_mixer_control *mc =
724 (struct soc_mixer_control *)kcontrol->private_value;
725 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
726 unsigned int reg = mc->reg;
727 unsigned int shift = mc->shift;
728 unsigned int rshift = mc->rshift;
729 int max = mc->max;
730 int mask = (1 << fls(max)) - 1;
731 unsigned short val, val2, val_mask;
732
733 val = (ucontrol->value.integer.value[0] & mask);
734
735 val_mask = mask << shift;
736 if (val)
737 val = max + 1 - val;
738 val = val << shift;
739 if (shift != rshift) {
740 val2 = (ucontrol->value.integer.value[1] & mask);
741 val_mask |= mask << rshift;
742 if (val2)
743 val2 = max + 1 - val2;
744 val |= val2 << rshift;
745 }
746 return snd_soc_update_bits(codec, reg, val_mask, val);
747}
748
749static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
750 struct snd_ctl_elem_value *ucontrol)
751{
752 struct soc_mixer_control *mc =
753 (struct soc_mixer_control *)kcontrol->private_value;
754 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
755 unsigned int reg = mc->reg;
756 unsigned int reg2 = mc->rreg;
757 unsigned int shift = mc->shift;
758 int max = mc->max;
759 int mask = (1<<fls(max))-1;
760
761 ucontrol->value.integer.value[0] =
762 (snd_soc_read(codec, reg) >> shift) & mask;
763 ucontrol->value.integer.value[1] =
764 (snd_soc_read(codec, reg2) >> shift) & mask;
765
766 if (ucontrol->value.integer.value[0])
767 ucontrol->value.integer.value[0] =
768 max + 1 - ucontrol->value.integer.value[0];
769 if (ucontrol->value.integer.value[1])
770 ucontrol->value.integer.value[1] =
771 max + 1 - ucontrol->value.integer.value[1];
772
773 return 0;
774}
775
776static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
777 struct snd_ctl_elem_value *ucontrol)
778{
779 struct soc_mixer_control *mc =
780 (struct soc_mixer_control *)kcontrol->private_value;
781 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
782 unsigned int reg = mc->reg;
783 unsigned int reg2 = mc->rreg;
784 unsigned int shift = mc->shift;
785 int max = mc->max;
786 int mask = (1 << fls(max)) - 1;
787 int err;
788 unsigned short val, val2, val_mask;
789
790 val_mask = mask << shift;
791 val = (ucontrol->value.integer.value[0] & mask);
792 val2 = (ucontrol->value.integer.value[1] & mask);
793
794 if (val)
795 val = max + 1 - val;
796 if (val2)
797 val2 = max + 1 - val2;
798
799 val = val << shift;
800 val2 = val2 << shift;
801
802 err = snd_soc_update_bits(codec, reg, val_mask, val);
803 if (err < 0)
804 return err;
805
806 err = snd_soc_update_bits(codec, reg2, val_mask, val2);
807 return err;
808}
809
810/*
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200811 * FGAIN volume control:
812 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
813 */
Peter Ujfalusid889a722008-12-01 10:03:46 +0200814static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200815
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +0200816/*
817 * CGAIN volume control:
818 * 0 dB to 12 dB in 6 dB steps
819 * value 2 and 3 means 12 dB
820 */
Peter Ujfalusid889a722008-12-01 10:03:46 +0200821static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
822
823/*
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900824 * Voice Downlink GAIN volume control:
825 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
826 */
827static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
828
829/*
Peter Ujfalusid889a722008-12-01 10:03:46 +0200830 * Analog playback gain
831 * -24 dB to 12 dB in 2 dB steps
832 */
833static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +0200834
Peter Ujfalusi381a22b2008-12-01 10:03:45 +0200835/*
Peter Ujfalusi42902392008-12-01 10:03:47 +0200836 * Gain controls tied to outputs
837 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
838 */
839static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
840
841/*
Joonyoung Shim18cc8d82009-04-28 18:18:05 +0900842 * Gain control for earpiece amplifier
843 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
844 */
845static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
846
847/*
Peter Ujfalusi381a22b2008-12-01 10:03:45 +0200848 * Capture gain after the ADCs
849 * from 0 dB to 31 dB in 1 dB steps
850 */
851static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
852
Grazvydas Ignotas5920b452008-12-02 20:48:58 +0200853/*
854 * Gain control for input amplifiers
855 * 0 dB to 30 dB in 6 dB steps
856 */
857static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
858
Peter Ujfalusi89492be2009-03-05 12:48:49 +0200859static const char *twl4030_rampdelay_texts[] = {
860 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
861 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
862 "3495/2581/1748 ms"
863};
864
865static const struct soc_enum twl4030_rampdelay_enum =
866 SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET, 2,
867 ARRAY_SIZE(twl4030_rampdelay_texts),
868 twl4030_rampdelay_texts);
869
Steve Sakomancc175572008-10-30 21:35:26 -0700870static const struct snd_kcontrol_new twl4030_snd_controls[] = {
Peter Ujfalusid889a722008-12-01 10:03:46 +0200871 /* Common playback gain controls */
872 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
873 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
874 0, 0x3f, 0, digital_fine_tlv),
875 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
876 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
877 0, 0x3f, 0, digital_fine_tlv),
878
879 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
880 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
881 6, 0x2, 0, digital_coarse_tlv),
882 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
883 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
884 6, 0x2, 0, digital_coarse_tlv),
885
886 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
887 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
888 3, 0x12, 1, analog_tlv),
889 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
890 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
891 3, 0x12, 1, analog_tlv),
Peter Ujfalusi44c55872008-12-09 08:45:44 +0200892 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
893 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
894 1, 1, 0),
895 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
896 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
897 1, 1, 0),
Peter Ujfalusi381a22b2008-12-01 10:03:45 +0200898
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900899 /* Common voice downlink gain controls */
900 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
901 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
902
903 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
904 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
905
906 SOC_SINGLE("DAC Voice Analog Downlink Switch",
907 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
908
Peter Ujfalusi42902392008-12-01 10:03:47 +0200909 /* Separate output gain controls */
910 SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume",
911 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
912 4, 3, 0, output_tvl),
913
914 SOC_DOUBLE_TLV_TWL4030("Headset Playback Volume",
915 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, output_tvl),
916
917 SOC_DOUBLE_R_TLV_TWL4030("Carkit Playback Volume",
918 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
919 4, 3, 0, output_tvl),
920
921 SOC_SINGLE_TLV_TWL4030("Earpiece Playback Volume",
Joonyoung Shim18cc8d82009-04-28 18:18:05 +0900922 TWL4030_REG_EAR_CTL, 4, 3, 0, output_ear_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +0200923
Peter Ujfalusi381a22b2008-12-01 10:03:45 +0200924 /* Common capture gain controls */
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200925 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
Peter Ujfalusi381a22b2008-12-01 10:03:45 +0200926 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
927 0, 0x1f, 0, digital_capture_tlv),
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200928 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
929 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
930 0, 0x1f, 0, digital_capture_tlv),
Grazvydas Ignotas5920b452008-12-02 20:48:58 +0200931
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200932 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
Grazvydas Ignotas5920b452008-12-02 20:48:58 +0200933 0, 3, 5, 0, input_gain_tlv),
Peter Ujfalusi89492be2009-03-05 12:48:49 +0200934
935 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
Steve Sakomancc175572008-10-30 21:35:26 -0700936};
937
Steve Sakomancc175572008-10-30 21:35:26 -0700938static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200939 /* Left channel inputs */
940 SND_SOC_DAPM_INPUT("MAINMIC"),
941 SND_SOC_DAPM_INPUT("HSMIC"),
942 SND_SOC_DAPM_INPUT("AUXL"),
943 SND_SOC_DAPM_INPUT("CARKITMIC"),
944 /* Right channel inputs */
945 SND_SOC_DAPM_INPUT("SUBMIC"),
946 SND_SOC_DAPM_INPUT("AUXR"),
947 /* Digital microphones (Stereo) */
948 SND_SOC_DAPM_INPUT("DIGIMIC0"),
949 SND_SOC_DAPM_INPUT("DIGIMIC1"),
Steve Sakomancc175572008-10-30 21:35:26 -0700950
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200951 /* Outputs */
Steve Sakomancc175572008-10-30 21:35:26 -0700952 SND_SOC_DAPM_OUTPUT("OUTL"),
953 SND_SOC_DAPM_OUTPUT("OUTR"),
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200954 SND_SOC_DAPM_OUTPUT("EARPIECE"),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200955 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
956 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200957 SND_SOC_DAPM_OUTPUT("HSOL"),
958 SND_SOC_DAPM_OUTPUT("HSOR"),
Peter Ujfalusi6a1bee42008-12-10 12:51:46 +0200959 SND_SOC_DAPM_OUTPUT("CARKITL"),
960 SND_SOC_DAPM_OUTPUT("CARKITR"),
Peter Ujfalusidf339802008-12-09 12:35:51 +0200961 SND_SOC_DAPM_OUTPUT("HFL"),
962 SND_SOC_DAPM_OUTPUT("HFR"),
Steve Sakomancc175572008-10-30 21:35:26 -0700963
Peter Ujfalusi53b50472008-12-09 08:45:43 +0200964 /* DACs */
Peter Ujfalusi1e5fa312008-12-10 12:51:48 +0200965 SND_SOC_DAPM_DAC("DAC Right1", "Right Front Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +0200966 SND_SOC_NOPM, 0, 0),
Peter Ujfalusi1e5fa312008-12-10 12:51:48 +0200967 SND_SOC_DAPM_DAC("DAC Left1", "Left Front Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +0200968 SND_SOC_NOPM, 0, 0),
Peter Ujfalusi1e5fa312008-12-10 12:51:48 +0200969 SND_SOC_DAPM_DAC("DAC Right2", "Right Rear Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +0200970 SND_SOC_NOPM, 0, 0),
Peter Ujfalusi1e5fa312008-12-10 12:51:48 +0200971 SND_SOC_DAPM_DAC("DAC Left2", "Left Rear Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +0200972 SND_SOC_NOPM, 0, 0),
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900973 SND_SOC_DAPM_DAC("DAC Voice", "Voice Playback",
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -0500974 SND_SOC_NOPM, 0, 0),
Steve Sakomancc175572008-10-30 21:35:26 -0700975
Peter Ujfalusi44c55872008-12-09 08:45:44 +0200976 /* Analog PGAs */
977 SND_SOC_DAPM_PGA("ARXR1_APGA", TWL4030_REG_ARXR1_APGA_CTL,
978 0, 0, NULL, 0),
979 SND_SOC_DAPM_PGA("ARXL1_APGA", TWL4030_REG_ARXL1_APGA_CTL,
980 0, 0, NULL, 0),
981 SND_SOC_DAPM_PGA("ARXR2_APGA", TWL4030_REG_ARXR2_APGA_CTL,
982 0, 0, NULL, 0),
983 SND_SOC_DAPM_PGA("ARXL2_APGA", TWL4030_REG_ARXL2_APGA_CTL,
984 0, 0, NULL, 0),
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900985 SND_SOC_DAPM_PGA("VDL_APGA", TWL4030_REG_VDL_APGA_CTL,
986 0, 0, NULL, 0),
Peter Ujfalusi44c55872008-12-09 08:45:44 +0200987
Peter Ujfalusi73939582009-01-29 14:57:50 +0200988 /* Analog bypasses */
989 SND_SOC_DAPM_SWITCH_E("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
990 &twl4030_dapm_abypassr1_control, bypass_event,
991 SND_SOC_DAPM_POST_REG),
992 SND_SOC_DAPM_SWITCH_E("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
993 &twl4030_dapm_abypassl1_control,
994 bypass_event, SND_SOC_DAPM_POST_REG),
995 SND_SOC_DAPM_SWITCH_E("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
996 &twl4030_dapm_abypassr2_control,
997 bypass_event, SND_SOC_DAPM_POST_REG),
998 SND_SOC_DAPM_SWITCH_E("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
999 &twl4030_dapm_abypassl2_control,
1000 bypass_event, SND_SOC_DAPM_POST_REG),
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001001 SND_SOC_DAPM_SWITCH_E("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
1002 &twl4030_dapm_abypassv_control,
1003 bypass_event, SND_SOC_DAPM_POST_REG),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001004
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001005 /* Digital bypasses */
1006 SND_SOC_DAPM_SWITCH_E("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
1007 &twl4030_dapm_dbypassl_control, bypass_event,
1008 SND_SOC_DAPM_POST_REG),
1009 SND_SOC_DAPM_SWITCH_E("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
1010 &twl4030_dapm_dbypassr_control, bypass_event,
1011 SND_SOC_DAPM_POST_REG),
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -05001012 SND_SOC_DAPM_SWITCH_E("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
1013 &twl4030_dapm_dbypassv_control, bypass_event,
1014 SND_SOC_DAPM_POST_REG),
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001015
Peter Ujfalusi73939582009-01-29 14:57:50 +02001016 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer", TWL4030_REG_AVDAC_CTL,
1017 0, 0, NULL, 0),
1018 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer", TWL4030_REG_AVDAC_CTL,
1019 1, 0, NULL, 0),
1020 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer", TWL4030_REG_AVDAC_CTL,
1021 2, 0, NULL, 0),
1022 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer", TWL4030_REG_AVDAC_CTL,
1023 3, 0, NULL, 0),
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001024 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer", TWL4030_REG_AVDAC_CTL,
1025 4, 0, NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001026
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001027 /* Output MIXER controls */
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001028 /* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001029 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
1030 &twl4030_dapm_earpiece_controls[0],
1031 ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001032 /* PreDrivL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001033 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
1034 &twl4030_dapm_predrivel_controls[0],
1035 ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
1036 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
1037 &twl4030_dapm_predriver_controls[0],
1038 ARRAY_SIZE(twl4030_dapm_predriver_controls)),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001039 /* HeadsetL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001040 SND_SOC_DAPM_MIXER_E("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
1041 &twl4030_dapm_hsol_controls[0],
1042 ARRAY_SIZE(twl4030_dapm_hsol_controls), headsetl_event,
1043 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1044 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
1045 &twl4030_dapm_hsor_controls[0],
1046 ARRAY_SIZE(twl4030_dapm_hsor_controls)),
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001047 /* CarkitL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001048 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
1049 &twl4030_dapm_carkitl_controls[0],
1050 ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
1051 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
1052 &twl4030_dapm_carkitr_controls[0],
1053 ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
1054
1055 /* Output MUX controls */
Peter Ujfalusidf339802008-12-09 12:35:51 +02001056 /* HandsfreeL/R */
Stanley.Miao49d92c72008-12-11 23:28:10 +08001057 SND_SOC_DAPM_MUX_E("HandsfreeL Mux", TWL4030_REG_HFL_CTL, 5, 0,
1058 &twl4030_dapm_handsfreel_control, handsfree_event,
1059 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1060 SND_SOC_DAPM_MUX_E("HandsfreeR Mux", TWL4030_REG_HFR_CTL, 5, 0,
1061 &twl4030_dapm_handsfreer_control, handsfree_event,
1062 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001063
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001064 /* Introducing four virtual ADC, since TWL4030 have four channel for
1065 capture */
1066 SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture",
1067 SND_SOC_NOPM, 0, 0),
1068 SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture",
1069 SND_SOC_NOPM, 0, 0),
1070 SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture",
1071 SND_SOC_NOPM, 0, 0),
1072 SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture",
1073 SND_SOC_NOPM, 0, 0),
1074
1075 /* Analog/Digital mic path selection.
1076 TX1 Left/Right: either analog Left/Right or Digimic0
1077 TX2 Left/Right: either analog Left/Right or Digimic1 */
1078 SND_SOC_DAPM_MUX_E("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
1079 &twl4030_dapm_micpathtx1_control, micpath_event,
1080 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD|
1081 SND_SOC_DAPM_POST_REG),
1082 SND_SOC_DAPM_MUX_E("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
1083 &twl4030_dapm_micpathtx2_control, micpath_event,
1084 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD|
1085 SND_SOC_DAPM_POST_REG),
1086
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001087 /* Analog input muxes with switch for the capture amplifiers */
Peter Ujfalusi2f423572009-01-05 09:54:58 +02001088 SND_SOC_DAPM_VALUE_MUX("Analog Left Capture Route",
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001089 TWL4030_REG_ANAMICL, 4, 0, &twl4030_dapm_analoglmic_control),
Peter Ujfalusi2f423572009-01-05 09:54:58 +02001090 SND_SOC_DAPM_VALUE_MUX("Analog Right Capture Route",
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001091 TWL4030_REG_ANAMICR, 4, 0, &twl4030_dapm_analogrmic_control),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001092
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001093 SND_SOC_DAPM_PGA("ADC Physical Left",
1094 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
1095 SND_SOC_DAPM_PGA("ADC Physical Right",
1096 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001097
1098 SND_SOC_DAPM_PGA("Digimic0 Enable",
1099 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0),
1100 SND_SOC_DAPM_PGA("Digimic1 Enable",
1101 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0),
1102
1103 SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL, 0, 0),
1104 SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL, 1, 0),
1105 SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL, 2, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001106
Steve Sakomancc175572008-10-30 21:35:26 -07001107};
1108
1109static const struct snd_soc_dapm_route intercon[] = {
Peter Ujfalusi73939582009-01-29 14:57:50 +02001110 {"Analog L1 Playback Mixer", NULL, "DAC Left1"},
1111 {"Analog R1 Playback Mixer", NULL, "DAC Right1"},
1112 {"Analog L2 Playback Mixer", NULL, "DAC Left2"},
1113 {"Analog R2 Playback Mixer", NULL, "DAC Right2"},
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001114 {"Analog Voice Playback Mixer", NULL, "DAC Voice"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001115
1116 {"ARXL1_APGA", NULL, "Analog L1 Playback Mixer"},
1117 {"ARXR1_APGA", NULL, "Analog R1 Playback Mixer"},
1118 {"ARXL2_APGA", NULL, "Analog L2 Playback Mixer"},
1119 {"ARXR2_APGA", NULL, "Analog R2 Playback Mixer"},
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001120 {"VDL_APGA", NULL, "Analog Voice Playback Mixer"},
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001121
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001122 /* Internal playback routings */
1123 /* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001124 {"Earpiece Mixer", "Voice", "VDL_APGA"},
1125 {"Earpiece Mixer", "AudioL1", "ARXL1_APGA"},
1126 {"Earpiece Mixer", "AudioL2", "ARXL2_APGA"},
1127 {"Earpiece Mixer", "AudioR1", "ARXR1_APGA"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001128 /* PreDrivL */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001129 {"PredriveL Mixer", "Voice", "VDL_APGA"},
1130 {"PredriveL Mixer", "AudioL1", "ARXL1_APGA"},
1131 {"PredriveL Mixer", "AudioL2", "ARXL2_APGA"},
1132 {"PredriveL Mixer", "AudioR2", "ARXR2_APGA"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001133 /* PreDrivR */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001134 {"PredriveR Mixer", "Voice", "VDL_APGA"},
1135 {"PredriveR Mixer", "AudioR1", "ARXR1_APGA"},
1136 {"PredriveR Mixer", "AudioR2", "ARXR2_APGA"},
1137 {"PredriveR Mixer", "AudioL2", "ARXL2_APGA"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001138 /* HeadsetL */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001139 {"HeadsetL Mixer", "Voice", "VDL_APGA"},
1140 {"HeadsetL Mixer", "AudioL1", "ARXL1_APGA"},
1141 {"HeadsetL Mixer", "AudioL2", "ARXL2_APGA"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001142 /* HeadsetR */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001143 {"HeadsetR Mixer", "Voice", "VDL_APGA"},
1144 {"HeadsetR Mixer", "AudioR1", "ARXR1_APGA"},
1145 {"HeadsetR Mixer", "AudioR2", "ARXR2_APGA"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001146 /* CarkitL */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001147 {"CarkitL Mixer", "Voice", "VDL_APGA"},
1148 {"CarkitL Mixer", "AudioL1", "ARXL1_APGA"},
1149 {"CarkitL Mixer", "AudioL2", "ARXL2_APGA"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001150 /* CarkitR */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001151 {"CarkitR Mixer", "Voice", "VDL_APGA"},
1152 {"CarkitR Mixer", "AudioR1", "ARXR1_APGA"},
1153 {"CarkitR Mixer", "AudioR2", "ARXR2_APGA"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001154 /* HandsfreeL */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001155 {"HandsfreeL Mux", "Voice", "VDL_APGA"},
1156 {"HandsfreeL Mux", "AudioL1", "ARXL1_APGA"},
1157 {"HandsfreeL Mux", "AudioL2", "ARXL2_APGA"},
1158 {"HandsfreeL Mux", "AudioR2", "ARXR2_APGA"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001159 /* HandsfreeR */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001160 {"HandsfreeR Mux", "Voice", "VDL_APGA"},
1161 {"HandsfreeR Mux", "AudioR1", "ARXR1_APGA"},
1162 {"HandsfreeR Mux", "AudioR2", "ARXR2_APGA"},
1163 {"HandsfreeR Mux", "AudioL2", "ARXL2_APGA"},
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001164
Steve Sakomancc175572008-10-30 21:35:26 -07001165 /* outputs */
Peter Ujfalusi44c55872008-12-09 08:45:44 +02001166 {"OUTL", NULL, "ARXL2_APGA"},
1167 {"OUTR", NULL, "ARXR2_APGA"},
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001168 {"EARPIECE", NULL, "Earpiece Mixer"},
1169 {"PREDRIVEL", NULL, "PredriveL Mixer"},
1170 {"PREDRIVER", NULL, "PredriveR Mixer"},
1171 {"HSOL", NULL, "HeadsetL Mixer"},
1172 {"HSOR", NULL, "HeadsetR Mixer"},
1173 {"CARKITL", NULL, "CarkitL Mixer"},
1174 {"CARKITR", NULL, "CarkitR Mixer"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001175 {"HFL", NULL, "HandsfreeL Mux"},
1176 {"HFR", NULL, "HandsfreeR Mux"},
Steve Sakomancc175572008-10-30 21:35:26 -07001177
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001178 /* Capture path */
1179 {"Analog Left Capture Route", "Main mic", "MAINMIC"},
1180 {"Analog Left Capture Route", "Headset mic", "HSMIC"},
1181 {"Analog Left Capture Route", "AUXL", "AUXL"},
1182 {"Analog Left Capture Route", "Carkit mic", "CARKITMIC"},
1183
1184 {"Analog Right Capture Route", "Sub mic", "SUBMIC"},
1185 {"Analog Right Capture Route", "AUXR", "AUXR"},
1186
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001187 {"ADC Physical Left", NULL, "Analog Left Capture Route"},
1188 {"ADC Physical Right", NULL, "Analog Right Capture Route"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001189
1190 {"Digimic0 Enable", NULL, "DIGIMIC0"},
1191 {"Digimic1 Enable", NULL, "DIGIMIC1"},
1192
1193 /* TX1 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001194 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001195 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1196 /* TX1 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001197 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001198 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1199 /* TX2 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001200 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001201 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1202 /* TX2 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001203 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001204 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1205
1206 {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
1207 {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
1208 {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
1209 {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
1210
Peter Ujfalusi73939582009-01-29 14:57:50 +02001211 /* Analog bypass routes */
1212 {"Right1 Analog Loopback", "Switch", "Analog Right Capture Route"},
1213 {"Left1 Analog Loopback", "Switch", "Analog Left Capture Route"},
1214 {"Right2 Analog Loopback", "Switch", "Analog Right Capture Route"},
1215 {"Left2 Analog Loopback", "Switch", "Analog Left Capture Route"},
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001216 {"Voice Analog Loopback", "Switch", "Analog Left Capture Route"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001217
1218 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
1219 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
1220 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
1221 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001222 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001223
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001224 /* Digital bypass routes */
1225 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1226 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -05001227 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001228
1229 {"Analog R2 Playback Mixer", NULL, "Right Digital Loopback"},
1230 {"Analog L2 Playback Mixer", NULL, "Left Digital Loopback"},
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -05001231 {"Analog Voice Playback Mixer", NULL, "Voice Digital Loopback"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001232
Steve Sakomancc175572008-10-30 21:35:26 -07001233};
1234
1235static int twl4030_add_widgets(struct snd_soc_codec *codec)
1236{
1237 snd_soc_dapm_new_controls(codec, twl4030_dapm_widgets,
1238 ARRAY_SIZE(twl4030_dapm_widgets));
1239
1240 snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
1241
1242 snd_soc_dapm_new_widgets(codec);
1243 return 0;
1244}
1245
Steve Sakomancc175572008-10-30 21:35:26 -07001246static int twl4030_set_bias_level(struct snd_soc_codec *codec,
1247 enum snd_soc_bias_level level)
1248{
Peter Ujfalusi73939582009-01-29 14:57:50 +02001249 struct twl4030_priv *twl4030 = codec->private_data;
1250
Steve Sakomancc175572008-10-30 21:35:26 -07001251 switch (level) {
1252 case SND_SOC_BIAS_ON:
Peter Ujfalusi73939582009-01-29 14:57:50 +02001253 twl4030_codec_mute(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001254 break;
1255 case SND_SOC_BIAS_PREPARE:
Peter Ujfalusi73939582009-01-29 14:57:50 +02001256 twl4030_power_up(codec);
1257 if (twl4030->bypass_state)
1258 twl4030_codec_mute(codec, 0);
1259 else
1260 twl4030_codec_mute(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001261 break;
1262 case SND_SOC_BIAS_STANDBY:
Peter Ujfalusi73939582009-01-29 14:57:50 +02001263 twl4030_power_up(codec);
1264 if (twl4030->bypass_state)
1265 twl4030_codec_mute(codec, 0);
1266 else
1267 twl4030_codec_mute(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001268 break;
1269 case SND_SOC_BIAS_OFF:
1270 twl4030_power_down(codec);
1271 break;
1272 }
1273 codec->bias_level = level;
1274
1275 return 0;
1276}
1277
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001278static void twl4030_constraints(struct twl4030_priv *twl4030,
1279 struct snd_pcm_substream *mst_substream)
1280{
1281 struct snd_pcm_substream *slv_substream;
1282
1283 /* Pick the stream, which need to be constrained */
1284 if (mst_substream == twl4030->master_substream)
1285 slv_substream = twl4030->slave_substream;
1286 else if (mst_substream == twl4030->slave_substream)
1287 slv_substream = twl4030->master_substream;
1288 else /* This should not happen.. */
1289 return;
1290
1291 /* Set the constraints according to the already configured stream */
1292 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1293 SNDRV_PCM_HW_PARAM_RATE,
1294 twl4030->rate,
1295 twl4030->rate);
1296
1297 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1298 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1299 twl4030->sample_bits,
1300 twl4030->sample_bits);
1301
1302 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1303 SNDRV_PCM_HW_PARAM_CHANNELS,
1304 twl4030->channels,
1305 twl4030->channels);
1306}
1307
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001308/* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1309 * capture has to be enabled/disabled. */
1310static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
1311 int enable)
1312{
1313 u8 reg, mask;
1314
1315 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1316
1317 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1318 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
1319 else
1320 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1321
1322 if (enable)
1323 reg |= mask;
1324 else
1325 reg &= ~mask;
1326
1327 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1328}
1329
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001330static int twl4030_startup(struct snd_pcm_substream *substream,
1331 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001332{
1333 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1334 struct snd_soc_device *socdev = rtd->socdev;
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001335 struct snd_soc_codec *codec = socdev->card->codec;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001336 struct twl4030_priv *twl4030 = codec->private_data;
1337
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001338 if (twl4030->master_substream) {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001339 twl4030->slave_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001340 /* The DAI has one configuration for playback and capture, so
1341 * if the DAI has been already configured then constrain this
1342 * substream to match it. */
1343 if (twl4030->configured)
1344 twl4030_constraints(twl4030, twl4030->master_substream);
1345 } else {
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001346 if (!(twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) &
1347 TWL4030_OPTION_1)) {
1348 /* In option2 4 channel is not supported, set the
1349 * constraint for the first stream for channels, the
1350 * second stream will 'inherit' this cosntraint */
1351 snd_pcm_hw_constraint_minmax(substream->runtime,
1352 SNDRV_PCM_HW_PARAM_CHANNELS,
1353 2, 2);
1354 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001355 twl4030->master_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001356 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001357
1358 return 0;
1359}
1360
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001361static void twl4030_shutdown(struct snd_pcm_substream *substream,
1362 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001363{
1364 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1365 struct snd_soc_device *socdev = rtd->socdev;
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001366 struct snd_soc_codec *codec = socdev->card->codec;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001367 struct twl4030_priv *twl4030 = codec->private_data;
1368
1369 if (twl4030->master_substream == substream)
1370 twl4030->master_substream = twl4030->slave_substream;
1371
1372 twl4030->slave_substream = NULL;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001373
1374 /* If all streams are closed, or the remaining stream has not yet
1375 * been configured than set the DAI as not configured. */
1376 if (!twl4030->master_substream)
1377 twl4030->configured = 0;
1378 else if (!twl4030->master_substream->runtime->channels)
1379 twl4030->configured = 0;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001380
1381 /* If the closing substream had 4 channel, do the necessary cleanup */
1382 if (substream->runtime->channels == 4)
1383 twl4030_tdm_enable(codec, substream->stream, 0);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001384}
1385
Steve Sakomancc175572008-10-30 21:35:26 -07001386static int twl4030_hw_params(struct snd_pcm_substream *substream,
Mark Browndee89c42008-11-18 22:11:38 +00001387 struct snd_pcm_hw_params *params,
1388 struct snd_soc_dai *dai)
Steve Sakomancc175572008-10-30 21:35:26 -07001389{
1390 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1391 struct snd_soc_device *socdev = rtd->socdev;
Mark Brown6627a652009-01-23 22:55:23 +00001392 struct snd_soc_codec *codec = socdev->card->codec;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001393 struct twl4030_priv *twl4030 = codec->private_data;
Steve Sakomancc175572008-10-30 21:35:26 -07001394 u8 mode, old_mode, format, old_format;
1395
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001396 /* If the substream has 4 channel, do the necessary setup */
1397 if (params_channels(params) == 4) {
1398 /* Safety check: are we in the correct operating mode? */
1399 if ((twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) &
1400 TWL4030_OPTION_1))
1401 twl4030_tdm_enable(codec, substream->stream, 1);
1402 else
1403 return -EINVAL;
1404 }
1405
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001406 if (twl4030->configured)
1407 /* Ignoring hw_params for already configured DAI */
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001408 return 0;
1409
Steve Sakomancc175572008-10-30 21:35:26 -07001410 /* bit rate */
1411 old_mode = twl4030_read_reg_cache(codec,
1412 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
1413 mode = old_mode & ~TWL4030_APLL_RATE;
1414
1415 switch (params_rate(params)) {
1416 case 8000:
1417 mode |= TWL4030_APLL_RATE_8000;
1418 break;
1419 case 11025:
1420 mode |= TWL4030_APLL_RATE_11025;
1421 break;
1422 case 12000:
1423 mode |= TWL4030_APLL_RATE_12000;
1424 break;
1425 case 16000:
1426 mode |= TWL4030_APLL_RATE_16000;
1427 break;
1428 case 22050:
1429 mode |= TWL4030_APLL_RATE_22050;
1430 break;
1431 case 24000:
1432 mode |= TWL4030_APLL_RATE_24000;
1433 break;
1434 case 32000:
1435 mode |= TWL4030_APLL_RATE_32000;
1436 break;
1437 case 44100:
1438 mode |= TWL4030_APLL_RATE_44100;
1439 break;
1440 case 48000:
1441 mode |= TWL4030_APLL_RATE_48000;
1442 break;
Peter Ujfalusi103f2112009-04-03 14:39:05 +03001443 case 96000:
1444 mode |= TWL4030_APLL_RATE_96000;
1445 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001446 default:
1447 printk(KERN_ERR "TWL4030 hw params: unknown rate %d\n",
1448 params_rate(params));
1449 return -EINVAL;
1450 }
1451
1452 if (mode != old_mode) {
1453 /* change rate and set CODECPDZ */
Peter Ujfalusi73939582009-01-29 14:57:50 +02001454 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001455 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +02001456 twl4030_codec_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001457 }
1458
1459 /* sample size */
1460 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1461 format = old_format;
1462 format &= ~TWL4030_DATA_WIDTH;
1463 switch (params_format(params)) {
1464 case SNDRV_PCM_FORMAT_S16_LE:
1465 format |= TWL4030_DATA_WIDTH_16S_16W;
1466 break;
1467 case SNDRV_PCM_FORMAT_S24_LE:
1468 format |= TWL4030_DATA_WIDTH_32S_24W;
1469 break;
1470 default:
1471 printk(KERN_ERR "TWL4030 hw params: unknown format %d\n",
1472 params_format(params));
1473 return -EINVAL;
1474 }
1475
1476 if (format != old_format) {
1477
1478 /* clear CODECPDZ before changing format (codec requirement) */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +02001479 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001480
1481 /* change format */
1482 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1483
1484 /* set CODECPDZ afterwards */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +02001485 twl4030_codec_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001486 }
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001487
1488 /* Store the important parameters for the DAI configuration and set
1489 * the DAI as configured */
1490 twl4030->configured = 1;
1491 twl4030->rate = params_rate(params);
1492 twl4030->sample_bits = hw_param_interval(params,
1493 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
1494 twl4030->channels = params_channels(params);
1495
1496 /* If both playback and capture streams are open, and one of them
1497 * is setting the hw parameters right now (since we are here), set
1498 * constraints to the other stream to match the current one. */
1499 if (twl4030->slave_substream)
1500 twl4030_constraints(twl4030, substream);
1501
Steve Sakomancc175572008-10-30 21:35:26 -07001502 return 0;
1503}
1504
1505static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1506 int clk_id, unsigned int freq, int dir)
1507{
1508 struct snd_soc_codec *codec = codec_dai->codec;
1509 u8 infreq;
1510
1511 switch (freq) {
1512 case 19200000:
1513 infreq = TWL4030_APLL_INFREQ_19200KHZ;
1514 break;
1515 case 26000000:
1516 infreq = TWL4030_APLL_INFREQ_26000KHZ;
1517 break;
1518 case 38400000:
1519 infreq = TWL4030_APLL_INFREQ_38400KHZ;
1520 break;
1521 default:
1522 printk(KERN_ERR "TWL4030 set sysclk: unknown rate %d\n",
1523 freq);
1524 return -EINVAL;
1525 }
1526
1527 infreq |= TWL4030_APLL_EN;
1528 twl4030_write(codec, TWL4030_REG_APLL_CTL, infreq);
1529
1530 return 0;
1531}
1532
1533static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai,
1534 unsigned int fmt)
1535{
1536 struct snd_soc_codec *codec = codec_dai->codec;
1537 u8 old_format, format;
1538
1539 /* get format */
1540 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1541 format = old_format;
1542
1543 /* set master/slave audio interface */
1544 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1545 case SND_SOC_DAIFMT_CBM_CFM:
1546 format &= ~(TWL4030_AIF_SLAVE_EN);
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001547 format &= ~(TWL4030_CLK256FS_EN);
Steve Sakomancc175572008-10-30 21:35:26 -07001548 break;
1549 case SND_SOC_DAIFMT_CBS_CFS:
Steve Sakomancc175572008-10-30 21:35:26 -07001550 format |= TWL4030_AIF_SLAVE_EN;
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001551 format |= TWL4030_CLK256FS_EN;
Steve Sakomancc175572008-10-30 21:35:26 -07001552 break;
1553 default:
1554 return -EINVAL;
1555 }
1556
1557 /* interface format */
1558 format &= ~TWL4030_AIF_FORMAT;
1559 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1560 case SND_SOC_DAIFMT_I2S:
1561 format |= TWL4030_AIF_FORMAT_CODEC;
1562 break;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001563 case SND_SOC_DAIFMT_DSP_A:
1564 format |= TWL4030_AIF_FORMAT_TDM;
1565 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001566 default:
1567 return -EINVAL;
1568 }
1569
1570 if (format != old_format) {
1571
1572 /* clear CODECPDZ before changing format (codec requirement) */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +02001573 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001574
1575 /* change format */
1576 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1577
1578 /* set CODECPDZ afterwards */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +02001579 twl4030_codec_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001580 }
1581
1582 return 0;
1583}
1584
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001585static int twl4030_voice_startup(struct snd_pcm_substream *substream,
1586 struct snd_soc_dai *dai)
1587{
1588 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1589 struct snd_soc_device *socdev = rtd->socdev;
1590 struct snd_soc_codec *codec = socdev->card->codec;
1591 u8 infreq;
1592 u8 mode;
1593
1594 /* If the system master clock is not 26MHz, the voice PCM interface is
1595 * not avilable.
1596 */
1597 infreq = twl4030_read_reg_cache(codec, TWL4030_REG_APLL_CTL)
1598 & TWL4030_APLL_INFREQ;
1599
1600 if (infreq != TWL4030_APLL_INFREQ_26000KHZ) {
1601 printk(KERN_ERR "TWL4030 voice startup: "
1602 "MCLK is not 26MHz, call set_sysclk() on init\n");
1603 return -EINVAL;
1604 }
1605
1606 /* If the codec mode is not option2, the voice PCM interface is not
1607 * avilable.
1608 */
1609 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
1610 & TWL4030_OPT_MODE;
1611
1612 if (mode != TWL4030_OPTION_2) {
1613 printk(KERN_ERR "TWL4030 voice startup: "
1614 "the codec mode is not option2\n");
1615 return -EINVAL;
1616 }
1617
1618 return 0;
1619}
1620
1621static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
1622 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1623{
1624 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1625 struct snd_soc_device *socdev = rtd->socdev;
1626 struct snd_soc_codec *codec = socdev->card->codec;
1627 u8 old_mode, mode;
1628
1629 /* bit rate */
1630 old_mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
1631 & ~(TWL4030_CODECPDZ);
1632 mode = old_mode;
1633
1634 switch (params_rate(params)) {
1635 case 8000:
1636 mode &= ~(TWL4030_SEL_16K);
1637 break;
1638 case 16000:
1639 mode |= TWL4030_SEL_16K;
1640 break;
1641 default:
1642 printk(KERN_ERR "TWL4030 voice hw params: unknown rate %d\n",
1643 params_rate(params));
1644 return -EINVAL;
1645 }
1646
1647 if (mode != old_mode) {
1648 /* change rate and set CODECPDZ */
1649 twl4030_codec_enable(codec, 0);
1650 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1651 twl4030_codec_enable(codec, 1);
1652 }
1653
1654 return 0;
1655}
1656
1657static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1658 int clk_id, unsigned int freq, int dir)
1659{
1660 struct snd_soc_codec *codec = codec_dai->codec;
1661 u8 infreq;
1662
1663 switch (freq) {
1664 case 26000000:
1665 infreq = TWL4030_APLL_INFREQ_26000KHZ;
1666 break;
1667 default:
1668 printk(KERN_ERR "TWL4030 voice set sysclk: unknown rate %d\n",
1669 freq);
1670 return -EINVAL;
1671 }
1672
1673 infreq |= TWL4030_APLL_EN;
1674 twl4030_write(codec, TWL4030_REG_APLL_CTL, infreq);
1675
1676 return 0;
1677}
1678
1679static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
1680 unsigned int fmt)
1681{
1682 struct snd_soc_codec *codec = codec_dai->codec;
1683 u8 old_format, format;
1684
1685 /* get format */
1686 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
1687 format = old_format;
1688
1689 /* set master/slave audio interface */
1690 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1691 case SND_SOC_DAIFMT_CBS_CFM:
1692 format &= ~(TWL4030_VIF_SLAVE_EN);
1693 break;
1694 case SND_SOC_DAIFMT_CBS_CFS:
1695 format |= TWL4030_VIF_SLAVE_EN;
1696 break;
1697 default:
1698 return -EINVAL;
1699 }
1700
1701 /* clock inversion */
1702 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1703 case SND_SOC_DAIFMT_IB_NF:
1704 format &= ~(TWL4030_VIF_FORMAT);
1705 break;
1706 case SND_SOC_DAIFMT_NB_IF:
1707 format |= TWL4030_VIF_FORMAT;
1708 break;
1709 default:
1710 return -EINVAL;
1711 }
1712
1713 if (format != old_format) {
1714 /* change format and set CODECPDZ */
1715 twl4030_codec_enable(codec, 0);
1716 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
1717 twl4030_codec_enable(codec, 1);
1718 }
1719
1720 return 0;
1721}
1722
Jarkko Nikulabbba9442008-11-12 17:05:41 +02001723#define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
Steve Sakomancc175572008-10-30 21:35:26 -07001724#define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE)
1725
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09001726static struct snd_soc_dai_ops twl4030_dai_ops = {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001727 .startup = twl4030_startup,
1728 .shutdown = twl4030_shutdown,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09001729 .hw_params = twl4030_hw_params,
1730 .set_sysclk = twl4030_set_dai_sysclk,
1731 .set_fmt = twl4030_set_dai_fmt,
1732};
1733
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001734static struct snd_soc_dai_ops twl4030_dai_voice_ops = {
1735 .startup = twl4030_voice_startup,
1736 .hw_params = twl4030_voice_hw_params,
1737 .set_sysclk = twl4030_voice_set_dai_sysclk,
1738 .set_fmt = twl4030_voice_set_dai_fmt,
1739};
1740
1741struct snd_soc_dai twl4030_dai[] = {
1742{
Steve Sakomancc175572008-10-30 21:35:26 -07001743 .name = "twl4030",
1744 .playback = {
1745 .stream_name = "Playback",
1746 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001747 .channels_max = 4,
Peter Ujfalusi31ad0f32009-03-27 10:39:07 +02001748 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
Steve Sakomancc175572008-10-30 21:35:26 -07001749 .formats = TWL4030_FORMATS,},
1750 .capture = {
1751 .stream_name = "Capture",
1752 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001753 .channels_max = 4,
Steve Sakomancc175572008-10-30 21:35:26 -07001754 .rates = TWL4030_RATES,
1755 .formats = TWL4030_FORMATS,},
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09001756 .ops = &twl4030_dai_ops,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001757},
1758{
1759 .name = "twl4030 Voice",
1760 .playback = {
1761 .stream_name = "Playback",
1762 .channels_min = 1,
1763 .channels_max = 1,
1764 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
1765 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
1766 .capture = {
1767 .stream_name = "Capture",
1768 .channels_min = 1,
1769 .channels_max = 2,
1770 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
1771 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
1772 .ops = &twl4030_dai_voice_ops,
1773},
Steve Sakomancc175572008-10-30 21:35:26 -07001774};
1775EXPORT_SYMBOL_GPL(twl4030_dai);
1776
1777static int twl4030_suspend(struct platform_device *pdev, pm_message_t state)
1778{
1779 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Mark Brown6627a652009-01-23 22:55:23 +00001780 struct snd_soc_codec *codec = socdev->card->codec;
Steve Sakomancc175572008-10-30 21:35:26 -07001781
1782 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
1783
1784 return 0;
1785}
1786
1787static int twl4030_resume(struct platform_device *pdev)
1788{
1789 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Mark Brown6627a652009-01-23 22:55:23 +00001790 struct snd_soc_codec *codec = socdev->card->codec;
Steve Sakomancc175572008-10-30 21:35:26 -07001791
1792 twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1793 twl4030_set_bias_level(codec, codec->suspend_bias_level);
1794 return 0;
1795}
1796
1797/*
1798 * initialize the driver
1799 * register the mixer and dsp interfaces with the kernel
1800 */
1801
1802static int twl4030_init(struct snd_soc_device *socdev)
1803{
Mark Brown6627a652009-01-23 22:55:23 +00001804 struct snd_soc_codec *codec = socdev->card->codec;
Steve Sakomancc175572008-10-30 21:35:26 -07001805 int ret = 0;
1806
1807 printk(KERN_INFO "TWL4030 Audio Codec init \n");
1808
1809 codec->name = "twl4030";
1810 codec->owner = THIS_MODULE;
1811 codec->read = twl4030_read_reg_cache;
1812 codec->write = twl4030_write;
1813 codec->set_bias_level = twl4030_set_bias_level;
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001814 codec->dai = twl4030_dai;
1815 codec->num_dai = ARRAY_SIZE(twl4030_dai),
Steve Sakomancc175572008-10-30 21:35:26 -07001816 codec->reg_cache_size = sizeof(twl4030_reg);
1817 codec->reg_cache = kmemdup(twl4030_reg, sizeof(twl4030_reg),
1818 GFP_KERNEL);
1819 if (codec->reg_cache == NULL)
1820 return -ENOMEM;
1821
1822 /* register pcms */
1823 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
1824 if (ret < 0) {
1825 printk(KERN_ERR "twl4030: failed to create pcms\n");
1826 goto pcm_err;
1827 }
1828
1829 twl4030_init_chip(codec);
1830
1831 /* power on device */
1832 twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1833
Ian Molton3e8e1952009-01-09 00:23:21 +00001834 snd_soc_add_controls(codec, twl4030_snd_controls,
1835 ARRAY_SIZE(twl4030_snd_controls));
Steve Sakomancc175572008-10-30 21:35:26 -07001836 twl4030_add_widgets(codec);
1837
Mark Brown968a6022008-11-28 11:49:07 +00001838 ret = snd_soc_init_card(socdev);
Steve Sakomancc175572008-10-30 21:35:26 -07001839 if (ret < 0) {
1840 printk(KERN_ERR "twl4030: failed to register card\n");
1841 goto card_err;
1842 }
1843
1844 return ret;
1845
1846card_err:
1847 snd_soc_free_pcms(socdev);
1848 snd_soc_dapm_free(socdev);
1849pcm_err:
1850 kfree(codec->reg_cache);
1851 return ret;
1852}
1853
1854static struct snd_soc_device *twl4030_socdev;
1855
1856static int twl4030_probe(struct platform_device *pdev)
1857{
1858 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1859 struct snd_soc_codec *codec;
Peter Ujfalusi73939582009-01-29 14:57:50 +02001860 struct twl4030_priv *twl4030;
Steve Sakomancc175572008-10-30 21:35:26 -07001861
1862 codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
1863 if (codec == NULL)
1864 return -ENOMEM;
1865
Peter Ujfalusi73939582009-01-29 14:57:50 +02001866 twl4030 = kzalloc(sizeof(struct twl4030_priv), GFP_KERNEL);
1867 if (twl4030 == NULL) {
1868 kfree(codec);
1869 return -ENOMEM;
1870 }
1871
1872 codec->private_data = twl4030;
Mark Brown6627a652009-01-23 22:55:23 +00001873 socdev->card->codec = codec;
Steve Sakomancc175572008-10-30 21:35:26 -07001874 mutex_init(&codec->mutex);
1875 INIT_LIST_HEAD(&codec->dapm_widgets);
1876 INIT_LIST_HEAD(&codec->dapm_paths);
1877
1878 twl4030_socdev = socdev;
1879 twl4030_init(socdev);
1880
1881 return 0;
1882}
1883
1884static int twl4030_remove(struct platform_device *pdev)
1885{
1886 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Mark Brown6627a652009-01-23 22:55:23 +00001887 struct snd_soc_codec *codec = socdev->card->codec;
Steve Sakomancc175572008-10-30 21:35:26 -07001888
1889 printk(KERN_INFO "TWL4030 Audio Codec remove\n");
Peter Ujfalusi73939582009-01-29 14:57:50 +02001890 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
Peter Ujfalusic6d1662b2009-01-08 15:52:43 +02001891 snd_soc_free_pcms(socdev);
1892 snd_soc_dapm_free(socdev);
Peter Ujfalusi73939582009-01-29 14:57:50 +02001893 kfree(codec->private_data);
Steve Sakomancc175572008-10-30 21:35:26 -07001894 kfree(codec);
1895
1896 return 0;
1897}
1898
1899struct snd_soc_codec_device soc_codec_dev_twl4030 = {
1900 .probe = twl4030_probe,
1901 .remove = twl4030_remove,
1902 .suspend = twl4030_suspend,
1903 .resume = twl4030_resume,
1904};
1905EXPORT_SYMBOL_GPL(soc_codec_dev_twl4030);
1906
Takashi Iwai24e07db2008-12-10 07:40:24 +01001907static int __init twl4030_modinit(void)
Mark Brown64089b82008-12-08 19:17:58 +00001908{
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001909 return snd_soc_register_dais(&twl4030_dai[0], ARRAY_SIZE(twl4030_dai));
Mark Brown64089b82008-12-08 19:17:58 +00001910}
Takashi Iwai24e07db2008-12-10 07:40:24 +01001911module_init(twl4030_modinit);
Mark Brown64089b82008-12-08 19:17:58 +00001912
1913static void __exit twl4030_exit(void)
1914{
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001915 snd_soc_unregister_dais(&twl4030_dai[0], ARRAY_SIZE(twl4030_dai));
Mark Brown64089b82008-12-08 19:17:58 +00001916}
1917module_exit(twl4030_exit);
1918
Steve Sakomancc175572008-10-30 21:35:26 -07001919MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
1920MODULE_AUTHOR("Steve Sakoman");
1921MODULE_LICENSE("GPL");