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gerrit-public.fairphone.software / kernel / msm-5.4 / 3a61a5dae49bf3d1afb7f75c8acb3607f26565af / . / arch / arm / boot / dts / at91sam9g20.dtsi
blob: a100db03ec90f511dda6f9cbe45ea9ab96c73401 [file] [log] [blame]
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]1/*
2 * at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC
3 *
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 *
8 * Licensed under GPLv2 or later.
9 */
10
11/include/ "skeleton.dtsi"
12
13/ {
14 model = "Atmel AT91SAM9G20 family SoC";
15 compatible = "atmel,at91sam9g20";
16 interrupt-parent = <&aic>;
17
18 aliases {
19 serial0 = &dbgu;
20 serial1 = &usart0;
21 serial2 = &usart1;
22 serial3 = &usart2;
23 serial4 = &usart3;
24 serial5 = &usart4;
25 serial6 = &usart5;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100[diff] [blame]26 gpio0 = &pioA;
27 gpio1 = &pioB;
28 gpio2 = &pioC;
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +0100[diff] [blame^]29 tcb0 = &tcb0;
30 tcb1 = &tcb1;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]31 };
32 cpus {
33 cpu@0 {
34 compatible = "arm,arm926ejs";
35 };
36 };
37
38 memory@20000000 {
39 reg = <0x20000000 0x08000000>;
40 };
41
42 ahb {
43 compatible = "simple-bus";
44 #address-cells = <1>;
45 #size-cells = <1>;
46 ranges;
47
48 apb {
49 compatible = "simple-bus";
50 #address-cells = <1>;
51 #size-cells = <1>;
52 ranges;
53
54 aic: interrupt-controller@fffff000 {
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]55 #interrupt-cells = <2>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]56 compatible = "atmel,at91rm9200-aic";
57 interrupt-controller;
58 interrupt-parent;
59 reg = <0xfffff000 0x200>;
60 };
61
Jean-Christophe PLAGNIOL-VILLARD23fa6482012-02-27 11:19:34 +0100[diff] [blame]62 pit: timer@fffffd30 {
63 compatible = "atmel,at91sam9260-pit";
64 reg = <0xfffffd30 0xf>;
65 interrupts = <1 4>;
66 };
67
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +0100[diff] [blame^]68 tcb0: timer@fffa0000 {
69 compatible = "atmel,at91rm9200-tcb";
70 reg = <0xfffa0000 0x100>;
71 interrupts = <17 4 18 4 19 4>;
72 };
73
74 tcb1: timer@fffdc000 {
75 compatible = "atmel,at91rm9200-tcb";
76 reg = <0xfffdc000 0x100>;
77 interrupts = <26 4 27 4 28 4>;
78 };
79
Nicolas Ferre21f81872012-02-11 15:41:40 +0100[diff] [blame]80 pioA: gpio@fffff400 {
81 compatible = "atmel,at91rm9200-gpio";
82 reg = <0xfffff400 0x100>;
83 interrupts = <2 4>;
84 #gpio-cells = <2>;
85 gpio-controller;
86 interrupt-controller;
87 };
88
89 pioB: gpio@fffff600 {
90 compatible = "atmel,at91rm9200-gpio";
91 reg = <0xfffff600 0x100>;
92 interrupts = <3 4>;
93 #gpio-cells = <2>;
94 gpio-controller;
95 interrupt-controller;
96 };
97
98 pioC: gpio@fffff800 {
99 compatible = "atmel,at91rm9200-gpio";
100 reg = <0xfffff800 0x100>;
101 interrupts = <4 4>;
102 #gpio-cells = <2>;
103 gpio-controller;
104 interrupt-controller;
105 };
106
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]107 dbgu: serial@fffff200 {
108 compatible = "atmel,at91sam9260-usart";
109 reg = <0xfffff200 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]110 interrupts = <1 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]111 status = "disabled";
112 };
113
114 usart0: serial@fffb0000 {
115 compatible = "atmel,at91sam9260-usart";
116 reg = <0xfffb0000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]117 interrupts = <6 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]118 atmel,use-dma-rx;
119 atmel,use-dma-tx;
120 status = "disabled";
121 };
122
123 usart1: serial@fffb4000 {
124 compatible = "atmel,at91sam9260-usart";
125 reg = <0xfffb4000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]126 interrupts = <7 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]127 atmel,use-dma-rx;
128 atmel,use-dma-tx;
129 status = "disabled";
130 };
131
132 usart2: serial@fffb8000 {
133 compatible = "atmel,at91sam9260-usart";
134 reg = <0xfffb8000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]135 interrupts = <8 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]136 atmel,use-dma-rx;
137 atmel,use-dma-tx;
138 status = "disabled";
139 };
140
141 usart3: serial@fffd0000 {
142 compatible = "atmel,at91sam9260-usart";
143 reg = <0xfffd0000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]144 interrupts = <23 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]145 atmel,use-dma-rx;
146 atmel,use-dma-tx;
147 status = "disabled";
148 };
149
150 usart4: serial@fffd4000 {
151 compatible = "atmel,at91sam9260-usart";
152 reg = <0xfffd4000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]153 interrupts = <24 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]154 atmel,use-dma-rx;
155 atmel,use-dma-tx;
156 status = "disabled";
157 };
158
159 usart5: serial@fffd8000 {
160 compatible = "atmel,at91sam9260-usart";
161 reg = <0xfffd8000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]162 interrupts = <25 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]163 atmel,use-dma-rx;
164 atmel,use-dma-tx;
165 status = "disabled";
166 };
Nicolas Ferre0d4f99d2011-12-05 18:03:05 +0100[diff] [blame]167
168 macb0: ethernet@fffc4000 {
169 compatible = "cdns,at32ap7000-macb", "cdns,macb";
170 reg = <0xfffc4000 0x100>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]171 interrupts = <21 4>;
Nicolas Ferre0d4f99d2011-12-05 18:03:05 +0100[diff] [blame]172 status = "disabled";
173 };
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]174 };
175 };
176};