Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2007 David Airlie |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 21 | * DEALINGS IN THE SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * David Airlie |
| 25 | */ |
| 26 | #include <linux/module.h> |
| 27 | #include <linux/slab.h> |
Alex Deucher | 7c1fa1d | 2016-08-27 12:37:22 -0400 | [diff] [blame] | 28 | #include <linux/pm_runtime.h> |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 29 | |
| 30 | #include <drm/drmP.h> |
| 31 | #include <drm/drm_crtc.h> |
| 32 | #include <drm/drm_crtc_helper.h> |
| 33 | #include <drm/amdgpu_drm.h> |
| 34 | #include "amdgpu.h" |
Marek Olšák | fbd76d5 | 2015-05-14 23:48:26 +0200 | [diff] [blame] | 35 | #include "cikd.h" |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 36 | |
| 37 | #include <drm/drm_fb_helper.h> |
| 38 | |
| 39 | #include <linux/vga_switcheroo.h> |
| 40 | |
Christian König | 5d43be0 | 2017-10-26 18:06:23 +0200 | [diff] [blame] | 41 | #include "amdgpu_display.h" |
| 42 | |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 43 | /* object hierarchy - |
| 44 | this contains a helper + a amdgpu fb |
| 45 | the helper contains a pointer to amdgpu framebuffer baseclass. |
| 46 | */ |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 47 | |
Alex Deucher | 7c1fa1d | 2016-08-27 12:37:22 -0400 | [diff] [blame] | 48 | static int |
| 49 | amdgpufb_open(struct fb_info *info, int user) |
| 50 | { |
| 51 | struct amdgpu_fbdev *rfbdev = info->par; |
| 52 | struct amdgpu_device *adev = rfbdev->adev; |
| 53 | int ret = pm_runtime_get_sync(adev->ddev->dev); |
| 54 | if (ret < 0 && ret != -EACCES) { |
| 55 | pm_runtime_mark_last_busy(adev->ddev->dev); |
| 56 | pm_runtime_put_autosuspend(adev->ddev->dev); |
| 57 | return ret; |
| 58 | } |
| 59 | return 0; |
| 60 | } |
| 61 | |
| 62 | static int |
| 63 | amdgpufb_release(struct fb_info *info, int user) |
| 64 | { |
| 65 | struct amdgpu_fbdev *rfbdev = info->par; |
| 66 | struct amdgpu_device *adev = rfbdev->adev; |
| 67 | |
| 68 | pm_runtime_mark_last_busy(adev->ddev->dev); |
| 69 | pm_runtime_put_autosuspend(adev->ddev->dev); |
| 70 | return 0; |
| 71 | } |
| 72 | |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 73 | static struct fb_ops amdgpufb_ops = { |
| 74 | .owner = THIS_MODULE, |
Stefan Christ | ea4ffff | 2016-11-14 00:03:13 +0100 | [diff] [blame] | 75 | DRM_FB_HELPER_DEFAULT_OPS, |
Alex Deucher | 7c1fa1d | 2016-08-27 12:37:22 -0400 | [diff] [blame] | 76 | .fb_open = amdgpufb_open, |
| 77 | .fb_release = amdgpufb_release, |
Archit Taneja | 2dbaf392 | 2015-07-31 16:22:00 +0530 | [diff] [blame] | 78 | .fb_fillrect = drm_fb_helper_cfb_fillrect, |
| 79 | .fb_copyarea = drm_fb_helper_cfb_copyarea, |
| 80 | .fb_imageblit = drm_fb_helper_cfb_imageblit, |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 81 | }; |
| 82 | |
| 83 | |
Laurent Pinchart | 8e911ab | 2016-10-18 01:41:17 +0300 | [diff] [blame] | 84 | int amdgpu_align_pitch(struct amdgpu_device *adev, int width, int cpp, bool tiled) |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 85 | { |
| 86 | int aligned = width; |
| 87 | int pitch_mask = 0; |
| 88 | |
Laurent Pinchart | 8e911ab | 2016-10-18 01:41:17 +0300 | [diff] [blame] | 89 | switch (cpp) { |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 90 | case 1: |
| 91 | pitch_mask = 255; |
| 92 | break; |
| 93 | case 2: |
| 94 | pitch_mask = 127; |
| 95 | break; |
| 96 | case 3: |
| 97 | case 4: |
| 98 | pitch_mask = 63; |
| 99 | break; |
| 100 | } |
| 101 | |
| 102 | aligned += pitch_mask; |
| 103 | aligned &= ~pitch_mask; |
Laurent Pinchart | 8e911ab | 2016-10-18 01:41:17 +0300 | [diff] [blame] | 104 | return aligned * cpp; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 105 | } |
| 106 | |
| 107 | static void amdgpufb_destroy_pinned_object(struct drm_gem_object *gobj) |
| 108 | { |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 109 | struct amdgpu_bo *abo = gem_to_amdgpu_bo(gobj); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 110 | int ret; |
| 111 | |
Michel Dänzer | c81a1a7 | 2017-04-28 17:28:14 +0900 | [diff] [blame] | 112 | ret = amdgpu_bo_reserve(abo, true); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 113 | if (likely(ret == 0)) { |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 114 | amdgpu_bo_kunmap(abo); |
| 115 | amdgpu_bo_unpin(abo); |
| 116 | amdgpu_bo_unreserve(abo); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 117 | } |
Cihangir Akturk | f62facc | 2017-08-03 14:58:16 +0300 | [diff] [blame] | 118 | drm_gem_object_put_unlocked(gobj); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 119 | } |
| 120 | |
| 121 | static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev, |
| 122 | struct drm_mode_fb_cmd2 *mode_cmd, |
| 123 | struct drm_gem_object **gobj_p) |
| 124 | { |
| 125 | struct amdgpu_device *adev = rfbdev->adev; |
| 126 | struct drm_gem_object *gobj = NULL; |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 127 | struct amdgpu_bo *abo = NULL; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 128 | bool fb_tiled = false; /* useful for testing */ |
Christian König | 5d43be0 | 2017-10-26 18:06:23 +0200 | [diff] [blame] | 129 | u32 tiling_flags = 0, domain; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 130 | int ret; |
| 131 | int aligned_size, size; |
| 132 | int height = mode_cmd->height; |
Laurent Pinchart | 8e911ab | 2016-10-18 01:41:17 +0300 | [diff] [blame] | 133 | u32 cpp; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 134 | |
Laurent Pinchart | 8e911ab | 2016-10-18 01:41:17 +0300 | [diff] [blame] | 135 | cpp = drm_format_plane_cpp(mode_cmd->pixel_format, 0); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 136 | |
| 137 | /* need to align pitch with crtc limits */ |
Laurent Pinchart | 8e911ab | 2016-10-18 01:41:17 +0300 | [diff] [blame] | 138 | mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp, |
| 139 | fb_tiled); |
Samuel Li | 1d2361e | 2018-04-18 15:06:02 -0400 | [diff] [blame] | 140 | domain = amdgpu_display_supported_domains(adev); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 141 | |
| 142 | height = ALIGN(mode_cmd->height, 8); |
| 143 | size = mode_cmd->pitches[0] * height; |
| 144 | aligned_size = ALIGN(size, PAGE_SIZE); |
Christian König | 5d43be0 | 2017-10-26 18:06:23 +0200 | [diff] [blame] | 145 | ret = amdgpu_gem_object_create(adev, aligned_size, 0, domain, |
Christian König | 03f48dd | 2016-08-15 17:00:22 +0200 | [diff] [blame] | 146 | AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED | |
Pixel Ding | cbabc8b | 2017-01-24 11:39:48 +0800 | [diff] [blame] | 147 | AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS | |
| 148 | AMDGPU_GEM_CREATE_VRAM_CLEARED, |
Huang Rui | f8ddb39 | 2018-06-28 14:38:21 +0800 | [diff] [blame] | 149 | ttm_bo_type_kernel, NULL, &gobj); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 150 | if (ret) { |
Joe Perches | 7ca8529 | 2017-02-28 04:55:52 -0800 | [diff] [blame] | 151 | pr_err("failed to allocate framebuffer (%d)\n", aligned_size); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 152 | return -ENOMEM; |
| 153 | } |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 154 | abo = gem_to_amdgpu_bo(gobj); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 155 | |
| 156 | if (fb_tiled) |
Marek Olšák | fbd76d5 | 2015-05-14 23:48:26 +0200 | [diff] [blame] | 157 | tiling_flags = AMDGPU_TILING_SET(ARRAY_MODE, GRPH_ARRAY_2D_TILED_THIN1); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 158 | |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 159 | ret = amdgpu_bo_reserve(abo, false); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 160 | if (unlikely(ret != 0)) |
| 161 | goto out_unref; |
| 162 | |
| 163 | if (tiling_flags) { |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 164 | ret = amdgpu_bo_set_tiling_flags(abo, |
Marek Olšák | 63ab1c2 | 2015-05-14 23:03:57 +0200 | [diff] [blame] | 165 | tiling_flags); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 166 | if (ret) |
| 167 | dev_err(adev->dev, "FB failed to set tiling flags\n"); |
| 168 | } |
| 169 | |
| 170 | |
Junwei Zhang | 7b7c6c8 | 2018-06-25 12:51:14 +0800 | [diff] [blame] | 171 | ret = amdgpu_bo_pin(abo, domain); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 172 | if (ret) { |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 173 | amdgpu_bo_unreserve(abo); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 174 | goto out_unref; |
| 175 | } |
Junwei Zhang | bb812f1 | 2018-06-25 13:32:24 +0800 | [diff] [blame] | 176 | |
| 177 | ret = amdgpu_ttm_alloc_gart(&abo->tbo); |
| 178 | if (ret) { |
| 179 | amdgpu_bo_unreserve(abo); |
| 180 | dev_err(adev->dev, "%p bind failed\n", abo); |
| 181 | goto out_unref; |
| 182 | } |
| 183 | |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 184 | ret = amdgpu_bo_kmap(abo, NULL); |
| 185 | amdgpu_bo_unreserve(abo); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 186 | if (ret) { |
| 187 | goto out_unref; |
| 188 | } |
| 189 | |
| 190 | *gobj_p = gobj; |
| 191 | return 0; |
| 192 | out_unref: |
| 193 | amdgpufb_destroy_pinned_object(gobj); |
| 194 | *gobj_p = NULL; |
| 195 | return ret; |
| 196 | } |
| 197 | |
| 198 | static int amdgpufb_create(struct drm_fb_helper *helper, |
| 199 | struct drm_fb_helper_surface_size *sizes) |
| 200 | { |
| 201 | struct amdgpu_fbdev *rfbdev = (struct amdgpu_fbdev *)helper; |
| 202 | struct amdgpu_device *adev = rfbdev->adev; |
| 203 | struct fb_info *info; |
| 204 | struct drm_framebuffer *fb = NULL; |
| 205 | struct drm_mode_fb_cmd2 mode_cmd; |
| 206 | struct drm_gem_object *gobj = NULL; |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 207 | struct amdgpu_bo *abo = NULL; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 208 | int ret; |
| 209 | unsigned long tmp; |
| 210 | |
| 211 | mode_cmd.width = sizes->surface_width; |
| 212 | mode_cmd.height = sizes->surface_height; |
| 213 | |
| 214 | if (sizes->surface_bpp == 24) |
| 215 | sizes->surface_bpp = 32; |
| 216 | |
| 217 | mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, |
| 218 | sizes->surface_depth); |
| 219 | |
| 220 | ret = amdgpufb_create_pinned_object(rfbdev, &mode_cmd, &gobj); |
| 221 | if (ret) { |
| 222 | DRM_ERROR("failed to create fbcon object %d\n", ret); |
| 223 | return ret; |
| 224 | } |
| 225 | |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 226 | abo = gem_to_amdgpu_bo(gobj); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 227 | |
| 228 | /* okay we have an object now allocate the framebuffer */ |
Archit Taneja | 2dbaf392 | 2015-07-31 16:22:00 +0530 | [diff] [blame] | 229 | info = drm_fb_helper_alloc_fbi(helper); |
| 230 | if (IS_ERR(info)) { |
| 231 | ret = PTR_ERR(info); |
Daniel Vetter | da7bdda | 2017-02-07 17:16:03 +0100 | [diff] [blame] | 232 | goto out; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 233 | } |
| 234 | |
| 235 | info->par = rfbdev; |
Alex Deucher | df7989f | 2015-11-02 10:52:32 -0500 | [diff] [blame] | 236 | info->skip_vt_switch = true; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 237 | |
Samuel Li | 9da3f2d | 2018-01-19 12:17:42 -0500 | [diff] [blame] | 238 | ret = amdgpu_display_framebuffer_init(adev->ddev, &rfbdev->rfb, |
| 239 | &mode_cmd, gobj); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 240 | if (ret) { |
| 241 | DRM_ERROR("failed to initialize framebuffer %d\n", ret); |
Daniel Vetter | da7bdda | 2017-02-07 17:16:03 +0100 | [diff] [blame] | 242 | goto out; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 243 | } |
| 244 | |
| 245 | fb = &rfbdev->rfb.base; |
| 246 | |
| 247 | /* setup helper */ |
| 248 | rfbdev->helper.fb = fb; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 249 | |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 250 | strcpy(info->fix.id, "amdgpudrmfb"); |
| 251 | |
Ville Syrjälä | b00c600 | 2016-12-14 23:31:35 +0200 | [diff] [blame] | 252 | drm_fb_helper_fill_fix(info, fb->pitches[0], fb->format->depth); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 253 | |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 254 | info->fbops = &amdgpufb_ops; |
| 255 | |
Christian König | 770d13b | 2018-01-12 14:52:22 +0100 | [diff] [blame] | 256 | tmp = amdgpu_bo_gpu_offset(abo) - adev->gmc.vram_start; |
| 257 | info->fix.smem_start = adev->gmc.aper_base + tmp; |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 258 | info->fix.smem_len = amdgpu_bo_size(abo); |
Christian König | f5e1c74 | 2017-07-20 23:45:18 +0200 | [diff] [blame] | 259 | info->screen_base = amdgpu_bo_kptr(abo); |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 260 | info->screen_size = amdgpu_bo_size(abo); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 261 | |
| 262 | drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height); |
| 263 | |
| 264 | /* setup aperture base/size for vesafb takeover */ |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 265 | info->apertures->ranges[0].base = adev->ddev->mode_config.fb_base; |
Christian König | 770d13b | 2018-01-12 14:52:22 +0100 | [diff] [blame] | 266 | info->apertures->ranges[0].size = adev->gmc.aper_size; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 267 | |
| 268 | /* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */ |
| 269 | |
| 270 | if (info->screen_base == NULL) { |
| 271 | ret = -ENOSPC; |
Daniel Vetter | da7bdda | 2017-02-07 17:16:03 +0100 | [diff] [blame] | 272 | goto out; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 273 | } |
| 274 | |
| 275 | DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start); |
Christian König | 770d13b | 2018-01-12 14:52:22 +0100 | [diff] [blame] | 276 | DRM_INFO("vram apper at 0x%lX\n", (unsigned long)adev->gmc.aper_base); |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 277 | DRM_INFO("size %lu\n", (unsigned long)amdgpu_bo_size(abo)); |
Ville Syrjälä | b00c600 | 2016-12-14 23:31:35 +0200 | [diff] [blame] | 278 | DRM_INFO("fb depth is %d\n", fb->format->depth); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 279 | DRM_INFO(" pitch is %d\n", fb->pitches[0]); |
| 280 | |
| 281 | vga_switcheroo_client_fb_set(adev->ddev->pdev, info); |
| 282 | return 0; |
| 283 | |
Daniel Vetter | da7bdda | 2017-02-07 17:16:03 +0100 | [diff] [blame] | 284 | out: |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 285 | if (abo) { |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 286 | |
| 287 | } |
| 288 | if (fb && ret) { |
Cihangir Akturk | f62facc | 2017-08-03 14:58:16 +0300 | [diff] [blame] | 289 | drm_gem_object_put_unlocked(gobj); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 290 | drm_framebuffer_unregister_private(fb); |
| 291 | drm_framebuffer_cleanup(fb); |
| 292 | kfree(fb); |
| 293 | } |
| 294 | return ret; |
| 295 | } |
| 296 | |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 297 | static int amdgpu_fbdev_destroy(struct drm_device *dev, struct amdgpu_fbdev *rfbdev) |
| 298 | { |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 299 | struct amdgpu_framebuffer *rfb = &rfbdev->rfb; |
| 300 | |
Archit Taneja | 2dbaf392 | 2015-07-31 16:22:00 +0530 | [diff] [blame] | 301 | drm_fb_helper_unregister_fbi(&rfbdev->helper); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 302 | |
Daniel Stone | e68d14d | 2018-03-30 15:11:38 +0100 | [diff] [blame] | 303 | if (rfb->base.obj[0]) { |
| 304 | amdgpufb_destroy_pinned_object(rfb->base.obj[0]); |
| 305 | rfb->base.obj[0] = NULL; |
Michel Dänzer | a072c5f | 2017-09-11 17:04:41 +0900 | [diff] [blame] | 306 | drm_framebuffer_unregister_private(&rfb->base); |
| 307 | drm_framebuffer_cleanup(&rfb->base); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 308 | } |
| 309 | drm_fb_helper_fini(&rfbdev->helper); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 310 | |
| 311 | return 0; |
| 312 | } |
| 313 | |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 314 | static const struct drm_fb_helper_funcs amdgpu_fb_helper_funcs = { |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 315 | .fb_probe = amdgpufb_create, |
| 316 | }; |
| 317 | |
| 318 | int amdgpu_fbdev_init(struct amdgpu_device *adev) |
| 319 | { |
| 320 | struct amdgpu_fbdev *rfbdev; |
| 321 | int bpp_sel = 32; |
| 322 | int ret; |
| 323 | |
| 324 | /* don't init fbdev on hw without DCE */ |
| 325 | if (!adev->mode_info.mode_config_initialized) |
| 326 | return 0; |
| 327 | |
Alex Deucher | f49d45c | 2016-01-26 00:30:33 -0500 | [diff] [blame] | 328 | /* don't init fbdev if there are no connectors */ |
| 329 | if (list_empty(&adev->ddev->mode_config.connector_list)) |
| 330 | return 0; |
| 331 | |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 332 | /* select 8 bpp console on low vram cards */ |
Christian König | 770d13b | 2018-01-12 14:52:22 +0100 | [diff] [blame] | 333 | if (adev->gmc.real_vram_size <= (32*1024*1024)) |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 334 | bpp_sel = 8; |
| 335 | |
| 336 | rfbdev = kzalloc(sizeof(struct amdgpu_fbdev), GFP_KERNEL); |
| 337 | if (!rfbdev) |
| 338 | return -ENOMEM; |
| 339 | |
| 340 | rfbdev->adev = adev; |
| 341 | adev->mode_info.rfbdev = rfbdev; |
| 342 | |
| 343 | drm_fb_helper_prepare(adev->ddev, &rfbdev->helper, |
| 344 | &amdgpu_fb_helper_funcs); |
| 345 | |
| 346 | ret = drm_fb_helper_init(adev->ddev, &rfbdev->helper, |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 347 | AMDGPUFB_CONN_LIMIT); |
| 348 | if (ret) { |
| 349 | kfree(rfbdev); |
| 350 | return ret; |
| 351 | } |
| 352 | |
| 353 | drm_fb_helper_single_add_all_connectors(&rfbdev->helper); |
| 354 | |
| 355 | /* disable all the possible outputs/crtcs before entering KMS mode */ |
Andrey Grodzovsky | 93b8ca9 | 2017-05-30 16:49:59 -0400 | [diff] [blame] | 356 | if (!amdgpu_device_has_dc_support(adev)) |
| 357 | drm_helper_disable_unused_functions(adev->ddev); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 358 | |
| 359 | drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel); |
| 360 | return 0; |
| 361 | } |
| 362 | |
| 363 | void amdgpu_fbdev_fini(struct amdgpu_device *adev) |
| 364 | { |
| 365 | if (!adev->mode_info.rfbdev) |
| 366 | return; |
| 367 | |
| 368 | amdgpu_fbdev_destroy(adev->ddev, adev->mode_info.rfbdev); |
| 369 | kfree(adev->mode_info.rfbdev); |
| 370 | adev->mode_info.rfbdev = NULL; |
| 371 | } |
| 372 | |
| 373 | void amdgpu_fbdev_set_suspend(struct amdgpu_device *adev, int state) |
| 374 | { |
| 375 | if (adev->mode_info.rfbdev) |
Archit Taneja | 2dbaf392 | 2015-07-31 16:22:00 +0530 | [diff] [blame] | 376 | drm_fb_helper_set_suspend(&adev->mode_info.rfbdev->helper, |
| 377 | state); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 378 | } |
| 379 | |
| 380 | int amdgpu_fbdev_total_size(struct amdgpu_device *adev) |
| 381 | { |
| 382 | struct amdgpu_bo *robj; |
| 383 | int size = 0; |
| 384 | |
| 385 | if (!adev->mode_info.rfbdev) |
| 386 | return 0; |
| 387 | |
Daniel Stone | e68d14d | 2018-03-30 15:11:38 +0100 | [diff] [blame] | 388 | robj = gem_to_amdgpu_bo(adev->mode_info.rfbdev->rfb.base.obj[0]); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 389 | size += amdgpu_bo_size(robj); |
| 390 | return size; |
| 391 | } |
| 392 | |
| 393 | bool amdgpu_fbdev_robj_is_fb(struct amdgpu_device *adev, struct amdgpu_bo *robj) |
| 394 | { |
| 395 | if (!adev->mode_info.rfbdev) |
| 396 | return false; |
Daniel Stone | e68d14d | 2018-03-30 15:11:38 +0100 | [diff] [blame] | 397 | if (robj == gem_to_amdgpu_bo(adev->mode_info.rfbdev->rfb.base.obj[0])) |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 398 | return true; |
| 399 | return false; |
| 400 | } |