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Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080030#include <linux/i2c-id.h>
31#include <linux/i2c-algo-bit.h>
32#include "drmP.h"
33#include "drm.h"
34#include "intel_drv.h"
35#include "i915_drm.h"
36#include "i915_drv.h"
37
Shaohua Li0ba0e9e2009-04-07 11:02:28 +080038void intel_i2c_quirk_set(struct drm_device *dev, bool enable)
39{
40 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilsonb222f262010-09-11 21:48:25 +010041 u32 val;
Shaohua Li0ba0e9e2009-04-07 11:02:28 +080042
43 /* When using bit bashing for I2C, this bit needs to be set to 1 */
Adam Jacksonf2b115e2009-12-03 17:14:42 -050044 if (!IS_PINEVIEW(dev))
Shaohua Li0ba0e9e2009-04-07 11:02:28 +080045 return;
Chris Wilsonb222f262010-09-11 21:48:25 +010046
47 val = I915_READ(DSPCLK_GATE_D);
Shaohua Li0ba0e9e2009-04-07 11:02:28 +080048 if (enable)
Chris Wilsonb222f262010-09-11 21:48:25 +010049 val |= DPCUNIT_CLOCK_GATE_DISABLE;
Shaohua Li0ba0e9e2009-04-07 11:02:28 +080050 else
Chris Wilsonb222f262010-09-11 21:48:25 +010051 val &= ~DPCUNIT_CLOCK_GATE_DISABLE;
52 I915_WRITE(DSPCLK_GATE_D, val);
Shaohua Li0ba0e9e2009-04-07 11:02:28 +080053}
54
Jesse Barnes79e53942008-11-07 14:24:08 -080055/*
56 * Intel GPIO access functions
57 */
58
59#define I2C_RISEFALL_TIME 20
60
Chris Wilson890f3352010-09-14 16:46:59 +010061static inline struct drm_i915_private *
62get_dev_priv(struct intel_i2c_chan *chan)
63{
64 return chan->encoder->base.dev->dev_private;
65}
66
Jesse Barnes79e53942008-11-07 14:24:08 -080067static int get_clock(void *data)
68{
69 struct intel_i2c_chan *chan = data;
Chris Wilson890f3352010-09-14 16:46:59 +010070 struct drm_i915_private *dev_priv = get_dev_priv(chan);
Chris Wilsonb222f262010-09-11 21:48:25 +010071 return (I915_READ(chan->reg) & GPIO_CLOCK_VAL_IN) != 0;
Jesse Barnes79e53942008-11-07 14:24:08 -080072}
73
74static int get_data(void *data)
75{
76 struct intel_i2c_chan *chan = data;
Chris Wilson890f3352010-09-14 16:46:59 +010077 struct drm_i915_private *dev_priv = get_dev_priv(chan);
Chris Wilsonb222f262010-09-11 21:48:25 +010078 return (I915_READ(chan->reg) & GPIO_DATA_VAL_IN) != 0;
Jesse Barnes79e53942008-11-07 14:24:08 -080079}
80
81static void set_clock(void *data, int state_high)
82{
83 struct intel_i2c_chan *chan = data;
Chris Wilson890f3352010-09-14 16:46:59 +010084 struct drm_i915_private *dev_priv = get_dev_priv(chan);
85 struct drm_device *dev = dev_priv->dev;
Jesse Barnes79e53942008-11-07 14:24:08 -080086 u32 reserved = 0, clock_bits;
87
88 /* On most chips, these bits must be preserved in software. */
89 if (!IS_I830(dev) && !IS_845G(dev))
90 reserved = I915_READ(chan->reg) & (GPIO_DATA_PULLUP_DISABLE |
91 GPIO_CLOCK_PULLUP_DISABLE);
92
93 if (state_high)
94 clock_bits = GPIO_CLOCK_DIR_IN | GPIO_CLOCK_DIR_MASK;
95 else
96 clock_bits = GPIO_CLOCK_DIR_OUT | GPIO_CLOCK_DIR_MASK |
97 GPIO_CLOCK_VAL_MASK;
98 I915_WRITE(chan->reg, reserved | clock_bits);
Chris Wilsonb222f262010-09-11 21:48:25 +010099 POSTING_READ(chan->reg);
Jesse Barnes79e53942008-11-07 14:24:08 -0800100}
101
102static void set_data(void *data, int state_high)
103{
104 struct intel_i2c_chan *chan = data;
Chris Wilson890f3352010-09-14 16:46:59 +0100105 struct drm_i915_private *dev_priv = get_dev_priv(chan);
106 struct drm_device *dev = dev_priv->dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800107 u32 reserved = 0, data_bits;
108
109 /* On most chips, these bits must be preserved in software. */
110 if (!IS_I830(dev) && !IS_845G(dev))
111 reserved = I915_READ(chan->reg) & (GPIO_DATA_PULLUP_DISABLE |
112 GPIO_CLOCK_PULLUP_DISABLE);
113
114 if (state_high)
115 data_bits = GPIO_DATA_DIR_IN | GPIO_DATA_DIR_MASK;
116 else
117 data_bits = GPIO_DATA_DIR_OUT | GPIO_DATA_DIR_MASK |
118 GPIO_DATA_VAL_MASK;
119
120 I915_WRITE(chan->reg, reserved | data_bits);
Chris Wilsonb222f262010-09-11 21:48:25 +0100121 POSTING_READ(chan->reg);
Jesse Barnes79e53942008-11-07 14:24:08 -0800122}
123
Eric Anholtf0217c42009-12-01 11:56:30 -0800124/* Clears the GMBUS setup. Our driver doesn't make use of the GMBUS I2C
125 * engine, but if the BIOS leaves it enabled, then that can break our use
126 * of the bit-banging I2C interfaces. This is notably the case with the
127 * Mac Mini in EFI mode.
128 */
129void
130intel_i2c_reset_gmbus(struct drm_device *dev)
131{
132 struct drm_i915_private *dev_priv = dev->dev_private;
133
Chris Wilsonb222f262010-09-11 21:48:25 +0100134 if (HAS_PCH_SPLIT(dev))
Eric Anholtf0217c42009-12-01 11:56:30 -0800135 I915_WRITE(PCH_GMBUS0, 0);
Chris Wilsonb222f262010-09-11 21:48:25 +0100136 else
Eric Anholtf0217c42009-12-01 11:56:30 -0800137 I915_WRITE(GMBUS0, 0);
Eric Anholtf0217c42009-12-01 11:56:30 -0800138}
139
Jesse Barnes79e53942008-11-07 14:24:08 -0800140/**
141 * intel_i2c_create - instantiate an Intel i2c bus using the specified GPIO reg
142 * @dev: DRM device
143 * @output: driver specific output device
144 * @reg: GPIO reg to use
145 * @name: name for this bus
Keith Packardf9c10a92009-05-30 12:16:25 -0700146 * @slave_addr: slave address (if fixed)
Jesse Barnes79e53942008-11-07 14:24:08 -0800147 *
148 * Creates and registers a new i2c bus with the Linux i2c layer, for use
149 * in output probing and control (e.g. DDC or SDVO control functions).
150 *
151 * Possible values for @reg include:
152 * %GPIOA
153 * %GPIOB
154 * %GPIOC
155 * %GPIOD
156 * %GPIOE
157 * %GPIOF
158 * %GPIOG
159 * %GPIOH
160 * see PRM for details on how these different busses are used.
161 */
Chris Wilson890f3352010-09-14 16:46:59 +0100162struct i2c_adapter *intel_i2c_create(struct intel_encoder *encoder,
163 const u32 reg,
Keith Packardf9c10a92009-05-30 12:16:25 -0700164 const char *name)
Jesse Barnes79e53942008-11-07 14:24:08 -0800165{
166 struct intel_i2c_chan *chan;
Chris Wilson890f3352010-09-14 16:46:59 +0100167 struct drm_device *dev = encoder->base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800168
169 chan = kzalloc(sizeof(struct intel_i2c_chan), GFP_KERNEL);
170 if (!chan)
171 goto out_free;
172
Chris Wilson890f3352010-09-14 16:46:59 +0100173 chan->encoder = encoder;
Jesse Barnes79e53942008-11-07 14:24:08 -0800174 chan->reg = reg;
175 snprintf(chan->adapter.name, I2C_NAME_SIZE, "intel drm %s", name);
176 chan->adapter.owner = THIS_MODULE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800177 chan->adapter.algo_data = &chan->algo;
178 chan->adapter.dev.parent = &dev->pdev->dev;
179 chan->algo.setsda = set_data;
180 chan->algo.setscl = set_clock;
181 chan->algo.getsda = get_data;
182 chan->algo.getscl = get_clock;
Chris Wilsonb222f262010-09-11 21:48:25 +0100183 chan->algo.udelay = I2C_RISEFALL_TIME;
Jesse Barnes79e53942008-11-07 14:24:08 -0800184 chan->algo.timeout = usecs_to_jiffies(2200);
185 chan->algo.data = chan;
186
187 i2c_set_adapdata(&chan->adapter, chan);
188
Chris Wilson890f3352010-09-14 16:46:59 +0100189 if (i2c_bit_add_bus(&chan->adapter))
Jesse Barnes79e53942008-11-07 14:24:08 -0800190 goto out_free;
191
Eric Anholtf0217c42009-12-01 11:56:30 -0800192 intel_i2c_reset_gmbus(dev);
193
Jesse Barnes79e53942008-11-07 14:24:08 -0800194 /* JJJ: raise SCL and SDA? */
Shaohua Li0ba0e9e2009-04-07 11:02:28 +0800195 intel_i2c_quirk_set(dev, true);
Jesse Barnes79e53942008-11-07 14:24:08 -0800196 set_data(chan, 1);
Chris Wilsonb222f262010-09-11 21:48:25 +0100197 udelay(I2C_RISEFALL_TIME);
Jesse Barnes79e53942008-11-07 14:24:08 -0800198 set_clock(chan, 1);
Chris Wilsonb222f262010-09-11 21:48:25 +0100199 udelay(I2C_RISEFALL_TIME);
Shaohua Li0ba0e9e2009-04-07 11:02:28 +0800200 intel_i2c_quirk_set(dev, false);
Jesse Barnes79e53942008-11-07 14:24:08 -0800201
Keith Packardf9c10a92009-05-30 12:16:25 -0700202 return &chan->adapter;
Jesse Barnes79e53942008-11-07 14:24:08 -0800203
204out_free:
205 kfree(chan);
206 return NULL;
207}
208
209/**
210 * intel_i2c_destroy - unregister and free i2c bus resources
211 * @output: channel to free
212 *
213 * Unregister the adapter from the i2c layer, then free the structure.
214 */
Keith Packardf9c10a92009-05-30 12:16:25 -0700215void intel_i2c_destroy(struct i2c_adapter *adapter)
Jesse Barnes79e53942008-11-07 14:24:08 -0800216{
Keith Packardf9c10a92009-05-30 12:16:25 -0700217 struct intel_i2c_chan *chan;
218
219 if (!adapter)
Jesse Barnes79e53942008-11-07 14:24:08 -0800220 return;
221
Keith Packardf9c10a92009-05-30 12:16:25 -0700222 chan = container_of(adapter,
223 struct intel_i2c_chan,
224 adapter);
Jesse Barnes79e53942008-11-07 14:24:08 -0800225 i2c_del_adapter(&chan->adapter);
226 kfree(chan);
227}