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Catalin Marinas1d18c472012-03-05 11:49:27 +00001/*
2 * Based on arch/arm/mm/fault.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 * Copyright (C) 1995-2004 Russell King
6 * Copyright (C) 2012 ARM Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
Paul Gortmaker0edfa832016-09-19 17:38:55 -040021#include <linux/extable.h>
Catalin Marinas1d18c472012-03-05 11:49:27 +000022#include <linux/signal.h>
23#include <linux/mm.h>
24#include <linux/hardirq.h>
25#include <linux/init.h>
26#include <linux/kprobes.h>
27#include <linux/uaccess.h>
28#include <linux/page-flags.h>
Ingo Molnar3f07c012017-02-08 18:51:30 +010029#include <linux/sched/signal.h>
Ingo Molnarb17b0152017-02-08 18:51:35 +010030#include <linux/sched/debug.h>
Catalin Marinas1d18c472012-03-05 11:49:27 +000031#include <linux/highmem.h>
32#include <linux/perf_event.h>
James Morse7209c862016-10-18 11:27:47 +010033#include <linux/preempt.h>
Jonathan (Zhixiong) Zhange7c600f2017-06-08 18:25:27 +010034#include <linux/hugetlb.h>
Catalin Marinas1d18c472012-03-05 11:49:27 +000035
James Morse7209c862016-10-18 11:27:47 +010036#include <asm/bug.h>
Catalin Marinas3bbf7152017-06-26 14:27:36 +010037#include <asm/cmpxchg.h>
James Morse338d4f42015-07-22 19:05:54 +010038#include <asm/cpufeature.h>
Catalin Marinas1d18c472012-03-05 11:49:27 +000039#include <asm/exception.h>
40#include <asm/debug-monitors.h>
Catalin Marinas91413002014-04-06 23:04:12 +010041#include <asm/esr.h>
James Morse338d4f42015-07-22 19:05:54 +010042#include <asm/sysreg.h>
Catalin Marinas1d18c472012-03-05 11:49:27 +000043#include <asm/system_misc.h>
44#include <asm/pgtable.h>
45#include <asm/tlbflush.h>
46
Tyler Baicar7edda082017-06-21 12:17:09 -060047#include <acpi/ghes.h>
48
Victor Kamensky09a6adf2017-04-03 22:51:01 -070049struct fault_info {
50 int (*fn)(unsigned long addr, unsigned int esr,
51 struct pt_regs *regs);
52 int sig;
53 int code;
54 const char *name;
55};
56
57static const struct fault_info fault_info[];
58
59static inline const struct fault_info *esr_to_fault_info(unsigned int esr)
60{
61 return fault_info + (esr & 63);
62}
Catalin Marinas3495386b2012-10-24 16:34:02 +010063
Sandeepa Prabhu2dd0e8d2016-07-08 12:35:48 -040064#ifdef CONFIG_KPROBES
65static inline int notify_page_fault(struct pt_regs *regs, unsigned int esr)
66{
67 int ret = 0;
68
69 /* kprobe_running() needs smp_processor_id() */
70 if (!user_mode(regs)) {
71 preempt_disable();
72 if (kprobe_running() && kprobe_fault_handler(regs, esr))
73 ret = 1;
74 preempt_enable();
75 }
76
77 return ret;
78}
79#else
80static inline int notify_page_fault(struct pt_regs *regs, unsigned int esr)
81{
82 return 0;
83}
84#endif
85
Julien Thierry1f9b8932017-08-04 09:31:42 +010086static void data_abort_decode(unsigned int esr)
87{
88 pr_alert("Data abort info:\n");
89
90 if (esr & ESR_ELx_ISV) {
91 pr_alert(" Access size = %u byte(s)\n",
92 1U << ((esr & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT));
93 pr_alert(" SSE = %lu, SRT = %lu\n",
94 (esr & ESR_ELx_SSE) >> ESR_ELx_SSE_SHIFT,
95 (esr & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT);
96 pr_alert(" SF = %lu, AR = %lu\n",
97 (esr & ESR_ELx_SF) >> ESR_ELx_SF_SHIFT,
98 (esr & ESR_ELx_AR) >> ESR_ELx_AR_SHIFT);
99 } else {
100 pr_alert(" ISV = 0, ISS = 0x%08lu\n", esr & ESR_ELx_ISS_MASK);
101 }
102
103 pr_alert(" CM = %lu, WnR = %lu\n",
104 (esr & ESR_ELx_CM) >> ESR_ELx_CM_SHIFT,
105 (esr & ESR_ELx_WNR) >> ESR_ELx_WNR_SHIFT);
106}
107
Julien Thierry1f9b8932017-08-04 09:31:42 +0100108static void mem_abort_decode(unsigned int esr)
109{
110 pr_alert("Mem abort info:\n");
111
112 pr_alert(" Exception class = %s, IL = %u bits\n",
113 esr_get_class_string(esr),
114 (esr & ESR_ELx_IL) ? 32 : 16);
115 pr_alert(" SET = %lu, FnV = %lu\n",
116 (esr & ESR_ELx_SET_MASK) >> ESR_ELx_SET_SHIFT,
117 (esr & ESR_ELx_FnV) >> ESR_ELx_FnV_SHIFT);
118 pr_alert(" EA = %lu, S1PTW = %lu\n",
119 (esr & ESR_ELx_EA) >> ESR_ELx_EA_SHIFT,
120 (esr & ESR_ELx_S1PTW) >> ESR_ELx_S1PTW_SHIFT);
121
122 if (esr_is_data_abort(esr))
123 data_abort_decode(esr);
124}
125
Catalin Marinas1d18c472012-03-05 11:49:27 +0000126/*
Kristina Martsenko67ce16e2017-06-09 16:35:52 +0100127 * Dump out the page tables associated with 'addr' in the currently active mm.
Catalin Marinas1d18c472012-03-05 11:49:27 +0000128 */
Kristina Martsenko67ce16e2017-06-09 16:35:52 +0100129void show_pte(unsigned long addr)
Catalin Marinas1d18c472012-03-05 11:49:27 +0000130{
Kristina Martsenko67ce16e2017-06-09 16:35:52 +0100131 struct mm_struct *mm;
Catalin Marinas1d18c472012-03-05 11:49:27 +0000132 pgd_t *pgd;
133
Kristina Martsenko67ce16e2017-06-09 16:35:52 +0100134 if (addr < TASK_SIZE) {
135 /* TTBR0 */
136 mm = current->active_mm;
137 if (mm == &init_mm) {
138 pr_alert("[%016lx] user address but active_mm is swapper\n",
139 addr);
140 return;
141 }
142 } else if (addr >= VA_START) {
143 /* TTBR1 */
Catalin Marinas1d18c472012-03-05 11:49:27 +0000144 mm = &init_mm;
Kristina Martsenko67ce16e2017-06-09 16:35:52 +0100145 } else {
146 pr_alert("[%016lx] address between user and kernel address ranges\n",
147 addr);
148 return;
149 }
Catalin Marinas1d18c472012-03-05 11:49:27 +0000150
Will Deacon1eb34b62017-05-15 15:23:58 +0100151 pr_alert("%s pgtable: %luk pages, %u-bit VAs, pgd = %p\n",
152 mm == &init_mm ? "swapper" : "user", PAGE_SIZE / SZ_1K,
153 VA_BITS, mm->pgd);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000154 pgd = pgd_offset(mm, addr);
Kristina Martsenko67ce16e2017-06-09 16:35:52 +0100155 pr_alert("[%016lx] *pgd=%016llx", addr, pgd_val(*pgd));
Catalin Marinas1d18c472012-03-05 11:49:27 +0000156
157 do {
158 pud_t *pud;
159 pmd_t *pmd;
160 pte_t *pte;
161
Steve Capper4339e3f32013-04-19 15:49:31 +0100162 if (pgd_none(*pgd) || pgd_bad(*pgd))
Catalin Marinas1d18c472012-03-05 11:49:27 +0000163 break;
164
165 pud = pud_offset(pgd, addr);
Mark Rutland6ef4fb32017-01-03 14:27:26 +0000166 pr_cont(", *pud=%016llx", pud_val(*pud));
Steve Capper4339e3f32013-04-19 15:49:31 +0100167 if (pud_none(*pud) || pud_bad(*pud))
Catalin Marinas1d18c472012-03-05 11:49:27 +0000168 break;
169
170 pmd = pmd_offset(pud, addr);
Mark Rutland6ef4fb32017-01-03 14:27:26 +0000171 pr_cont(", *pmd=%016llx", pmd_val(*pmd));
Steve Capper4339e3f32013-04-19 15:49:31 +0100172 if (pmd_none(*pmd) || pmd_bad(*pmd))
Catalin Marinas1d18c472012-03-05 11:49:27 +0000173 break;
174
175 pte = pte_offset_map(pmd, addr);
Mark Rutland6ef4fb32017-01-03 14:27:26 +0000176 pr_cont(", *pte=%016llx", pte_val(*pte));
Catalin Marinas1d18c472012-03-05 11:49:27 +0000177 pte_unmap(pte);
178 } while(0);
179
Mark Rutland6ef4fb32017-01-03 14:27:26 +0000180 pr_cont("\n");
Catalin Marinas1d18c472012-03-05 11:49:27 +0000181}
182
Catalin Marinas66dbd6e2016-04-13 16:01:22 +0100183/*
184 * This function sets the access flags (dirty, accessed), as well as write
185 * permission, and only to a more permissive setting.
186 *
187 * It needs to cope with hardware update of the accessed/dirty state by other
188 * agents in the system and can safely skip the __sync_icache_dcache() call as,
189 * like set_pte_at(), the PTE is never changed from no-exec to exec here.
190 *
191 * Returns whether or not the PTE actually changed.
192 */
193int ptep_set_access_flags(struct vm_area_struct *vma,
194 unsigned long address, pte_t *ptep,
195 pte_t entry, int dirty)
196{
Catalin Marinas3bbf7152017-06-26 14:27:36 +0100197 pteval_t old_pteval, pteval;
Catalin Marinas66dbd6e2016-04-13 16:01:22 +0100198
199 if (pte_same(*ptep, entry))
200 return 0;
201
202 /* only preserve the access flags and write permission */
Catalin Marinas73e86cb2017-07-04 19:04:18 +0100203 pte_val(entry) &= PTE_RDONLY | PTE_AF | PTE_WRITE | PTE_DIRTY;
Catalin Marinas66dbd6e2016-04-13 16:01:22 +0100204
205 /*
206 * Setting the flags must be done atomically to avoid racing with the
Catalin Marinas6d332742017-07-25 14:53:03 +0100207 * hardware update of the access/dirty state. The PTE_RDONLY bit must
208 * be set to the most permissive (lowest value) of *ptep and entry
209 * (calculated as: a & b == ~(~a | ~b)).
Catalin Marinas66dbd6e2016-04-13 16:01:22 +0100210 */
Catalin Marinas6d332742017-07-25 14:53:03 +0100211 pte_val(entry) ^= PTE_RDONLY;
Catalin Marinas3bbf7152017-06-26 14:27:36 +0100212 pteval = READ_ONCE(pte_val(*ptep));
213 do {
214 old_pteval = pteval;
215 pteval ^= PTE_RDONLY;
216 pteval |= pte_val(entry);
217 pteval ^= PTE_RDONLY;
218 pteval = cmpxchg_relaxed(&pte_val(*ptep), old_pteval, pteval);
219 } while (pteval != old_pteval);
Catalin Marinas66dbd6e2016-04-13 16:01:22 +0100220
221 flush_tlb_fix_spurious_fault(vma, address);
222 return 1;
223}
Catalin Marinas66dbd6e2016-04-13 16:01:22 +0100224
Laura Abbott9adeb8e2016-08-09 18:25:26 -0700225static bool is_el1_instruction_abort(unsigned int esr)
226{
227 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_CUR;
228}
229
Stephen Boydb824b932017-04-05 12:18:31 -0700230static inline bool is_permission_fault(unsigned int esr, struct pt_regs *regs,
231 unsigned long addr)
232{
233 unsigned int ec = ESR_ELx_EC(esr);
234 unsigned int fsc_type = esr & ESR_ELx_FSC_TYPE;
235
236 if (ec != ESR_ELx_EC_DABT_CUR && ec != ESR_ELx_EC_IABT_CUR)
237 return false;
238
239 if (fsc_type == ESR_ELx_FSC_PERM)
240 return true;
241
242 if (addr < USER_DS && system_uses_ttbr0_pan())
243 return fsc_type == ESR_ELx_FSC_FAULT &&
244 (regs->pstate & PSR_PAN_BIT);
245
246 return false;
247}
248
Kristina Martsenko67ce16e2017-06-09 16:35:52 +0100249static void __do_kernel_fault(unsigned long addr, unsigned int esr,
250 struct pt_regs *regs)
Catalin Marinas1d18c472012-03-05 11:49:27 +0000251{
Stephen Boydb824b932017-04-05 12:18:31 -0700252 const char *msg;
253
Catalin Marinas1d18c472012-03-05 11:49:27 +0000254 /*
255 * Are we prepared to handle this kernel fault?
Laura Abbott9adeb8e2016-08-09 18:25:26 -0700256 * We are almost certainly not prepared to handle instruction faults.
Catalin Marinas1d18c472012-03-05 11:49:27 +0000257 */
Laura Abbott9adeb8e2016-08-09 18:25:26 -0700258 if (!is_el1_instruction_abort(esr) && fixup_exception(regs))
Catalin Marinas1d18c472012-03-05 11:49:27 +0000259 return;
260
Catalin Marinas1d18c472012-03-05 11:49:27 +0000261 bust_spinlocks(1);
Stephen Boydb824b932017-04-05 12:18:31 -0700262
263 if (is_permission_fault(esr, regs, addr)) {
264 if (esr & ESR_ELx_WNR)
265 msg = "write to read-only memory";
266 else
267 msg = "read from unreadable memory";
268 } else if (addr < PAGE_SIZE) {
269 msg = "NULL pointer dereference";
270 } else {
271 msg = "paging request";
272 }
273
274 pr_alert("Unable to handle kernel %s at virtual address %08lx\n", msg,
275 addr);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000276
Julien Thierry1f9b8932017-08-04 09:31:42 +0100277 mem_abort_decode(esr);
278
Kristina Martsenko67ce16e2017-06-09 16:35:52 +0100279 show_pte(addr);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000280 die("Oops", regs, esr);
281 bust_spinlocks(0);
282 do_exit(SIGKILL);
283}
284
Catalin Marinas1d18c472012-03-05 11:49:27 +0000285static void __do_user_fault(struct task_struct *tsk, unsigned long addr,
286 unsigned int esr, unsigned int sig, int code,
Jonathan (Zhixiong) Zhange7c600f2017-06-08 18:25:27 +0100287 struct pt_regs *regs, int fault)
Catalin Marinas1d18c472012-03-05 11:49:27 +0000288{
289 struct siginfo si;
Victor Kamensky09a6adf2017-04-03 22:51:01 -0700290 const struct fault_info *inf;
Jonathan (Zhixiong) Zhange7c600f2017-06-08 18:25:27 +0100291 unsigned int lsb = 0;
Catalin Marinas1d18c472012-03-05 11:49:27 +0000292
Suzuki K. Poulosef871d262015-07-03 15:08:08 +0100293 if (unhandled_signal(tsk, sig) && show_unhandled_signals_ratelimited()) {
Victor Kamensky09a6adf2017-04-03 22:51:01 -0700294 inf = esr_to_fault_info(esr);
Kristina Martsenko83016b22017-06-09 16:35:54 +0100295 pr_info("%s[%d]: unhandled %s (%d) at 0x%08lx, esr 0x%03x",
Victor Kamensky09a6adf2017-04-03 22:51:01 -0700296 tsk->comm, task_pid_nr(tsk), inf->name, sig,
Catalin Marinas3495386b2012-10-24 16:34:02 +0100297 addr, esr);
Kristina Martsenko83016b22017-06-09 16:35:54 +0100298 print_vma_addr(KERN_CONT ", in ", regs->pc);
299 pr_cont("\n");
Kefeng Wangc07ab952017-05-09 09:53:36 +0800300 __show_regs(regs);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000301 }
302
303 tsk->thread.fault_address = addr;
Catalin Marinas91413002014-04-06 23:04:12 +0100304 tsk->thread.fault_code = esr;
Catalin Marinas1d18c472012-03-05 11:49:27 +0000305 si.si_signo = sig;
306 si.si_errno = 0;
307 si.si_code = code;
308 si.si_addr = (void __user *)addr;
Jonathan (Zhixiong) Zhange7c600f2017-06-08 18:25:27 +0100309 /*
310 * Either small page or large page may be poisoned.
311 * In other words, VM_FAULT_HWPOISON_LARGE and
312 * VM_FAULT_HWPOISON are mutually exclusive.
313 */
314 if (fault & VM_FAULT_HWPOISON_LARGE)
315 lsb = hstate_index_to_shift(VM_FAULT_GET_HINDEX(fault));
316 else if (fault & VM_FAULT_HWPOISON)
317 lsb = PAGE_SHIFT;
318 si.si_addr_lsb = lsb;
319
Catalin Marinas1d18c472012-03-05 11:49:27 +0000320 force_sig_info(sig, &si, tsk);
321}
322
Catalin Marinas59f67e12013-09-16 15:18:28 +0100323static void do_bad_area(unsigned long addr, unsigned int esr, struct pt_regs *regs)
Catalin Marinas1d18c472012-03-05 11:49:27 +0000324{
325 struct task_struct *tsk = current;
Victor Kamensky09a6adf2017-04-03 22:51:01 -0700326 const struct fault_info *inf;
Catalin Marinas1d18c472012-03-05 11:49:27 +0000327
328 /*
329 * If we are in kernel mode at this point, we have no context to
330 * handle this fault with.
331 */
Victor Kamensky09a6adf2017-04-03 22:51:01 -0700332 if (user_mode(regs)) {
333 inf = esr_to_fault_info(esr);
Jonathan (Zhixiong) Zhange7c600f2017-06-08 18:25:27 +0100334 __do_user_fault(tsk, addr, esr, inf->sig, inf->code, regs, 0);
Victor Kamensky09a6adf2017-04-03 22:51:01 -0700335 } else
Kristina Martsenko67ce16e2017-06-09 16:35:52 +0100336 __do_kernel_fault(addr, esr, regs);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000337}
338
339#define VM_FAULT_BADMAP 0x010000
340#define VM_FAULT_BADACCESS 0x020000
341
Catalin Marinas1d18c472012-03-05 11:49:27 +0000342static int __do_page_fault(struct mm_struct *mm, unsigned long addr,
Will Deacondb6f4102013-07-19 15:37:12 +0100343 unsigned int mm_flags, unsigned long vm_flags,
Catalin Marinas1d18c472012-03-05 11:49:27 +0000344 struct task_struct *tsk)
345{
346 struct vm_area_struct *vma;
347 int fault;
348
349 vma = find_vma(mm, addr);
350 fault = VM_FAULT_BADMAP;
351 if (unlikely(!vma))
352 goto out;
353 if (unlikely(vma->vm_start > addr))
354 goto check_stack;
355
356 /*
357 * Ok, we have a good vm_area for this memory access, so we can handle
358 * it.
359 */
360good_area:
Will Deacondb6f4102013-07-19 15:37:12 +0100361 /*
362 * Check that the permissions on the VMA allow for the fault which
Catalin Marinascab15ce2016-08-11 18:44:50 +0100363 * occurred.
Will Deacondb6f4102013-07-19 15:37:12 +0100364 */
365 if (!(vma->vm_flags & vm_flags)) {
Catalin Marinas1d18c472012-03-05 11:49:27 +0000366 fault = VM_FAULT_BADACCESS;
367 goto out;
368 }
369
Kirill A. Shutemovdcddffd2016-07-26 15:25:18 -0700370 return handle_mm_fault(vma, addr & PAGE_MASK, mm_flags);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000371
372check_stack:
373 if (vma->vm_flags & VM_GROWSDOWN && !expand_stack(vma, addr))
374 goto good_area;
375out:
376 return fault;
377}
378
Mark Rutland541ec872016-05-31 12:33:03 +0100379static bool is_el0_instruction_abort(unsigned int esr)
380{
381 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_LOW;
382}
383
Catalin Marinas1d18c472012-03-05 11:49:27 +0000384static int __kprobes do_page_fault(unsigned long addr, unsigned int esr,
385 struct pt_regs *regs)
386{
387 struct task_struct *tsk;
388 struct mm_struct *mm;
Punit Agrawal0e3a9022017-06-08 18:25:28 +0100389 int fault, sig, code, major = 0;
Catalin Marinascab15ce2016-08-11 18:44:50 +0100390 unsigned long vm_flags = VM_READ | VM_WRITE;
Will Deacondb6f4102013-07-19 15:37:12 +0100391 unsigned int mm_flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
392
Sandeepa Prabhu2dd0e8d2016-07-08 12:35:48 -0400393 if (notify_page_fault(regs, esr))
394 return 0;
395
Catalin Marinas1d18c472012-03-05 11:49:27 +0000396 tsk = current;
397 mm = tsk->mm;
398
Catalin Marinas1d18c472012-03-05 11:49:27 +0000399 /*
400 * If we're in an interrupt or have no user context, we must not take
401 * the fault.
402 */
David Hildenbrand70ffdb92015-05-11 17:52:11 +0200403 if (faulthandler_disabled() || !mm)
Catalin Marinas1d18c472012-03-05 11:49:27 +0000404 goto no_context;
405
Johannes Weiner759496b2013-09-12 15:13:39 -0700406 if (user_mode(regs))
407 mm_flags |= FAULT_FLAG_USER;
408
Mark Rutland541ec872016-05-31 12:33:03 +0100409 if (is_el0_instruction_abort(esr)) {
Johannes Weiner759496b2013-09-12 15:13:39 -0700410 vm_flags = VM_EXEC;
Mark Rutlandaed40e02014-11-24 12:31:40 +0000411 } else if ((esr & ESR_ELx_WNR) && !(esr & ESR_ELx_CM)) {
Johannes Weiner759496b2013-09-12 15:13:39 -0700412 vm_flags = VM_WRITE;
413 mm_flags |= FAULT_FLAG_WRITE;
414 }
415
Stephen Boydb824b932017-04-05 12:18:31 -0700416 if (addr < USER_DS && is_permission_fault(esr, regs, addr)) {
James Morsee19a6ee2016-06-20 18:28:01 +0100417 /* regs->orig_addr_limit may be 0 if we entered from EL0 */
418 if (regs->orig_addr_limit == KERNEL_DS)
Catalin Marinas70c8abc2016-02-19 14:28:58 +0000419 die("Accessing user space memory with fs=KERNEL_DS", regs, esr);
James Morse70544192016-02-05 14:58:50 +0000420
Laura Abbott9adeb8e2016-08-09 18:25:26 -0700421 if (is_el1_instruction_abort(esr))
422 die("Attempting to execute userspace memory", regs, esr);
423
James Morse57f49592016-02-05 14:58:48 +0000424 if (!search_exception_tables(regs->pc))
Catalin Marinas70c8abc2016-02-19 14:28:58 +0000425 die("Accessing user space memory outside uaccess.h routines", regs, esr);
James Morse57f49592016-02-05 14:58:48 +0000426 }
James Morse338d4f42015-07-22 19:05:54 +0100427
Punit Agrawal0e3a9022017-06-08 18:25:28 +0100428 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr);
429
James Morse338d4f42015-07-22 19:05:54 +0100430 /*
Catalin Marinas1d18c472012-03-05 11:49:27 +0000431 * As per x86, we may deadlock here. However, since the kernel only
432 * validly references user space from well defined areas of the code,
433 * we can bug out early if this is from code which shouldn't.
434 */
435 if (!down_read_trylock(&mm->mmap_sem)) {
436 if (!user_mode(regs) && !search_exception_tables(regs->pc))
437 goto no_context;
438retry:
439 down_read(&mm->mmap_sem);
440 } else {
441 /*
442 * The above down_read_trylock() might have succeeded in which
443 * case, we'll have missed the might_sleep() from down_read().
444 */
445 might_sleep();
446#ifdef CONFIG_DEBUG_VM
447 if (!user_mode(regs) && !search_exception_tables(regs->pc))
448 goto no_context;
449#endif
450 }
451
Will Deacondb6f4102013-07-19 15:37:12 +0100452 fault = __do_page_fault(mm, addr, mm_flags, vm_flags, tsk);
Punit Agrawal0e3a9022017-06-08 18:25:28 +0100453 major |= fault & VM_FAULT_MAJOR;
454
455 if (fault & VM_FAULT_RETRY) {
456 /*
457 * If we need to retry but a fatal signal is pending,
458 * handle the signal first. We do not need to release
459 * the mmap_sem because it would already be released
460 * in __lock_page_or_retry in mm/filemap.c.
461 */
Mark Rutland289d07a2017-07-11 15:19:22 +0100462 if (fatal_signal_pending(current)) {
463 if (!user_mode(regs))
464 goto no_context;
Punit Agrawal0e3a9022017-06-08 18:25:28 +0100465 return 0;
Mark Rutland289d07a2017-07-11 15:19:22 +0100466 }
Punit Agrawal0e3a9022017-06-08 18:25:28 +0100467
468 /*
469 * Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk of
470 * starvation.
471 */
472 if (mm_flags & FAULT_FLAG_ALLOW_RETRY) {
473 mm_flags &= ~FAULT_FLAG_ALLOW_RETRY;
474 mm_flags |= FAULT_FLAG_TRIED;
475 goto retry;
476 }
477 }
478 up_read(&mm->mmap_sem);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000479
480 /*
Punit Agrawal0e3a9022017-06-08 18:25:28 +0100481 * Handle the "normal" (no error) case first.
Catalin Marinas1d18c472012-03-05 11:49:27 +0000482 */
Punit Agrawal0e3a9022017-06-08 18:25:28 +0100483 if (likely(!(fault & (VM_FAULT_ERROR | VM_FAULT_BADMAP |
484 VM_FAULT_BADACCESS)))) {
485 /*
486 * Major/minor page fault accounting is only done
487 * once. If we go through a retry, it is extremely
488 * likely that the page will be found in page cache at
489 * that point.
490 */
491 if (major) {
Catalin Marinas1d18c472012-03-05 11:49:27 +0000492 tsk->maj_flt++;
493 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs,
494 addr);
495 } else {
496 tsk->min_flt++;
497 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, regs,
498 addr);
499 }
Catalin Marinas1d18c472012-03-05 11:49:27 +0000500
Catalin Marinas1d18c472012-03-05 11:49:27 +0000501 return 0;
Punit Agrawal0e3a9022017-06-08 18:25:28 +0100502 }
Catalin Marinas1d18c472012-03-05 11:49:27 +0000503
Johannes Weiner87134102013-09-12 15:13:38 -0700504 /*
505 * If we are in kernel mode at this point, we have no context to
506 * handle this fault with.
507 */
508 if (!user_mode(regs))
509 goto no_context;
510
Catalin Marinas1d18c472012-03-05 11:49:27 +0000511 if (fault & VM_FAULT_OOM) {
512 /*
513 * We ran out of memory, call the OOM killer, and return to
514 * userspace (which will retry the fault, or kill us if we got
515 * oom-killed).
516 */
517 pagefault_out_of_memory();
518 return 0;
519 }
520
Catalin Marinas1d18c472012-03-05 11:49:27 +0000521 if (fault & VM_FAULT_SIGBUS) {
522 /*
523 * We had some memory, but were unable to successfully fix up
524 * this page fault.
525 */
526 sig = SIGBUS;
527 code = BUS_ADRERR;
Jonathan (Zhixiong) Zhange7c600f2017-06-08 18:25:27 +0100528 } else if (fault & (VM_FAULT_HWPOISON | VM_FAULT_HWPOISON_LARGE)) {
529 sig = SIGBUS;
530 code = BUS_MCEERR_AR;
Catalin Marinas1d18c472012-03-05 11:49:27 +0000531 } else {
532 /*
533 * Something tried to access memory that isn't in our memory
534 * map.
535 */
536 sig = SIGSEGV;
537 code = fault == VM_FAULT_BADACCESS ?
538 SEGV_ACCERR : SEGV_MAPERR;
539 }
540
Jonathan (Zhixiong) Zhange7c600f2017-06-08 18:25:27 +0100541 __do_user_fault(tsk, addr, esr, sig, code, regs, fault);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000542 return 0;
543
544no_context:
Kristina Martsenko67ce16e2017-06-09 16:35:52 +0100545 __do_kernel_fault(addr, esr, regs);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000546 return 0;
547}
548
Catalin Marinas1d18c472012-03-05 11:49:27 +0000549static int __kprobes do_translation_fault(unsigned long addr,
550 unsigned int esr,
551 struct pt_regs *regs)
552{
553 if (addr < TASK_SIZE)
554 return do_page_fault(addr, esr, regs);
555
556 do_bad_area(addr, esr, regs);
557 return 0;
558}
559
EunTaik Lee52d75232016-02-16 04:44:35 +0000560static int do_alignment_fault(unsigned long addr, unsigned int esr,
561 struct pt_regs *regs)
562{
563 do_bad_area(addr, esr, regs);
564 return 0;
565}
566
Catalin Marinas1d18c472012-03-05 11:49:27 +0000567static int do_bad(unsigned long addr, unsigned int esr, struct pt_regs *regs)
568{
Will Deaconf67d5c42017-09-22 11:01:26 +0100569 return 1; /* "fault" */
Catalin Marinas1d18c472012-03-05 11:49:27 +0000570}
571
Tyler Baicar32015c22017-06-21 12:17:08 -0600572static int do_sea(unsigned long addr, unsigned int esr, struct pt_regs *regs)
573{
574 struct siginfo info;
575 const struct fault_info *inf;
Tyler Baicar621f48e2017-06-21 12:17:14 -0600576 int ret = 0;
Tyler Baicar32015c22017-06-21 12:17:08 -0600577
578 inf = esr_to_fault_info(esr);
579 pr_err("Synchronous External Abort: %s (0x%08x) at 0x%016lx\n",
580 inf->name, esr, addr);
581
Tyler Baicar7edda082017-06-21 12:17:09 -0600582 /*
583 * Synchronous aborts may interrupt code which had interrupts masked.
584 * Before calling out into the wider kernel tell the interested
585 * subsystems.
586 */
587 if (IS_ENABLED(CONFIG_ACPI_APEI_SEA)) {
588 if (interrupts_enabled(regs))
589 nmi_enter();
590
Tyler Baicar621f48e2017-06-21 12:17:14 -0600591 ret = ghes_notify_sea();
Tyler Baicar7edda082017-06-21 12:17:09 -0600592
593 if (interrupts_enabled(regs))
594 nmi_exit();
595 }
596
Tyler Baicar32015c22017-06-21 12:17:08 -0600597 info.si_signo = SIGBUS;
598 info.si_errno = 0;
599 info.si_code = 0;
600 if (esr & ESR_ELx_FnV)
601 info.si_addr = NULL;
602 else
603 info.si_addr = (void __user *)addr;
604 arm64_notify_die("", regs, &info, esr);
605
Tyler Baicar621f48e2017-06-21 12:17:14 -0600606 return ret;
Tyler Baicar32015c22017-06-21 12:17:08 -0600607}
608
Victor Kamensky09a6adf2017-04-03 22:51:01 -0700609static const struct fault_info fault_info[] = {
Catalin Marinas1d18c472012-03-05 11:49:27 +0000610 { do_bad, SIGBUS, 0, "ttbr address size fault" },
611 { do_bad, SIGBUS, 0, "level 1 address size fault" },
612 { do_bad, SIGBUS, 0, "level 2 address size fault" },
613 { do_bad, SIGBUS, 0, "level 3 address size fault" },
Will Deacon7f73f7a2014-11-21 14:22:22 +0000614 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 0 translation fault" },
Catalin Marinas1d18c472012-03-05 11:49:27 +0000615 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 1 translation fault" },
616 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 2 translation fault" },
Will Deacon760bfb42017-09-29 12:27:41 +0100617 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 3 translation fault" },
Mark Rutlandc03784ee82015-11-23 15:09:36 +0000618 { do_bad, SIGBUS, 0, "unknown 8" },
Steve Capper084bd292013-04-10 13:48:00 +0100619 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 access flag fault" },
620 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 access flag fault" },
Catalin Marinas1d18c472012-03-05 11:49:27 +0000621 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 access flag fault" },
Mark Rutlandc03784ee82015-11-23 15:09:36 +0000622 { do_bad, SIGBUS, 0, "unknown 12" },
Steve Capper084bd292013-04-10 13:48:00 +0100623 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 permission fault" },
624 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 permission fault" },
Catalin Marinas1d18c472012-03-05 11:49:27 +0000625 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 permission fault" },
Tyler Baicar32015c22017-06-21 12:17:08 -0600626 { do_sea, SIGBUS, 0, "synchronous external abort" },
Mark Rutlandc03784ee82015-11-23 15:09:36 +0000627 { do_bad, SIGBUS, 0, "unknown 17" },
Catalin Marinas1d18c472012-03-05 11:49:27 +0000628 { do_bad, SIGBUS, 0, "unknown 18" },
629 { do_bad, SIGBUS, 0, "unknown 19" },
Tyler Baicar32015c22017-06-21 12:17:08 -0600630 { do_sea, SIGBUS, 0, "level 0 (translation table walk)" },
631 { do_sea, SIGBUS, 0, "level 1 (translation table walk)" },
632 { do_sea, SIGBUS, 0, "level 2 (translation table walk)" },
633 { do_sea, SIGBUS, 0, "level 3 (translation table walk)" },
634 { do_sea, SIGBUS, 0, "synchronous parity or ECC error" },
Mark Rutlandc03784ee82015-11-23 15:09:36 +0000635 { do_bad, SIGBUS, 0, "unknown 25" },
Catalin Marinas1d18c472012-03-05 11:49:27 +0000636 { do_bad, SIGBUS, 0, "unknown 26" },
637 { do_bad, SIGBUS, 0, "unknown 27" },
Tyler Baicar32015c22017-06-21 12:17:08 -0600638 { do_sea, SIGBUS, 0, "level 0 synchronous parity error (translation table walk)" },
639 { do_sea, SIGBUS, 0, "level 1 synchronous parity error (translation table walk)" },
640 { do_sea, SIGBUS, 0, "level 2 synchronous parity error (translation table walk)" },
641 { do_sea, SIGBUS, 0, "level 3 synchronous parity error (translation table walk)" },
Catalin Marinas1d18c472012-03-05 11:49:27 +0000642 { do_bad, SIGBUS, 0, "unknown 32" },
EunTaik Lee52d75232016-02-16 04:44:35 +0000643 { do_alignment_fault, SIGBUS, BUS_ADRALN, "alignment fault" },
Mark Rutlandc03784ee82015-11-23 15:09:36 +0000644 { do_bad, SIGBUS, 0, "unknown 34" },
Catalin Marinas1d18c472012-03-05 11:49:27 +0000645 { do_bad, SIGBUS, 0, "unknown 35" },
646 { do_bad, SIGBUS, 0, "unknown 36" },
647 { do_bad, SIGBUS, 0, "unknown 37" },
648 { do_bad, SIGBUS, 0, "unknown 38" },
649 { do_bad, SIGBUS, 0, "unknown 39" },
650 { do_bad, SIGBUS, 0, "unknown 40" },
651 { do_bad, SIGBUS, 0, "unknown 41" },
652 { do_bad, SIGBUS, 0, "unknown 42" },
653 { do_bad, SIGBUS, 0, "unknown 43" },
654 { do_bad, SIGBUS, 0, "unknown 44" },
655 { do_bad, SIGBUS, 0, "unknown 45" },
656 { do_bad, SIGBUS, 0, "unknown 46" },
657 { do_bad, SIGBUS, 0, "unknown 47" },
Mark Rutlandc03784ee82015-11-23 15:09:36 +0000658 { do_bad, SIGBUS, 0, "TLB conflict abort" },
Catalin Marinas1d18c472012-03-05 11:49:27 +0000659 { do_bad, SIGBUS, 0, "unknown 49" },
660 { do_bad, SIGBUS, 0, "unknown 50" },
661 { do_bad, SIGBUS, 0, "unknown 51" },
662 { do_bad, SIGBUS, 0, "implementation fault (lockdown abort)" },
Mark Rutlandc03784ee82015-11-23 15:09:36 +0000663 { do_bad, SIGBUS, 0, "implementation fault (unsupported exclusive)" },
Catalin Marinas1d18c472012-03-05 11:49:27 +0000664 { do_bad, SIGBUS, 0, "unknown 54" },
665 { do_bad, SIGBUS, 0, "unknown 55" },
666 { do_bad, SIGBUS, 0, "unknown 56" },
667 { do_bad, SIGBUS, 0, "unknown 57" },
Mark Rutlandc03784ee82015-11-23 15:09:36 +0000668 { do_bad, SIGBUS, 0, "unknown 58" },
Catalin Marinas1d18c472012-03-05 11:49:27 +0000669 { do_bad, SIGBUS, 0, "unknown 59" },
670 { do_bad, SIGBUS, 0, "unknown 60" },
Mark Rutlandc03784ee82015-11-23 15:09:36 +0000671 { do_bad, SIGBUS, 0, "section domain fault" },
672 { do_bad, SIGBUS, 0, "page domain fault" },
Catalin Marinas1d18c472012-03-05 11:49:27 +0000673 { do_bad, SIGBUS, 0, "unknown 63" },
674};
675
Tyler Baicar621f48e2017-06-21 12:17:14 -0600676int handle_guest_sea(phys_addr_t addr, unsigned int esr)
677{
678 int ret = -ENOENT;
679
680 if (IS_ENABLED(CONFIG_ACPI_APEI_SEA))
681 ret = ghes_notify_sea();
682
683 return ret;
684}
685
Catalin Marinas1d18c472012-03-05 11:49:27 +0000686asmlinkage void __exception do_mem_abort(unsigned long addr, unsigned int esr,
687 struct pt_regs *regs)
688{
Victor Kamensky09a6adf2017-04-03 22:51:01 -0700689 const struct fault_info *inf = esr_to_fault_info(esr);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000690 struct siginfo info;
691
692 if (!inf->fn(addr, esr, regs))
693 return;
694
695 pr_alert("Unhandled fault: %s (0x%08x) at 0x%016lx\n",
696 inf->name, esr, addr);
697
Julien Thierry1f9b8932017-08-04 09:31:42 +0100698 mem_abort_decode(esr);
699
Catalin Marinas1d18c472012-03-05 11:49:27 +0000700 info.si_signo = inf->sig;
701 info.si_errno = 0;
702 info.si_code = inf->code;
703 info.si_addr = (void __user *)addr;
704 arm64_notify_die("", regs, &info, esr);
705}
706
Catalin Marinas1d18c472012-03-05 11:49:27 +0000707asmlinkage void __exception do_sp_pc_abort(unsigned long addr,
708 unsigned int esr,
709 struct pt_regs *regs)
710{
711 struct siginfo info;
Vladimir Murzin9e793ab2015-06-19 15:28:16 +0100712 struct task_struct *tsk = current;
713
714 if (show_unhandled_signals && unhandled_signal(tsk, SIGBUS))
715 pr_info_ratelimited("%s[%d]: %s exception: pc=%p sp=%p\n",
716 tsk->comm, task_pid_nr(tsk),
717 esr_get_class_string(esr), (void *)regs->pc,
718 (void *)regs->sp);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000719
720 info.si_signo = SIGBUS;
721 info.si_errno = 0;
722 info.si_code = BUS_ADRALN;
723 info.si_addr = (void __user *)addr;
Vladimir Murzin9e793ab2015-06-19 15:28:16 +0100724 arm64_notify_die("Oops - SP/PC alignment exception", regs, &info, esr);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000725}
726
Dave P Martin9fb74102015-07-24 16:37:48 +0100727int __init early_brk64(unsigned long addr, unsigned int esr,
728 struct pt_regs *regs);
729
730/*
731 * __refdata because early_brk64 is __init, but the reference to it is
732 * clobbered at arch_initcall time.
733 * See traps.c and debug-monitors.c:debug_traps_init().
734 */
735static struct fault_info __refdata debug_fault_info[] = {
Catalin Marinas1d18c472012-03-05 11:49:27 +0000736 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware breakpoint" },
737 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware single-step" },
738 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware watchpoint" },
739 { do_bad, SIGBUS, 0, "unknown 3" },
740 { do_bad, SIGTRAP, TRAP_BRKPT, "aarch32 BKPT" },
741 { do_bad, SIGTRAP, 0, "aarch32 vector catch" },
Dave P Martin9fb74102015-07-24 16:37:48 +0100742 { early_brk64, SIGTRAP, TRAP_BRKPT, "aarch64 BRK" },
Catalin Marinas1d18c472012-03-05 11:49:27 +0000743 { do_bad, SIGBUS, 0, "unknown 7" },
744};
745
746void __init hook_debug_fault_code(int nr,
747 int (*fn)(unsigned long, unsigned int, struct pt_regs *),
748 int sig, int code, const char *name)
749{
750 BUG_ON(nr < 0 || nr >= ARRAY_SIZE(debug_fault_info));
751
752 debug_fault_info[nr].fn = fn;
753 debug_fault_info[nr].sig = sig;
754 debug_fault_info[nr].code = code;
755 debug_fault_info[nr].name = name;
756}
757
758asmlinkage int __exception do_debug_exception(unsigned long addr,
759 unsigned int esr,
760 struct pt_regs *regs)
761{
762 const struct fault_info *inf = debug_fault_info + DBG_ESR_EVT(esr);
763 struct siginfo info;
James Morse6afedcd2016-04-13 13:40:00 +0100764 int rv;
Catalin Marinas1d18c472012-03-05 11:49:27 +0000765
James Morse6afedcd2016-04-13 13:40:00 +0100766 /*
767 * Tell lockdep we disabled irqs in entry.S. Do nothing if they were
768 * already disabled to preserve the last enabled/disabled addresses.
769 */
770 if (interrupts_enabled(regs))
771 trace_hardirqs_off();
Catalin Marinas1d18c472012-03-05 11:49:27 +0000772
James Morse6afedcd2016-04-13 13:40:00 +0100773 if (!inf->fn(addr, esr, regs)) {
774 rv = 1;
775 } else {
776 pr_alert("Unhandled debug exception: %s (0x%08x) at 0x%016lx\n",
777 inf->name, esr, addr);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000778
James Morse6afedcd2016-04-13 13:40:00 +0100779 info.si_signo = inf->sig;
780 info.si_errno = 0;
781 info.si_code = inf->code;
782 info.si_addr = (void __user *)addr;
783 arm64_notify_die("", regs, &info, 0);
784 rv = 0;
785 }
Catalin Marinas1d18c472012-03-05 11:49:27 +0000786
James Morse6afedcd2016-04-13 13:40:00 +0100787 if (interrupts_enabled(regs))
788 trace_hardirqs_on();
789
790 return rv;
Catalin Marinas1d18c472012-03-05 11:49:27 +0000791}
Sandeepa Prabhu2dd0e8d2016-07-08 12:35:48 -0400792NOKPROBE_SYMBOL(do_debug_exception);
James Morse338d4f42015-07-22 19:05:54 +0100793
794#ifdef CONFIG_ARM64_PAN
James Morse2a6dcb22016-10-18 11:27:46 +0100795int cpu_enable_pan(void *__unused)
James Morse338d4f42015-07-22 19:05:54 +0100796{
James Morse7209c862016-10-18 11:27:47 +0100797 /*
798 * We modify PSTATE. This won't work from irq context as the PSTATE
799 * is discarded once we return from the exception.
800 */
801 WARN_ON_ONCE(in_interrupt());
802
James Morse338d4f42015-07-22 19:05:54 +0100803 config_sctlr_el1(SCTLR_EL1_SPAN, 0);
James Morse7209c862016-10-18 11:27:47 +0100804 asm(SET_PSTATE_PAN(1));
James Morse2a6dcb22016-10-18 11:27:46 +0100805 return 0;
James Morse338d4f42015-07-22 19:05:54 +0100806}
807#endif /* CONFIG_ARM64_PAN */