blob: 37442407d9483235e3171c1321e581e33df68ad9 [file] [log] [blame]
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001/*
2 * AT86RF230/RF231 driver
3 *
4 * Copyright (C) 2009-2012 Siemens AG
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Written by:
20 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
21 * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
22 */
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/interrupt.h>
26#include <linux/gpio.h>
27#include <linux/delay.h>
28#include <linux/mutex.h>
29#include <linux/workqueue.h>
30#include <linux/spinlock.h>
31#include <linux/spi/spi.h>
32#include <linux/spi/at86rf230.h>
33#include <linux/skbuff.h>
34
35#include <net/mac802154.h>
36#include <net/wpan-phy.h>
37
38struct at86rf230_local {
39 struct spi_device *spi;
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +000040
41 u8 part;
42 u8 vers;
43
44 u8 buf[2];
45 struct mutex bmux;
46
47 struct work_struct irqwork;
48 struct completion tx_complete;
49
50 struct ieee802154_dev *dev;
51
52 spinlock_t lock;
Sascha Herrmann057dad62013-04-14 22:33:29 +000053 bool irq_busy;
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +000054 bool is_tx;
Phoebe Buckheisterf2fdd672014-02-17 11:34:15 +010055 bool tx_aret;
Phoebe Buckheister6ca00192014-02-17 11:34:12 +010056
57 int rssi_base_val;
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +000058};
59
Jean Sacren44a6bd82014-02-25 22:38:29 -070060static bool is_rf212(struct at86rf230_local *local)
Phoebe Buckheister8fad3462014-02-17 11:34:06 +010061{
62 return local->part == 7;
63}
64
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +000065#define RG_TRX_STATUS (0x01)
66#define SR_TRX_STATUS 0x01, 0x1f, 0
67#define SR_RESERVED_01_3 0x01, 0x20, 5
68#define SR_CCA_STATUS 0x01, 0x40, 6
69#define SR_CCA_DONE 0x01, 0x80, 7
70#define RG_TRX_STATE (0x02)
71#define SR_TRX_CMD 0x02, 0x1f, 0
72#define SR_TRAC_STATUS 0x02, 0xe0, 5
73#define RG_TRX_CTRL_0 (0x03)
74#define SR_CLKM_CTRL 0x03, 0x07, 0
75#define SR_CLKM_SHA_SEL 0x03, 0x08, 3
76#define SR_PAD_IO_CLKM 0x03, 0x30, 4
77#define SR_PAD_IO 0x03, 0xc0, 6
78#define RG_TRX_CTRL_1 (0x04)
79#define SR_IRQ_POLARITY 0x04, 0x01, 0
80#define SR_IRQ_MASK_MODE 0x04, 0x02, 1
81#define SR_SPI_CMD_MODE 0x04, 0x0c, 2
82#define SR_RX_BL_CTRL 0x04, 0x10, 4
83#define SR_TX_AUTO_CRC_ON 0x04, 0x20, 5
84#define SR_IRQ_2_EXT_EN 0x04, 0x40, 6
85#define SR_PA_EXT_EN 0x04, 0x80, 7
86#define RG_PHY_TX_PWR (0x05)
87#define SR_TX_PWR 0x05, 0x0f, 0
88#define SR_PA_LT 0x05, 0x30, 4
89#define SR_PA_BUF_LT 0x05, 0xc0, 6
90#define RG_PHY_RSSI (0x06)
91#define SR_RSSI 0x06, 0x1f, 0
92#define SR_RND_VALUE 0x06, 0x60, 5
93#define SR_RX_CRC_VALID 0x06, 0x80, 7
94#define RG_PHY_ED_LEVEL (0x07)
95#define SR_ED_LEVEL 0x07, 0xff, 0
96#define RG_PHY_CC_CCA (0x08)
97#define SR_CHANNEL 0x08, 0x1f, 0
98#define SR_CCA_MODE 0x08, 0x60, 5
99#define SR_CCA_REQUEST 0x08, 0x80, 7
100#define RG_CCA_THRES (0x09)
101#define SR_CCA_ED_THRES 0x09, 0x0f, 0
102#define SR_RESERVED_09_1 0x09, 0xf0, 4
103#define RG_RX_CTRL (0x0a)
104#define SR_PDT_THRES 0x0a, 0x0f, 0
105#define SR_RESERVED_0a_1 0x0a, 0xf0, 4
106#define RG_SFD_VALUE (0x0b)
107#define SR_SFD_VALUE 0x0b, 0xff, 0
108#define RG_TRX_CTRL_2 (0x0c)
109#define SR_OQPSK_DATA_RATE 0x0c, 0x03, 0
Phoebe Buckheister8fad3462014-02-17 11:34:06 +0100110#define SR_SUB_MODE 0x0c, 0x04, 2
111#define SR_BPSK_QPSK 0x0c, 0x08, 3
Phoebe Buckheister643e53c2014-02-17 11:34:09 +0100112#define SR_OQPSK_SUB1_RC_EN 0x0c, 0x10, 4
113#define SR_RESERVED_0c_5 0x0c, 0x60, 5
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000114#define SR_RX_SAFE_MODE 0x0c, 0x80, 7
115#define RG_ANT_DIV (0x0d)
116#define SR_ANT_CTRL 0x0d, 0x03, 0
117#define SR_ANT_EXT_SW_EN 0x0d, 0x04, 2
118#define SR_ANT_DIV_EN 0x0d, 0x08, 3
119#define SR_RESERVED_0d_2 0x0d, 0x70, 4
120#define SR_ANT_SEL 0x0d, 0x80, 7
121#define RG_IRQ_MASK (0x0e)
122#define SR_IRQ_MASK 0x0e, 0xff, 0
123#define RG_IRQ_STATUS (0x0f)
124#define SR_IRQ_0_PLL_LOCK 0x0f, 0x01, 0
125#define SR_IRQ_1_PLL_UNLOCK 0x0f, 0x02, 1
126#define SR_IRQ_2_RX_START 0x0f, 0x04, 2
127#define SR_IRQ_3_TRX_END 0x0f, 0x08, 3
128#define SR_IRQ_4_CCA_ED_DONE 0x0f, 0x10, 4
129#define SR_IRQ_5_AMI 0x0f, 0x20, 5
130#define SR_IRQ_6_TRX_UR 0x0f, 0x40, 6
131#define SR_IRQ_7_BAT_LOW 0x0f, 0x80, 7
132#define RG_VREG_CTRL (0x10)
133#define SR_RESERVED_10_6 0x10, 0x03, 0
134#define SR_DVDD_OK 0x10, 0x04, 2
135#define SR_DVREG_EXT 0x10, 0x08, 3
136#define SR_RESERVED_10_3 0x10, 0x30, 4
137#define SR_AVDD_OK 0x10, 0x40, 6
138#define SR_AVREG_EXT 0x10, 0x80, 7
139#define RG_BATMON (0x11)
140#define SR_BATMON_VTH 0x11, 0x0f, 0
141#define SR_BATMON_HR 0x11, 0x10, 4
142#define SR_BATMON_OK 0x11, 0x20, 5
143#define SR_RESERVED_11_1 0x11, 0xc0, 6
144#define RG_XOSC_CTRL (0x12)
145#define SR_XTAL_TRIM 0x12, 0x0f, 0
146#define SR_XTAL_MODE 0x12, 0xf0, 4
147#define RG_RX_SYN (0x15)
148#define SR_RX_PDT_LEVEL 0x15, 0x0f, 0
149#define SR_RESERVED_15_2 0x15, 0x70, 4
150#define SR_RX_PDT_DIS 0x15, 0x80, 7
151#define RG_XAH_CTRL_1 (0x17)
152#define SR_RESERVED_17_8 0x17, 0x01, 0
153#define SR_AACK_PROM_MODE 0x17, 0x02, 1
154#define SR_AACK_ACK_TIME 0x17, 0x04, 2
155#define SR_RESERVED_17_5 0x17, 0x08, 3
156#define SR_AACK_UPLD_RES_FT 0x17, 0x10, 4
157#define SR_AACK_FLTR_RES_FT 0x17, 0x20, 5
Phoebe Buckheister84dda3c2014-02-17 11:34:10 +0100158#define SR_CSMA_LBT_MODE 0x17, 0x40, 6
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000159#define SR_RESERVED_17_1 0x17, 0x80, 7
160#define RG_FTN_CTRL (0x18)
161#define SR_RESERVED_18_2 0x18, 0x7f, 0
162#define SR_FTN_START 0x18, 0x80, 7
163#define RG_PLL_CF (0x1a)
164#define SR_RESERVED_1a_2 0x1a, 0x7f, 0
165#define SR_PLL_CF_START 0x1a, 0x80, 7
166#define RG_PLL_DCU (0x1b)
167#define SR_RESERVED_1b_3 0x1b, 0x3f, 0
168#define SR_RESERVED_1b_2 0x1b, 0x40, 6
169#define SR_PLL_DCU_START 0x1b, 0x80, 7
170#define RG_PART_NUM (0x1c)
171#define SR_PART_NUM 0x1c, 0xff, 0
172#define RG_VERSION_NUM (0x1d)
173#define SR_VERSION_NUM 0x1d, 0xff, 0
174#define RG_MAN_ID_0 (0x1e)
175#define SR_MAN_ID_0 0x1e, 0xff, 0
176#define RG_MAN_ID_1 (0x1f)
177#define SR_MAN_ID_1 0x1f, 0xff, 0
178#define RG_SHORT_ADDR_0 (0x20)
179#define SR_SHORT_ADDR_0 0x20, 0xff, 0
180#define RG_SHORT_ADDR_1 (0x21)
181#define SR_SHORT_ADDR_1 0x21, 0xff, 0
182#define RG_PAN_ID_0 (0x22)
183#define SR_PAN_ID_0 0x22, 0xff, 0
184#define RG_PAN_ID_1 (0x23)
185#define SR_PAN_ID_1 0x23, 0xff, 0
186#define RG_IEEE_ADDR_0 (0x24)
187#define SR_IEEE_ADDR_0 0x24, 0xff, 0
188#define RG_IEEE_ADDR_1 (0x25)
189#define SR_IEEE_ADDR_1 0x25, 0xff, 0
190#define RG_IEEE_ADDR_2 (0x26)
191#define SR_IEEE_ADDR_2 0x26, 0xff, 0
192#define RG_IEEE_ADDR_3 (0x27)
193#define SR_IEEE_ADDR_3 0x27, 0xff, 0
194#define RG_IEEE_ADDR_4 (0x28)
195#define SR_IEEE_ADDR_4 0x28, 0xff, 0
196#define RG_IEEE_ADDR_5 (0x29)
197#define SR_IEEE_ADDR_5 0x29, 0xff, 0
198#define RG_IEEE_ADDR_6 (0x2a)
199#define SR_IEEE_ADDR_6 0x2a, 0xff, 0
200#define RG_IEEE_ADDR_7 (0x2b)
201#define SR_IEEE_ADDR_7 0x2b, 0xff, 0
202#define RG_XAH_CTRL_0 (0x2c)
203#define SR_SLOTTED_OPERATION 0x2c, 0x01, 0
204#define SR_MAX_CSMA_RETRIES 0x2c, 0x0e, 1
205#define SR_MAX_FRAME_RETRIES 0x2c, 0xf0, 4
206#define RG_CSMA_SEED_0 (0x2d)
207#define SR_CSMA_SEED_0 0x2d, 0xff, 0
208#define RG_CSMA_SEED_1 (0x2e)
209#define SR_CSMA_SEED_1 0x2e, 0x07, 0
210#define SR_AACK_I_AM_COORD 0x2e, 0x08, 3
211#define SR_AACK_DIS_ACK 0x2e, 0x10, 4
212#define SR_AACK_SET_PD 0x2e, 0x20, 5
213#define SR_AACK_FVN_MODE 0x2e, 0xc0, 6
214#define RG_CSMA_BE (0x2f)
215#define SR_MIN_BE 0x2f, 0x0f, 0
216#define SR_MAX_BE 0x2f, 0xf0, 4
217
218#define CMD_REG 0x80
219#define CMD_REG_MASK 0x3f
220#define CMD_WRITE 0x40
221#define CMD_FB 0x20
222
223#define IRQ_BAT_LOW (1 << 7)
224#define IRQ_TRX_UR (1 << 6)
225#define IRQ_AMI (1 << 5)
226#define IRQ_CCA_ED (1 << 4)
227#define IRQ_TRX_END (1 << 3)
228#define IRQ_RX_START (1 << 2)
229#define IRQ_PLL_UNL (1 << 1)
230#define IRQ_PLL_LOCK (1 << 0)
231
Sascha Herrmann43b5abe2013-04-14 22:33:28 +0000232#define IRQ_ACTIVE_HIGH 0
233#define IRQ_ACTIVE_LOW 1
234
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000235#define STATE_P_ON 0x00 /* BUSY */
236#define STATE_BUSY_RX 0x01
237#define STATE_BUSY_TX 0x02
238#define STATE_FORCE_TRX_OFF 0x03
239#define STATE_FORCE_TX_ON 0x04 /* IDLE */
240/* 0x05 */ /* INVALID_PARAMETER */
241#define STATE_RX_ON 0x06
242/* 0x07 */ /* SUCCESS */
243#define STATE_TRX_OFF 0x08
244#define STATE_TX_ON 0x09
245/* 0x0a - 0x0e */ /* 0x0a - UNSUPPORTED_ATTRIBUTE */
246#define STATE_SLEEP 0x0F
Thomas Stilwell48d5dba2014-03-10 19:29:25 -0500247#define STATE_PREP_DEEP_SLEEP 0x10
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000248#define STATE_BUSY_RX_AACK 0x11
249#define STATE_BUSY_TX_ARET 0x12
stefan@datenfreihafen.org028889b2013-03-26 12:41:31 +0000250#define STATE_RX_AACK_ON 0x16
251#define STATE_TX_ARET_ON 0x19
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000252#define STATE_RX_ON_NOCLK 0x1C
253#define STATE_RX_AACK_ON_NOCLK 0x1D
254#define STATE_BUSY_RX_AACK_NOCLK 0x1E
255#define STATE_TRANSITION_IN_PROGRESS 0x1F
256
257static int
Phoebe Buckheister8fad3462014-02-17 11:34:06 +0100258__at86rf230_detect_device(struct spi_device *spi, u16 *man_id, u8 *part,
259 u8 *version)
260{
261 u8 data[4];
262 u8 *buf = kmalloc(2, GFP_KERNEL);
263 int status;
264 struct spi_message msg;
265 struct spi_transfer xfer = {
266 .len = 2,
267 .tx_buf = buf,
268 .rx_buf = buf,
269 };
270 u8 reg;
271
272 if (!buf)
273 return -ENOMEM;
274
275 for (reg = RG_PART_NUM; reg <= RG_MAN_ID_1; reg++) {
276 buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
277 buf[1] = 0xff;
278 dev_vdbg(&spi->dev, "buf[0] = %02x\n", buf[0]);
279 spi_message_init(&msg);
280 spi_message_add_tail(&xfer, &msg);
281
282 status = spi_sync(spi, &msg);
283 dev_vdbg(&spi->dev, "status = %d\n", status);
284 if (msg.status)
285 status = msg.status;
286
287 dev_vdbg(&spi->dev, "status = %d\n", status);
288 dev_vdbg(&spi->dev, "buf[0] = %02x\n", buf[0]);
289 dev_vdbg(&spi->dev, "buf[1] = %02x\n", buf[1]);
290
291 if (status == 0)
292 data[reg - RG_PART_NUM] = buf[1];
293 else
294 break;
295 }
296
297 if (status == 0) {
298 *part = data[0];
299 *version = data[1];
300 *man_id = (data[3] << 8) | data[2];
301 }
302
303 kfree(buf);
304
305 return status;
306}
307
308static int
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000309__at86rf230_write(struct at86rf230_local *lp, u8 addr, u8 data)
310{
311 u8 *buf = lp->buf;
312 int status;
313 struct spi_message msg;
314 struct spi_transfer xfer = {
315 .len = 2,
316 .tx_buf = buf,
317 };
318
319 buf[0] = (addr & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
320 buf[1] = data;
321 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
322 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
323 spi_message_init(&msg);
324 spi_message_add_tail(&xfer, &msg);
325
326 status = spi_sync(lp->spi, &msg);
327 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
328 if (msg.status)
329 status = msg.status;
330
331 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
332 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
333 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
334
335 return status;
336}
337
338static int
339__at86rf230_read_subreg(struct at86rf230_local *lp,
340 u8 addr, u8 mask, int shift, u8 *data)
341{
342 u8 *buf = lp->buf;
343 int status;
344 struct spi_message msg;
345 struct spi_transfer xfer = {
346 .len = 2,
347 .tx_buf = buf,
348 .rx_buf = buf,
349 };
350
351 buf[0] = (addr & CMD_REG_MASK) | CMD_REG;
352 buf[1] = 0xff;
353 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
354 spi_message_init(&msg);
355 spi_message_add_tail(&xfer, &msg);
356
357 status = spi_sync(lp->spi, &msg);
358 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
359 if (msg.status)
360 status = msg.status;
361
362 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
363 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
364 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
365
366 if (status == 0)
367 *data = buf[1];
368
369 return status;
370}
371
372static int
373at86rf230_read_subreg(struct at86rf230_local *lp,
374 u8 addr, u8 mask, int shift, u8 *data)
375{
376 int status;
377
378 mutex_lock(&lp->bmux);
379 status = __at86rf230_read_subreg(lp, addr, mask, shift, data);
380 mutex_unlock(&lp->bmux);
381
382 return status;
383}
384
385static int
386at86rf230_write_subreg(struct at86rf230_local *lp,
387 u8 addr, u8 mask, int shift, u8 data)
388{
389 int status;
390 u8 val;
391
392 mutex_lock(&lp->bmux);
393 status = __at86rf230_read_subreg(lp, addr, 0xff, 0, &val);
394 if (status)
395 goto out;
396
397 val &= ~mask;
398 val |= (data << shift) & mask;
399
400 status = __at86rf230_write(lp, addr, val);
401out:
402 mutex_unlock(&lp->bmux);
403
404 return status;
405}
406
407static int
408at86rf230_write_fbuf(struct at86rf230_local *lp, u8 *data, u8 len)
409{
410 u8 *buf = lp->buf;
411 int status;
412 struct spi_message msg;
413 struct spi_transfer xfer_head = {
414 .len = 2,
415 .tx_buf = buf,
416
417 };
418 struct spi_transfer xfer_buf = {
419 .len = len,
420 .tx_buf = data,
421 };
422
423 mutex_lock(&lp->bmux);
424 buf[0] = CMD_WRITE | CMD_FB;
425 buf[1] = len + 2; /* 2 bytes for CRC that isn't written */
426
427 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
428 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
429
430 spi_message_init(&msg);
431 spi_message_add_tail(&xfer_head, &msg);
432 spi_message_add_tail(&xfer_buf, &msg);
433
434 status = spi_sync(lp->spi, &msg);
435 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
436 if (msg.status)
437 status = msg.status;
438
439 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
440 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
441 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
442
443 mutex_unlock(&lp->bmux);
444 return status;
445}
446
447static int
448at86rf230_read_fbuf(struct at86rf230_local *lp, u8 *data, u8 *len, u8 *lqi)
449{
450 u8 *buf = lp->buf;
451 int status;
452 struct spi_message msg;
453 struct spi_transfer xfer_head = {
454 .len = 2,
455 .tx_buf = buf,
456 .rx_buf = buf,
457 };
458 struct spi_transfer xfer_head1 = {
459 .len = 2,
460 .tx_buf = buf,
461 .rx_buf = buf,
462 };
463 struct spi_transfer xfer_buf = {
464 .len = 0,
465 .rx_buf = data,
466 };
467
468 mutex_lock(&lp->bmux);
469
470 buf[0] = CMD_FB;
471 buf[1] = 0x00;
472
473 spi_message_init(&msg);
474 spi_message_add_tail(&xfer_head, &msg);
475
476 status = spi_sync(lp->spi, &msg);
477 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
478
479 xfer_buf.len = *(buf + 1) + 1;
480 *len = buf[1];
481
482 buf[0] = CMD_FB;
483 buf[1] = 0x00;
484
485 spi_message_init(&msg);
486 spi_message_add_tail(&xfer_head1, &msg);
487 spi_message_add_tail(&xfer_buf, &msg);
488
489 status = spi_sync(lp->spi, &msg);
490
491 if (msg.status)
492 status = msg.status;
493
494 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
495 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
496 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
497
498 if (status) {
499 if (lqi && (*len > lp->buf[1]))
500 *lqi = data[lp->buf[1]];
501 }
502 mutex_unlock(&lp->bmux);
503
504 return status;
505}
506
507static int
508at86rf230_ed(struct ieee802154_dev *dev, u8 *level)
509{
510 might_sleep();
511 BUG_ON(!level);
512 *level = 0xbe;
513 return 0;
514}
515
516static int
517at86rf230_state(struct ieee802154_dev *dev, int state)
518{
519 struct at86rf230_local *lp = dev->priv;
520 int rc;
521 u8 val;
522 u8 desired_status;
523
524 might_sleep();
525
526 if (state == STATE_FORCE_TX_ON)
527 desired_status = STATE_TX_ON;
528 else if (state == STATE_FORCE_TRX_OFF)
529 desired_status = STATE_TRX_OFF;
530 else
531 desired_status = state;
532
533 do {
534 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &val);
535 if (rc)
536 goto err;
537 } while (val == STATE_TRANSITION_IN_PROGRESS);
538
539 if (val == desired_status)
540 return 0;
541
542 /* state is equal to phy states */
543 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, state);
544 if (rc)
545 goto err;
546
547 do {
548 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &val);
549 if (rc)
550 goto err;
551 } while (val == STATE_TRANSITION_IN_PROGRESS);
552
553
Phoebe Buckheisterf2fdd672014-02-17 11:34:15 +0100554 if (val == desired_status ||
555 (desired_status == STATE_RX_ON && val == STATE_BUSY_RX) ||
556 (desired_status == STATE_RX_AACK_ON && val == STATE_BUSY_RX_AACK))
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000557 return 0;
558
559 pr_err("unexpected state change: %d, asked for %d\n", val, state);
560 return -EBUSY;
561
562err:
563 pr_err("error: %d\n", rc);
564 return rc;
565}
566
567static int
568at86rf230_start(struct ieee802154_dev *dev)
569{
570 struct at86rf230_local *lp = dev->priv;
571 u8 rc;
572
573 rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
574 if (rc)
575 return rc;
576
Alexander Aring7332fcb2014-03-15 09:29:03 +0100577 rc = at86rf230_state(dev, STATE_TX_ON);
Phoebe Buckheisterf2fdd672014-02-17 11:34:15 +0100578 if (rc)
579 return rc;
580
Phoebe Buckheister5b520bb2014-02-17 11:34:07 +0100581 return at86rf230_state(dev, STATE_RX_AACK_ON);
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000582}
583
584static void
585at86rf230_stop(struct ieee802154_dev *dev)
586{
587 at86rf230_state(dev, STATE_FORCE_TRX_OFF);
588}
589
590static int
Phoebe Buckheister8fad3462014-02-17 11:34:06 +0100591at86rf230_set_channel(struct at86rf230_local *lp, int page, int channel)
592{
Phoebe Buckheister6ca00192014-02-17 11:34:12 +0100593 lp->rssi_base_val = -91;
594
Phoebe Buckheister8fad3462014-02-17 11:34:06 +0100595 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
596}
597
598static int
599at86rf212_set_channel(struct at86rf230_local *lp, int page, int channel)
600{
601 int rc;
602
603 if (channel == 0)
604 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
605 else
606 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
607 if (rc < 0)
608 return rc;
609
Phoebe Buckheister6ca00192014-02-17 11:34:12 +0100610 if (page == 0) {
Phoebe Buckheister643e53c2014-02-17 11:34:09 +0100611 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
Phoebe Buckheister6ca00192014-02-17 11:34:12 +0100612 lp->rssi_base_val = -100;
613 } else {
Phoebe Buckheister643e53c2014-02-17 11:34:09 +0100614 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
Phoebe Buckheister6ca00192014-02-17 11:34:12 +0100615 lp->rssi_base_val = -98;
616 }
Phoebe Buckheister643e53c2014-02-17 11:34:09 +0100617 if (rc < 0)
618 return rc;
619
Phoebe Buckheister8fad3462014-02-17 11:34:06 +0100620 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
621}
622
623static int
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000624at86rf230_channel(struct ieee802154_dev *dev, int page, int channel)
625{
626 struct at86rf230_local *lp = dev->priv;
627 int rc;
628
629 might_sleep();
630
Phoebe Buckheister8fad3462014-02-17 11:34:06 +0100631 if (page < 0 || page > 31 ||
632 !(lp->dev->phy->channels_supported[page] & BIT(channel))) {
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000633 WARN_ON(1);
634 return -EINVAL;
635 }
636
Phoebe Buckheister8fad3462014-02-17 11:34:06 +0100637 if (is_rf212(lp))
638 rc = at86rf212_set_channel(lp, page, channel);
639 else
640 rc = at86rf230_set_channel(lp, page, channel);
641 if (rc < 0)
642 return rc;
643
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000644 msleep(1); /* Wait for PLL */
645 dev->phy->current_channel = channel;
Phoebe Buckheister643e53c2014-02-17 11:34:09 +0100646 dev->phy->current_page = page;
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000647
648 return 0;
649}
650
651static int
652at86rf230_xmit(struct ieee802154_dev *dev, struct sk_buff *skb)
653{
654 struct at86rf230_local *lp = dev->priv;
655 int rc;
656 unsigned long flags;
657
Alexander Aring6e07a1e2014-03-12 08:21:24 +0100658 spin_lock_irqsave(&lp->lock, flags);
Sascha Herrmann057dad62013-04-14 22:33:29 +0000659 if (lp->irq_busy) {
Alexander Aring6e07a1e2014-03-12 08:21:24 +0100660 spin_unlock_irqrestore(&lp->lock, flags);
alex.bluesman.smirnov@gmail.com5b00f2e2012-07-10 21:22:43 +0000661 return -EBUSY;
662 }
Alexander Aring6e07a1e2014-03-12 08:21:24 +0100663 spin_unlock_irqrestore(&lp->lock, flags);
alex.bluesman.smirnov@gmail.com5b00f2e2012-07-10 21:22:43 +0000664
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000665 might_sleep();
666
667 rc = at86rf230_state(dev, STATE_FORCE_TX_ON);
668 if (rc)
669 goto err;
670
671 spin_lock_irqsave(&lp->lock, flags);
672 lp->is_tx = 1;
Wolfram Sang16735d02013-11-14 14:32:02 -0800673 reinit_completion(&lp->tx_complete);
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000674 spin_unlock_irqrestore(&lp->lock, flags);
675
676 rc = at86rf230_write_fbuf(lp, skb->data, skb->len);
677 if (rc)
678 goto err_rx;
679
Phoebe Buckheisterf2fdd672014-02-17 11:34:15 +0100680 if (lp->tx_aret) {
681 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_TX_ARET_ON);
682 if (rc)
683 goto err_rx;
684 }
685
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000686 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_BUSY_TX);
687 if (rc)
688 goto err_rx;
689
690 rc = wait_for_completion_interruptible(&lp->tx_complete);
691 if (rc < 0)
692 goto err_rx;
693
694 rc = at86rf230_start(dev);
695
696 return rc;
697
698err_rx:
699 at86rf230_start(dev);
700err:
701 pr_err("error: %d\n", rc);
702
703 spin_lock_irqsave(&lp->lock, flags);
704 lp->is_tx = 0;
705 spin_unlock_irqrestore(&lp->lock, flags);
706
707 return rc;
708}
709
710static int at86rf230_rx(struct at86rf230_local *lp)
711{
712 u8 len = 128, lqi = 0;
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000713 struct sk_buff *skb;
714
715 skb = alloc_skb(len, GFP_KERNEL);
716
717 if (!skb)
718 return -ENOMEM;
719
alex.bluesman.smirnov@gmail.com5b00f2e2012-07-10 21:22:43 +0000720 if (at86rf230_read_fbuf(lp, skb_put(skb, len), &len, &lqi))
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000721 goto err;
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000722
723 if (len < 2)
724 goto err;
725
726 skb_trim(skb, len - 2); /* We do not put CRC into the frame */
727
728 ieee802154_rx_irqsafe(lp->dev, skb, lqi);
729
alex.bluesman.smirnov@gmail.com23c34212012-07-01 20:18:32 +0000730 dev_dbg(&lp->spi->dev, "READ_FBUF: %d %x\n", len, lqi);
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000731
732 return 0;
733err:
734 pr_debug("received frame is too small\n");
735
736 kfree_skb(skb);
737 return -EINVAL;
738}
739
stefan@datenfreihafen.org14867742013-03-26 12:41:30 +0000740static int
741at86rf230_set_hw_addr_filt(struct ieee802154_dev *dev,
742 struct ieee802154_hw_addr_filt *filt,
743 unsigned long changed)
744{
745 struct at86rf230_local *lp = dev->priv;
746
747 if (changed & IEEE802515_AFILT_SADDR_CHANGED) {
Phoebe Buckheisterb70ab2e2014-03-14 21:23:59 +0100748 u16 addr = le16_to_cpu(filt->short_addr);
749
stefan@datenfreihafen.org14867742013-03-26 12:41:30 +0000750 dev_vdbg(&lp->spi->dev,
751 "at86rf230_set_hw_addr_filt called for saddr\n");
Phoebe Buckheisterb70ab2e2014-03-14 21:23:59 +0100752 __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
753 __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
stefan@datenfreihafen.org14867742013-03-26 12:41:30 +0000754 }
755
756 if (changed & IEEE802515_AFILT_PANID_CHANGED) {
Phoebe Buckheisterb70ab2e2014-03-14 21:23:59 +0100757 u16 pan = le16_to_cpu(filt->pan_id);
758
stefan@datenfreihafen.org14867742013-03-26 12:41:30 +0000759 dev_vdbg(&lp->spi->dev,
760 "at86rf230_set_hw_addr_filt called for pan id\n");
Phoebe Buckheisterb70ab2e2014-03-14 21:23:59 +0100761 __at86rf230_write(lp, RG_PAN_ID_0, pan);
762 __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
stefan@datenfreihafen.org14867742013-03-26 12:41:30 +0000763 }
764
765 if (changed & IEEE802515_AFILT_IEEEADDR_CHANGED) {
Phoebe Buckheisterb70ab2e2014-03-14 21:23:59 +0100766 u8 i, addr[8];
767
768 memcpy(addr, &filt->ieee_addr, 8);
stefan@datenfreihafen.org14867742013-03-26 12:41:30 +0000769 dev_vdbg(&lp->spi->dev,
770 "at86rf230_set_hw_addr_filt called for IEEE addr\n");
Phoebe Buckheisterb70ab2e2014-03-14 21:23:59 +0100771 for (i = 0; i < 8; i++)
772 __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
stefan@datenfreihafen.org14867742013-03-26 12:41:30 +0000773 }
774
775 if (changed & IEEE802515_AFILT_PANC_CHANGED) {
776 dev_vdbg(&lp->spi->dev,
777 "at86rf230_set_hw_addr_filt called for panc change\n");
778 if (filt->pan_coord)
779 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
780 else
781 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
782 }
783
784 return 0;
785}
786
Phoebe Buckheister9b2777d2014-02-17 11:34:08 +0100787static int
788at86rf212_set_txpower(struct ieee802154_dev *dev, int db)
789{
790 struct at86rf230_local *lp = dev->priv;
Phoebe Buckheister9b2777d2014-02-17 11:34:08 +0100791
792 /* typical maximum output is 5dBm with RG_PHY_TX_PWR 0x60, lower five
793 * bits decrease power in 1dB steps. 0x60 represents extra PA gain of
794 * 0dB.
795 * thus, supported values for db range from -26 to 5, for 31dB of
796 * reduction to 0dB of reduction.
797 */
798 if (db > 5 || db < -26)
799 return -EINVAL;
800
801 db = -(db - 5);
802
Jean Sacren677676c2014-03-01 15:54:36 -0700803 return __at86rf230_write(lp, RG_PHY_TX_PWR, 0x60 | db);
Phoebe Buckheister9b2777d2014-02-17 11:34:08 +0100804}
805
Phoebe Buckheister84dda3c2014-02-17 11:34:10 +0100806static int
807at86rf212_set_lbt(struct ieee802154_dev *dev, bool on)
808{
809 struct at86rf230_local *lp = dev->priv;
810
811 return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
812}
813
Phoebe Buckheisterba08fea2014-02-17 11:34:11 +0100814static int
815at86rf212_set_cca_mode(struct ieee802154_dev *dev, u8 mode)
816{
817 struct at86rf230_local *lp = dev->priv;
818
819 return at86rf230_write_subreg(lp, SR_CCA_MODE, mode);
820}
821
Phoebe Buckheister6ca00192014-02-17 11:34:12 +0100822static int
823at86rf212_set_cca_ed_level(struct ieee802154_dev *dev, s32 level)
824{
825 struct at86rf230_local *lp = dev->priv;
826 int desens_steps;
827
828 if (level < lp->rssi_base_val || level > 30)
829 return -EINVAL;
830
831 desens_steps = (level - lp->rssi_base_val) * 100 / 207;
832
833 return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, desens_steps);
834}
835
Phoebe Buckheisterf2fdd672014-02-17 11:34:15 +0100836static int
837at86rf212_set_csma_params(struct ieee802154_dev *dev, u8 min_be, u8 max_be,
838 u8 retries)
839{
840 struct at86rf230_local *lp = dev->priv;
841 int rc;
842
843 if (min_be > max_be || max_be > 8 || retries > 5)
844 return -EINVAL;
845
846 rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
847 if (rc)
848 return rc;
849
850 rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
851 if (rc)
852 return rc;
853
854 return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, max_be);
855}
856
857static int
858at86rf212_set_frame_retries(struct ieee802154_dev *dev, s8 retries)
859{
860 struct at86rf230_local *lp = dev->priv;
861 int rc = 0;
862
863 if (retries < -1 || retries > 15)
864 return -EINVAL;
865
866 lp->tx_aret = retries >= 0;
867
868 if (retries >= 0)
869 rc = at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
870
871 return rc;
872}
873
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000874static struct ieee802154_ops at86rf230_ops = {
875 .owner = THIS_MODULE,
876 .xmit = at86rf230_xmit,
877 .ed = at86rf230_ed,
878 .set_channel = at86rf230_channel,
879 .start = at86rf230_start,
880 .stop = at86rf230_stop,
stefan@datenfreihafen.org14867742013-03-26 12:41:30 +0000881 .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000882};
883
Phoebe Buckheister8fad3462014-02-17 11:34:06 +0100884static struct ieee802154_ops at86rf212_ops = {
885 .owner = THIS_MODULE,
886 .xmit = at86rf230_xmit,
887 .ed = at86rf230_ed,
888 .set_channel = at86rf230_channel,
889 .start = at86rf230_start,
890 .stop = at86rf230_stop,
891 .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
Phoebe Buckheister9b2777d2014-02-17 11:34:08 +0100892 .set_txpower = at86rf212_set_txpower,
Phoebe Buckheister84dda3c2014-02-17 11:34:10 +0100893 .set_lbt = at86rf212_set_lbt,
Phoebe Buckheisterba08fea2014-02-17 11:34:11 +0100894 .set_cca_mode = at86rf212_set_cca_mode,
Phoebe Buckheister6ca00192014-02-17 11:34:12 +0100895 .set_cca_ed_level = at86rf212_set_cca_ed_level,
Phoebe Buckheisterf2fdd672014-02-17 11:34:15 +0100896 .set_csma_params = at86rf212_set_csma_params,
897 .set_frame_retries = at86rf212_set_frame_retries,
Phoebe Buckheister8fad3462014-02-17 11:34:06 +0100898};
899
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000900static void at86rf230_irqwork(struct work_struct *work)
901{
902 struct at86rf230_local *lp =
903 container_of(work, struct at86rf230_local, irqwork);
904 u8 status = 0, val;
905 int rc;
906 unsigned long flags;
907
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000908 rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &val);
909 status |= val;
910
911 status &= ~IRQ_PLL_LOCK; /* ignore */
912 status &= ~IRQ_RX_START; /* ignore */
913 status &= ~IRQ_AMI; /* ignore */
914 status &= ~IRQ_TRX_UR; /* FIXME: possibly handle ???*/
915
916 if (status & IRQ_TRX_END) {
917 status &= ~IRQ_TRX_END;
Alexander Aring7e814612014-03-15 09:29:04 +0100918 spin_lock_irqsave(&lp->lock, flags);
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000919 if (lp->is_tx) {
920 lp->is_tx = 0;
alex.bluesman.smirnov@gmail.com5b00f2e2012-07-10 21:22:43 +0000921 spin_unlock_irqrestore(&lp->lock, flags);
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000922 complete(&lp->tx_complete);
923 } else {
alex.bluesman.smirnov@gmail.com5b00f2e2012-07-10 21:22:43 +0000924 spin_unlock_irqrestore(&lp->lock, flags);
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000925 at86rf230_rx(lp);
926 }
927 }
928
alex.bluesman.smirnov@gmail.com5b00f2e2012-07-10 21:22:43 +0000929 spin_lock_irqsave(&lp->lock, flags);
Sascha Herrmann057dad62013-04-14 22:33:29 +0000930 lp->irq_busy = 0;
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000931 spin_unlock_irqrestore(&lp->lock, flags);
Sascha Herrmann057dad62013-04-14 22:33:29 +0000932}
933
934static void at86rf230_irqwork_level(struct work_struct *work)
935{
936 struct at86rf230_local *lp =
937 container_of(work, struct at86rf230_local, irqwork);
938
939 at86rf230_irqwork(work);
alex.bluesman.smirnov@gmail.com5b00f2e2012-07-10 21:22:43 +0000940
941 enable_irq(lp->spi->irq);
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000942}
943
944static irqreturn_t at86rf230_isr(int irq, void *data)
945{
946 struct at86rf230_local *lp = data;
Alexander Aring6e07a1e2014-03-12 08:21:24 +0100947 unsigned long flags;
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000948
Alexander Aring6e07a1e2014-03-12 08:21:24 +0100949 spin_lock_irqsave(&lp->lock, flags);
Sascha Herrmann057dad62013-04-14 22:33:29 +0000950 lp->irq_busy = 1;
Alexander Aring6e07a1e2014-03-12 08:21:24 +0100951 spin_unlock_irqrestore(&lp->lock, flags);
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000952
953 schedule_work(&lp->irqwork);
954
955 return IRQ_HANDLED;
956}
957
Sascha Herrmann057dad62013-04-14 22:33:29 +0000958static irqreturn_t at86rf230_isr_level(int irq, void *data)
959{
960 disable_irq_nosync(irq);
961
962 return at86rf230_isr(irq, data);
963}
964
Sascha Herrmann43b5abe2013-04-14 22:33:28 +0000965static int at86rf230_irq_polarity(struct at86rf230_local *lp, int pol)
966{
967 return at86rf230_write_subreg(lp, SR_IRQ_POLARITY, pol);
968}
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000969
970static int at86rf230_hw_init(struct at86rf230_local *lp)
971{
Sascha Herrmann43b5abe2013-04-14 22:33:28 +0000972 struct at86rf230_platform_data *pdata = lp->spi->dev.platform_data;
973 int rc, irq_pol;
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000974 u8 status;
Phoebe Buckheisterf2fdd672014-02-17 11:34:15 +0100975 u8 csma_seed[2];
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000976
977 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &status);
978 if (rc)
979 return rc;
980
Phoebe Buckheister7dcbd222014-02-17 11:34:13 +0100981 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_FORCE_TRX_OFF);
982 if (rc)
983 return rc;
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000984
Sascha Herrmann43b5abe2013-04-14 22:33:28 +0000985 /* configure irq polarity, defaults to high active */
986 if (pdata->irq_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW))
987 irq_pol = IRQ_ACTIVE_LOW;
988 else
989 irq_pol = IRQ_ACTIVE_HIGH;
990
991 rc = at86rf230_irq_polarity(lp, irq_pol);
992 if (rc)
993 return rc;
994
Sascha Herrmann057dad62013-04-14 22:33:29 +0000995 rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +0000996 if (rc)
997 return rc;
998
Phoebe Buckheisterf2fdd672014-02-17 11:34:15 +0100999 get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
1000 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
1001 if (rc)
1002 return rc;
1003 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
1004 if (rc)
1005 return rc;
1006
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001007 /* CLKM changes are applied immediately */
1008 rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
1009 if (rc)
1010 return rc;
1011
1012 /* Turn CLKM Off */
1013 rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
1014 if (rc)
1015 return rc;
1016 /* Wait the next SLEEP cycle */
1017 msleep(100);
1018
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001019 rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &status);
1020 if (rc)
1021 return rc;
1022 if (!status) {
1023 dev_err(&lp->spi->dev, "DVDD error\n");
1024 return -EINVAL;
1025 }
1026
1027 rc = at86rf230_read_subreg(lp, SR_AVDD_OK, &status);
1028 if (rc)
1029 return rc;
1030 if (!status) {
1031 dev_err(&lp->spi->dev, "AVDD error\n");
1032 return -EINVAL;
1033 }
1034
1035 return 0;
1036}
1037
Bill Pembertonbb1f4602012-12-03 09:24:12 -05001038static int at86rf230_probe(struct spi_device *spi)
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001039{
Sascha Herrmann43b5abe2013-04-14 22:33:28 +00001040 struct at86rf230_platform_data *pdata;
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001041 struct ieee802154_dev *dev;
1042 struct at86rf230_local *lp;
Phoebe Buckheister8fad3462014-02-17 11:34:06 +01001043 u16 man_id = 0;
1044 u8 part = 0, version = 0, status;
Sascha Herrmann057dad62013-04-14 22:33:29 +00001045 irq_handler_t irq_handler;
1046 work_func_t irq_worker;
Phoebe Buckheister8fad3462014-02-17 11:34:06 +01001047 int rc;
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001048 const char *chip;
Phoebe Buckheister8fad3462014-02-17 11:34:06 +01001049 struct ieee802154_ops *ops = NULL;
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001050
1051 if (!spi->irq) {
1052 dev_err(&spi->dev, "no IRQ specified\n");
1053 return -EINVAL;
1054 }
1055
Sascha Herrmann43b5abe2013-04-14 22:33:28 +00001056 pdata = spi->dev.platform_data;
1057 if (!pdata) {
1058 dev_err(&spi->dev, "no platform_data\n");
1059 return -EINVAL;
1060 }
1061
Phoebe Buckheister8fad3462014-02-17 11:34:06 +01001062 rc = gpio_request(pdata->rstn, "rstn");
1063 if (rc)
1064 return rc;
1065
1066 if (gpio_is_valid(pdata->slp_tr)) {
1067 rc = gpio_request(pdata->slp_tr, "slp_tr");
1068 if (rc)
1069 goto err_slp_tr;
1070 }
1071
1072 rc = gpio_direction_output(pdata->rstn, 1);
1073 if (rc)
1074 goto err_gpio_dir;
1075
1076 if (gpio_is_valid(pdata->slp_tr)) {
1077 rc = gpio_direction_output(pdata->slp_tr, 0);
1078 if (rc)
1079 goto err_gpio_dir;
1080 }
1081
1082 /* Reset */
Alexander Aring56f023f2014-03-15 09:29:05 +01001083 udelay(1);
Phoebe Buckheister8fad3462014-02-17 11:34:06 +01001084 gpio_set_value(pdata->rstn, 0);
Alexander Aring56f023f2014-03-15 09:29:05 +01001085 udelay(1);
Phoebe Buckheister8fad3462014-02-17 11:34:06 +01001086 gpio_set_value(pdata->rstn, 1);
Alexander Aring56f023f2014-03-15 09:29:05 +01001087 usleep_range(120, 240);
Phoebe Buckheister8fad3462014-02-17 11:34:06 +01001088
1089 rc = __at86rf230_detect_device(spi, &man_id, &part, &version);
1090 if (rc < 0)
1091 goto err_gpio_dir;
1092
1093 if (man_id != 0x001f) {
1094 dev_err(&spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1095 man_id >> 8, man_id & 0xFF);
1096 rc = -EINVAL;
1097 goto err_gpio_dir;
1098 }
1099
1100 switch (part) {
1101 case 2:
1102 chip = "at86rf230";
1103 /* FIXME: should be easy to support; */
1104 break;
1105 case 3:
1106 chip = "at86rf231";
1107 ops = &at86rf230_ops;
1108 break;
1109 case 7:
1110 chip = "at86rf212";
1111 if (version == 1)
1112 ops = &at86rf212_ops;
1113 break;
Thomas Stilwell48d5dba2014-03-10 19:29:25 -05001114 case 11:
1115 chip = "at86rf233";
1116 ops = &at86rf230_ops;
1117 break;
Phoebe Buckheister8fad3462014-02-17 11:34:06 +01001118 default:
1119 chip = "UNKNOWN";
1120 break;
1121 }
1122
1123 dev_info(&spi->dev, "Detected %s chip version %d\n", chip, version);
1124 if (!ops) {
1125 rc = -ENOTSUPP;
1126 goto err_gpio_dir;
1127 }
1128
1129 dev = ieee802154_alloc_device(sizeof(*lp), ops);
1130 if (!dev) {
1131 rc = -ENOMEM;
1132 goto err_gpio_dir;
1133 }
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001134
1135 lp = dev->priv;
1136 lp->dev = dev;
Phoebe Buckheister8fad3462014-02-17 11:34:06 +01001137 lp->part = part;
1138 lp->vers = version;
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001139
1140 lp->spi = spi;
1141
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001142 dev->parent = &spi->dev;
1143 dev->extra_tx_headroom = 0;
Phoebe Buckheister8fad3462014-02-17 11:34:06 +01001144 dev->flags = IEEE802154_HW_OMIT_CKSUM | IEEE802154_HW_AACK;
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001145
Sascha Herrmann057dad62013-04-14 22:33:29 +00001146 if (pdata->irq_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
1147 irq_worker = at86rf230_irqwork;
1148 irq_handler = at86rf230_isr;
1149 } else {
1150 irq_worker = at86rf230_irqwork_level;
1151 irq_handler = at86rf230_isr_level;
1152 }
1153
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001154 mutex_init(&lp->bmux);
Sascha Herrmann057dad62013-04-14 22:33:29 +00001155 INIT_WORK(&lp->irqwork, irq_worker);
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001156 spin_lock_init(&lp->lock);
1157 init_completion(&lp->tx_complete);
1158
1159 spi_set_drvdata(spi, lp);
1160
Phoebe Buckheister643e53c2014-02-17 11:34:09 +01001161 if (is_rf212(lp)) {
Phoebe Buckheister8fad3462014-02-17 11:34:06 +01001162 dev->phy->channels_supported[0] = 0x00007FF;
Phoebe Buckheister643e53c2014-02-17 11:34:09 +01001163 dev->phy->channels_supported[2] = 0x00007FF;
1164 } else {
Phoebe Buckheister8fad3462014-02-17 11:34:06 +01001165 dev->phy->channels_supported[0] = 0x7FFF800;
Phoebe Buckheister643e53c2014-02-17 11:34:09 +01001166 }
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001167
1168 rc = at86rf230_hw_init(lp);
1169 if (rc)
Phoebe Buckheister8fad3462014-02-17 11:34:06 +01001170 goto err_hw_init;
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001171
Sascha Herrmann057dad62013-04-14 22:33:29 +00001172 rc = request_irq(spi->irq, irq_handler,
Sascha Herrmann43b5abe2013-04-14 22:33:28 +00001173 IRQF_SHARED | pdata->irq_type,
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001174 dev_name(&spi->dev), lp);
1175 if (rc)
Phoebe Buckheister8fad3462014-02-17 11:34:06 +01001176 goto err_hw_init;
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001177
Sascha Herrmann057dad62013-04-14 22:33:29 +00001178 /* Read irq status register to reset irq line */
1179 rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
1180 if (rc)
1181 goto err_irq;
1182
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001183 rc = ieee802154_register_device(lp->dev);
1184 if (rc)
1185 goto err_irq;
1186
1187 return rc;
1188
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001189err_irq:
1190 free_irq(spi->irq, lp);
Phoebe Buckheister8fad3462014-02-17 11:34:06 +01001191err_hw_init:
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001192 flush_work(&lp->irqwork);
Phoebe Buckheister8fad3462014-02-17 11:34:06 +01001193 spi_set_drvdata(spi, NULL);
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001194 mutex_destroy(&lp->bmux);
1195 ieee802154_free_device(lp->dev);
Phoebe Buckheister8fad3462014-02-17 11:34:06 +01001196
1197err_gpio_dir:
1198 if (gpio_is_valid(pdata->slp_tr))
1199 gpio_free(pdata->slp_tr);
1200err_slp_tr:
1201 gpio_free(pdata->rstn);
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001202 return rc;
1203}
1204
Bill Pembertonbb1f4602012-12-03 09:24:12 -05001205static int at86rf230_remove(struct spi_device *spi)
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001206{
1207 struct at86rf230_local *lp = spi_get_drvdata(spi);
Phoebe Buckheister8fad3462014-02-17 11:34:06 +01001208 struct at86rf230_platform_data *pdata = spi->dev.platform_data;
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001209
1210 ieee802154_unregister_device(lp->dev);
1211
1212 free_irq(spi->irq, lp);
1213 flush_work(&lp->irqwork);
1214
Phoebe Buckheister8fad3462014-02-17 11:34:06 +01001215 if (gpio_is_valid(pdata->slp_tr))
1216 gpio_free(pdata->slp_tr);
1217 gpio_free(pdata->rstn);
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001218
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001219 mutex_destroy(&lp->bmux);
1220 ieee802154_free_device(lp->dev);
1221
1222 dev_dbg(&spi->dev, "unregistered at86rf230\n");
1223 return 0;
1224}
1225
1226static struct spi_driver at86rf230_driver = {
1227 .driver = {
1228 .name = "at86rf230",
1229 .owner = THIS_MODULE,
1230 },
1231 .probe = at86rf230_probe,
Bill Pembertonbb1f4602012-12-03 09:24:12 -05001232 .remove = at86rf230_remove,
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001233};
1234
alex.bluesman.smirnov@gmail.com395a5732012-08-26 05:10:10 +00001235module_spi_driver(at86rf230_driver);
alex.bluesman.smirnov@gmail.com7b8e19b2012-06-25 23:24:53 +00001236
1237MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1238MODULE_LICENSE("GPL v2");