blob: 395d658a94fcab1e7e54131e96485b379fee07a7 [file] [log] [blame]
Tomi Valkeinen553c48c2009-08-07 13:15:50 +03001/*
2 * linux/drivers/video/omap2/dss/dpi.c
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
6 *
7 * Some code and ideas taken from drivers/video/omap/ driver
8 * by Imre Deak.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * more details.
18 *
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
21 */
22
23#define DSS_SUBSYS_NAME "DPI"
24
25#include <linux/kernel.h>
Tomi Valkeinen553c48c2009-08-07 13:15:50 +030026#include <linux/delay.h>
Paul Gortmakera8a35932011-07-10 13:20:26 -040027#include <linux/export.h>
Tomi Valkeinen8a2cfea2010-02-04 17:03:41 +020028#include <linux/err.h>
Tomi Valkeinen553c48c2009-08-07 13:15:50 +030029#include <linux/errno.h>
Tomi Valkeinen8a2cfea2010-02-04 17:03:41 +020030#include <linux/platform_device.h>
31#include <linux/regulator/consumer.h>
Tomi Valkeinen553c48c2009-08-07 13:15:50 +030032
Tomi Valkeinena0b38cc2011-05-11 14:05:07 +030033#include <video/omapdss.h>
Tomi Valkeinen553c48c2009-08-07 13:15:50 +030034#include <plat/cpu.h>
35
36#include "dss.h"
37
38static struct {
Tomi Valkeinen8a2cfea2010-02-04 17:03:41 +020039 struct regulator *vdds_dsi_reg;
Archit Tanejaa72b64b2011-05-12 17:26:26 +053040 struct platform_device *dsidev;
Tomi Valkeinen553c48c2009-08-07 13:15:50 +030041} dpi;
42
Archit Tanejaa72b64b2011-05-12 17:26:26 +053043static struct platform_device *dpi_get_dsidev(enum omap_dss_clk_source clk)
44{
45 int dsi_module;
46
47 dsi_module = clk == OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ? 0 : 1;
48
49 return dsi_get_dsidev_from_id(dsi_module);
50}
51
Archit Taneja7636b3b2011-04-12 13:52:26 +053052static bool dpi_use_dsi_pll(struct omap_dss_device *dssdev)
53{
54 if (dssdev->clocks.dispc.dispc_fclk_src ==
55 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ||
Archit Taneja5a8b5722011-05-12 17:26:29 +053056 dssdev->clocks.dispc.dispc_fclk_src ==
57 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC ||
Archit Taneja7636b3b2011-04-12 13:52:26 +053058 dssdev->clocks.dispc.channel.lcd_clk_src ==
Archit Taneja5a8b5722011-05-12 17:26:29 +053059 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ||
60 dssdev->clocks.dispc.channel.lcd_clk_src ==
61 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC)
Archit Taneja7636b3b2011-04-12 13:52:26 +053062 return true;
63 else
64 return false;
65}
66
Sumit Semwalff1b2cd2010-12-02 11:27:11 +000067static int dpi_set_dsi_clk(struct omap_dss_device *dssdev, bool is_tft,
68 unsigned long pck_req, unsigned long *fck, int *lck_div,
69 int *pck_div)
Tomi Valkeinen553c48c2009-08-07 13:15:50 +030070{
71 struct dsi_clock_info dsi_cinfo;
72 struct dispc_clock_info dispc_cinfo;
73 int r;
74
Archit Tanejaa72b64b2011-05-12 17:26:26 +053075 r = dsi_pll_calc_clock_div_pck(dpi.dsidev, is_tft, pck_req,
76 &dsi_cinfo, &dispc_cinfo);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +030077 if (r)
78 return r;
79
Archit Tanejaa72b64b2011-05-12 17:26:26 +053080 r = dsi_pll_set_clock_div(dpi.dsidev, &dsi_cinfo);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +030081 if (r)
82 return r;
83
Archit Tanejae8881662011-04-12 13:52:24 +053084 dss_select_dispc_clk_source(dssdev->clocks.dispc.dispc_fclk_src);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +030085
Tomi Valkeinen26d9dd02011-08-16 13:45:15 +030086 r = dispc_mgr_set_clock_div(dssdev->manager->id, &dispc_cinfo);
Tomi Valkeinen5e785092011-08-10 11:25:36 +030087 if (r) {
88 dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +030089 return r;
Tomi Valkeinen5e785092011-08-10 11:25:36 +030090 }
Tomi Valkeinen553c48c2009-08-07 13:15:50 +030091
Archit Taneja1bb47832011-02-24 14:17:30 +053092 *fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
Tomi Valkeinen553c48c2009-08-07 13:15:50 +030093 *lck_div = dispc_cinfo.lck_div;
94 *pck_div = dispc_cinfo.pck_div;
95
96 return 0;
97}
Archit Taneja7636b3b2011-04-12 13:52:26 +053098
Sumit Semwalff1b2cd2010-12-02 11:27:11 +000099static int dpi_set_dispc_clk(struct omap_dss_device *dssdev, bool is_tft,
100 unsigned long pck_req, unsigned long *fck, int *lck_div,
101 int *pck_div)
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300102{
103 struct dss_clock_info dss_cinfo;
104 struct dispc_clock_info dispc_cinfo;
105 int r;
106
107 r = dss_calc_clock_div(is_tft, pck_req, &dss_cinfo, &dispc_cinfo);
108 if (r)
109 return r;
110
111 r = dss_set_clock_div(&dss_cinfo);
112 if (r)
113 return r;
114
Tomi Valkeinen26d9dd02011-08-16 13:45:15 +0300115 r = dispc_mgr_set_clock_div(dssdev->manager->id, &dispc_cinfo);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300116 if (r)
117 return r;
118
119 *fck = dss_cinfo.fck;
120 *lck_div = dispc_cinfo.lck_div;
121 *pck_div = dispc_cinfo.pck_div;
122
123 return 0;
124}
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300125
126static int dpi_set_mode(struct omap_dss_device *dssdev)
127{
128 struct omap_video_timings *t = &dssdev->panel.timings;
Archit Taneja7636b3b2011-04-12 13:52:26 +0530129 int lck_div = 0, pck_div = 0;
130 unsigned long fck = 0;
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300131 unsigned long pck;
132 bool is_tft;
133 int r = 0;
134
Tomi Valkeinen26d9dd02011-08-16 13:45:15 +0300135 dispc_mgr_set_pol_freq(dssdev->manager->id, dssdev->panel.config,
Sumit Semwalff1b2cd2010-12-02 11:27:11 +0000136 dssdev->panel.acbi, dssdev->panel.acb);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300137
138 is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
139
Archit Taneja7636b3b2011-04-12 13:52:26 +0530140 if (dpi_use_dsi_pll(dssdev))
141 r = dpi_set_dsi_clk(dssdev, is_tft, t->pixel_clock * 1000,
142 &fck, &lck_div, &pck_div);
143 else
144 r = dpi_set_dispc_clk(dssdev, is_tft, t->pixel_clock * 1000,
145 &fck, &lck_div, &pck_div);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300146 if (r)
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300147 return r;
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300148
149 pck = fck / lck_div / pck_div / 1000;
150
151 if (pck != t->pixel_clock) {
152 DSSWARN("Could not find exact pixel clock. "
153 "Requested %d kHz, got %lu kHz\n",
154 t->pixel_clock, pck);
155
156 t->pixel_clock = pck;
157 }
158
Tomi Valkeinen26d9dd02011-08-16 13:45:15 +0300159 dispc_mgr_set_lcd_timings(dssdev->manager->id, t);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300160
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300161 return 0;
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300162}
163
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300164static void dpi_basic_init(struct omap_dss_device *dssdev)
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300165{
166 bool is_tft;
167
168 is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
169
Archit Taneja569969d2011-08-22 17:41:57 +0530170 dispc_mgr_set_io_pad_mode(DSS_IO_PAD_MODE_BYPASS);
171 dispc_mgr_enable_stallmode(dssdev->manager->id, false);
172
Tomi Valkeinen26d9dd02011-08-16 13:45:15 +0300173 dispc_mgr_set_lcd_display_type(dssdev->manager->id, is_tft ?
Sumit Semwal64ba4f72010-12-02 11:27:10 +0000174 OMAP_DSS_LCD_DISPLAY_TFT : OMAP_DSS_LCD_DISPLAY_STN);
Tomi Valkeinen26d9dd02011-08-16 13:45:15 +0300175 dispc_mgr_set_tft_data_lines(dssdev->manager->id,
Sumit Semwal64ba4f72010-12-02 11:27:10 +0000176 dssdev->phy.dpi.data_lines);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300177}
178
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +0200179int omapdss_dpi_display_enable(struct omap_dss_device *dssdev)
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300180{
181 int r;
182
Tomi Valkeinen05e1d602011-06-23 16:38:21 +0300183 if (dssdev->manager == NULL) {
184 DSSERR("failed to enable display: no manager\n");
185 return -ENODEV;
186 }
187
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300188 r = omap_dss_start_device(dssdev);
189 if (r) {
190 DSSERR("failed to start device\n");
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300191 goto err_start_dev;
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300192 }
193
Tomi Valkeinen8a2cfea2010-02-04 17:03:41 +0200194 if (cpu_is_omap34xx()) {
195 r = regulator_enable(dpi.vdds_dsi_reg);
196 if (r)
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300197 goto err_reg_enable;
Tomi Valkeinen8a2cfea2010-02-04 17:03:41 +0200198 }
199
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300200 r = dss_runtime_get();
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300201 if (r)
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300202 goto err_get_dss;
203
204 r = dispc_runtime_get();
205 if (r)
206 goto err_get_dispc;
207
208 dpi_basic_init(dssdev);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300209
Archit Taneja7636b3b2011-04-12 13:52:26 +0530210 if (dpi_use_dsi_pll(dssdev)) {
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300211 r = dsi_runtime_get(dpi.dsidev);
212 if (r)
213 goto err_get_dsi;
214
Archit Tanejaa72b64b2011-05-12 17:26:26 +0530215 r = dsi_pll_init(dpi.dsidev, 0, 1);
Archit Taneja7636b3b2011-04-12 13:52:26 +0530216 if (r)
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300217 goto err_dsi_pll_init;
Archit Taneja7636b3b2011-04-12 13:52:26 +0530218 }
219
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300220 r = dpi_set_mode(dssdev);
221 if (r)
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300222 goto err_set_mode;
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300223
224 mdelay(2);
225
Tomi Valkeinen33ca2372011-11-21 13:42:58 +0200226 r = dss_mgr_enable(dssdev->manager);
227 if (r)
228 goto err_mgr_enable;
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300229
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300230 return 0;
231
Tomi Valkeinen33ca2372011-11-21 13:42:58 +0200232err_mgr_enable:
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300233err_set_mode:
Archit Taneja7636b3b2011-04-12 13:52:26 +0530234 if (dpi_use_dsi_pll(dssdev))
Tomi Valkeinen19077a72011-05-18 11:33:44 +0300235 dsi_pll_uninit(dpi.dsidev, true);
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300236err_dsi_pll_init:
237 if (dpi_use_dsi_pll(dssdev))
238 dsi_runtime_put(dpi.dsidev);
239err_get_dsi:
240 dispc_runtime_put();
241err_get_dispc:
242 dss_runtime_put();
243err_get_dss:
Tomi Valkeinen8a2cfea2010-02-04 17:03:41 +0200244 if (cpu_is_omap34xx())
245 regulator_disable(dpi.vdds_dsi_reg);
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300246err_reg_enable:
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300247 omap_dss_stop_device(dssdev);
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300248err_start_dev:
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300249 return r;
250}
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +0200251EXPORT_SYMBOL(omapdss_dpi_display_enable);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300252
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +0200253void omapdss_dpi_display_disable(struct omap_dss_device *dssdev)
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300254{
Tomi Valkeinen7797c6d2011-11-04 10:22:46 +0200255 dss_mgr_disable(dssdev->manager);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300256
Archit Taneja7636b3b2011-04-12 13:52:26 +0530257 if (dpi_use_dsi_pll(dssdev)) {
258 dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
Archit Tanejaa72b64b2011-05-12 17:26:26 +0530259 dsi_pll_uninit(dpi.dsidev, true);
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300260 dsi_runtime_put(dpi.dsidev);
Archit Taneja7636b3b2011-04-12 13:52:26 +0530261 }
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300262
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300263 dispc_runtime_put();
264 dss_runtime_put();
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300265
Tomi Valkeinen8a2cfea2010-02-04 17:03:41 +0200266 if (cpu_is_omap34xx())
267 regulator_disable(dpi.vdds_dsi_reg);
268
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300269 omap_dss_stop_device(dssdev);
270}
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +0200271EXPORT_SYMBOL(omapdss_dpi_display_disable);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300272
Tomi Valkeinen69b20482010-01-20 12:11:25 +0200273void dpi_set_timings(struct omap_dss_device *dssdev,
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300274 struct omap_video_timings *timings)
275{
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300276 int r;
277
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300278 DSSDBG("dpi_set_timings\n");
279 dssdev->panel.timings = *timings;
280 if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300281 r = dss_runtime_get();
282 if (r)
283 return;
284
285 r = dispc_runtime_get();
286 if (r) {
287 dss_runtime_put();
288 return;
289 }
290
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300291 dpi_set_mode(dssdev);
Tomi Valkeinen26d9dd02011-08-16 13:45:15 +0300292 dispc_mgr_go(dssdev->manager->id);
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300293
294 dispc_runtime_put();
295 dss_runtime_put();
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300296 }
297}
Tomi Valkeinen69b20482010-01-20 12:11:25 +0200298EXPORT_SYMBOL(dpi_set_timings);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300299
Tomi Valkeinen69b20482010-01-20 12:11:25 +0200300int dpi_check_timings(struct omap_dss_device *dssdev,
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300301 struct omap_video_timings *timings)
302{
303 bool is_tft;
304 int r;
305 int lck_div, pck_div;
306 unsigned long fck;
307 unsigned long pck;
Archit Taneja7636b3b2011-04-12 13:52:26 +0530308 struct dispc_clock_info dispc_cinfo;
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300309
310 if (!dispc_lcd_timings_ok(timings))
311 return -EINVAL;
312
313 if (timings->pixel_clock == 0)
314 return -EINVAL;
315
316 is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
317
Archit Taneja7636b3b2011-04-12 13:52:26 +0530318 if (dpi_use_dsi_pll(dssdev)) {
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300319 struct dsi_clock_info dsi_cinfo;
Archit Tanejaa72b64b2011-05-12 17:26:26 +0530320 r = dsi_pll_calc_clock_div_pck(dpi.dsidev, is_tft,
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300321 timings->pixel_clock * 1000,
322 &dsi_cinfo, &dispc_cinfo);
323
324 if (r)
325 return r;
326
Archit Taneja1bb47832011-02-24 14:17:30 +0530327 fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
Archit Taneja7636b3b2011-04-12 13:52:26 +0530328 } else {
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300329 struct dss_clock_info dss_cinfo;
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300330 r = dss_calc_clock_div(is_tft, timings->pixel_clock * 1000,
331 &dss_cinfo, &dispc_cinfo);
332
333 if (r)
334 return r;
335
336 fck = dss_cinfo.fck;
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300337 }
Archit Taneja7636b3b2011-04-12 13:52:26 +0530338
339 lck_div = dispc_cinfo.lck_div;
340 pck_div = dispc_cinfo.pck_div;
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300341
342 pck = fck / lck_div / pck_div / 1000;
343
344 timings->pixel_clock = pck;
345
346 return 0;
347}
Tomi Valkeinen69b20482010-01-20 12:11:25 +0200348EXPORT_SYMBOL(dpi_check_timings);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300349
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300350int dpi_init_display(struct omap_dss_device *dssdev)
351{
352 DSSDBG("init_display\n");
353
Tomi Valkeinen5f42f2c2011-02-22 15:53:46 +0200354 if (cpu_is_omap34xx() && dpi.vdds_dsi_reg == NULL) {
355 struct regulator *vdds_dsi;
356
357 vdds_dsi = dss_get_vdds_dsi();
358
359 if (IS_ERR(vdds_dsi)) {
360 DSSERR("can't get VDDS_DSI regulator\n");
361 return PTR_ERR(vdds_dsi);
362 }
363
364 dpi.vdds_dsi_reg = vdds_dsi;
365 }
366
Archit Tanejaa72b64b2011-05-12 17:26:26 +0530367 if (dpi_use_dsi_pll(dssdev)) {
368 enum omap_dss_clk_source dispc_fclk_src =
369 dssdev->clocks.dispc.dispc_fclk_src;
370 dpi.dsidev = dpi_get_dsidev(dispc_fclk_src);
371 }
372
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300373 return 0;
374}
375
Tomi Valkeinen277b2882011-03-02 12:32:48 +0200376int dpi_init(void)
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300377{
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300378 return 0;
379}
380
381void dpi_exit(void)
382{
383}
384