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gerrit-public.fairphone.software / kernel / msm-5.4 / 0b2bb6925eb602eae993a4b5c282a8c18ad1c949 / . / tools / power / x86 / turbostat / turbostat.c
blob: ad568891444651b5c420363feddb825e6a4111a6 [file] [log] [blame]
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1/*
2 * turbostat -- show CPU frequency and C-state residency
3 * on modern Intel turbo-capable processors.
4 *
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]5 * Copyright (c) 2013 Intel Corporation.
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]6 * Len Brown <len.brown@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]22#define _GNU_SOURCE
Josh Triplettb731f312013-08-20 17:20:12 -0700[diff] [blame]23#include MSRHEADER
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]24#include <stdarg.h>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]25#include <stdio.h>
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]26#include <err.h>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]27#include <unistd.h>
28#include <sys/types.h>
29#include <sys/wait.h>
30#include <sys/stat.h>
31#include <sys/resource.h>
32#include <fcntl.h>
33#include <signal.h>
34#include <sys/time.h>
35#include <stdlib.h>
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]36#include <getopt.h>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]37#include <dirent.h>
38#include <string.h>
39#include <ctype.h>
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]40#include <sched.h>
Josh Triplett2b928652013-08-20 17:20:14 -0700[diff] [blame]41#include <cpuid.h>
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]42#include <linux/capability.h>
43#include <errno.h>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]44
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]45char *proc_stat = "/proc/stat";
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]46unsigned int interval_sec = 5;
47unsigned int debug;
48unsigned int rapl_joules;
49unsigned int summary_only;
50unsigned int dump_only;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]51unsigned int skip_c0;
52unsigned int skip_c1;
53unsigned int do_nhm_cstates;
54unsigned int do_snb_cstates;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]55unsigned int do_pc2;
56unsigned int do_pc3;
57unsigned int do_pc6;
58unsigned int do_pc7;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]59unsigned int do_c8_c9_c10;
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]60unsigned int do_skl_residency;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]61unsigned int do_slm_cstates;
62unsigned int use_c1_residency_msr;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]63unsigned int has_aperf;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]64unsigned int has_epb;
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]65unsigned int units = 1000000; /* MHz etc */
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]66unsigned int genuine_intel;
67unsigned int has_invariant_tsc;
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]68unsigned int do_nhm_platform_info;
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]69unsigned int extra_msr_offset32;
70unsigned int extra_msr_offset64;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]71unsigned int extra_delta_offset32;
72unsigned int extra_delta_offset64;
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]73int do_smi;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]74double bclk;
75unsigned int show_pkg;
76unsigned int show_core;
77unsigned int show_cpu;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]78unsigned int show_pkg_only;
79unsigned int show_core_only;
80char *output_buffer, *outp;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]81unsigned int do_rapl;
82unsigned int do_dts;
83unsigned int do_ptm;
84unsigned int tcc_activation_temp;
85unsigned int tcc_activation_temp_override;
86double rapl_power_units, rapl_energy_units, rapl_time_units;
87double rapl_joule_counter_range;
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]88unsigned int do_core_perf_limit_reasons;
89unsigned int do_gfx_perf_limit_reasons;
90unsigned int do_ring_perf_limit_reasons;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]91
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]92#define RAPL_PKG (1 << 0)
93 /* 0x610 MSR_PKG_POWER_LIMIT */
94 /* 0x611 MSR_PKG_ENERGY_STATUS */
95#define RAPL_PKG_PERF_STATUS (1 << 1)
96 /* 0x613 MSR_PKG_PERF_STATUS */
97#define RAPL_PKG_POWER_INFO (1 << 2)
98 /* 0x614 MSR_PKG_POWER_INFO */
99
100#define RAPL_DRAM (1 << 3)
101 /* 0x618 MSR_DRAM_POWER_LIMIT */
102 /* 0x619 MSR_DRAM_ENERGY_STATUS */
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]103#define RAPL_DRAM_PERF_STATUS (1 << 4)
104 /* 0x61b MSR_DRAM_PERF_STATUS */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]105#define RAPL_DRAM_POWER_INFO (1 << 5)
106 /* 0x61c MSR_DRAM_POWER_INFO */
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]107
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]108#define RAPL_CORES (1 << 6)
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]109 /* 0x638 MSR_PP0_POWER_LIMIT */
110 /* 0x639 MSR_PP0_ENERGY_STATUS */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]111#define RAPL_CORE_POLICY (1 << 7)
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]112 /* 0x63a MSR_PP0_POLICY */
113
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]114#define RAPL_GFX (1 << 8)
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]115 /* 0x640 MSR_PP1_POWER_LIMIT */
116 /* 0x641 MSR_PP1_ENERGY_STATUS */
117 /* 0x642 MSR_PP1_POLICY */
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]118#define TJMAX_DEFAULT 100
119
120#define MAX(a, b) ((a) > (b) ? (a) : (b))
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]121
122int aperf_mperf_unstable;
123int backwards_count;
124char *progname;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]125
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]126cpu_set_t *cpu_present_set, *cpu_affinity_set;
127size_t cpu_present_setsize, cpu_affinity_setsize;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]128
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]129struct thread_data {
130 unsigned long long tsc;
131 unsigned long long aperf;
132 unsigned long long mperf;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]133 unsigned long long c1;
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]134 unsigned long long extra_msr64;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]135 unsigned long long extra_delta64;
136 unsigned long long extra_msr32;
137 unsigned long long extra_delta32;
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]138 unsigned int smi_count;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]139 unsigned int cpu_id;
140 unsigned int flags;
141#define CPU_IS_FIRST_THREAD_IN_CORE 0x2
142#define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4
143} *thread_even, *thread_odd;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]144
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]145struct core_data {
146 unsigned long long c3;
147 unsigned long long c6;
148 unsigned long long c7;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]149 unsigned int core_temp_c;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]150 unsigned int core_id;
151} *core_even, *core_odd;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]152
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]153struct pkg_data {
154 unsigned long long pc2;
155 unsigned long long pc3;
156 unsigned long long pc6;
157 unsigned long long pc7;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]158 unsigned long long pc8;
159 unsigned long long pc9;
160 unsigned long long pc10;
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]161 unsigned long long pkg_wtd_core_c0;
162 unsigned long long pkg_any_core_c0;
163 unsigned long long pkg_any_gfxe_c0;
164 unsigned long long pkg_both_core_gfxe_c0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]165 unsigned int package_id;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]166 unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
167 unsigned int energy_dram; /* MSR_DRAM_ENERGY_STATUS */
168 unsigned int energy_cores; /* MSR_PP0_ENERGY_STATUS */
169 unsigned int energy_gfx; /* MSR_PP1_ENERGY_STATUS */
170 unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */
171 unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */
172 unsigned int pkg_temp_c;
173
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]174} *package_even, *package_odd;
175
176#define ODD_COUNTERS thread_odd, core_odd, package_odd
177#define EVEN_COUNTERS thread_even, core_even, package_even
178
179#define GET_THREAD(thread_base, thread_no, core_no, pkg_no) \
180 (thread_base + (pkg_no) * topo.num_cores_per_pkg * \
181 topo.num_threads_per_core + \
182 (core_no) * topo.num_threads_per_core + (thread_no))
183#define GET_CORE(core_base, core_no, pkg_no) \
184 (core_base + (pkg_no) * topo.num_cores_per_pkg + (core_no))
185#define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
186
187struct system_summary {
188 struct thread_data threads;
189 struct core_data cores;
190 struct pkg_data packages;
191} sum, average;
192
193
194struct topo_params {
195 int num_packages;
196 int num_cpus;
197 int num_cores;
198 int max_cpu_num;
199 int num_cores_per_pkg;
200 int num_threads_per_core;
201} topo;
202
203struct timeval tv_even, tv_odd, tv_delta;
204
205void setup_all_buffers(void);
206
207int cpu_is_not_present(int cpu)
Len Brownd15cf7c2012-06-03 23:24:00 -0400[diff] [blame]208{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]209 return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
Len Brownd15cf7c2012-06-03 23:24:00 -0400[diff] [blame]210}
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]211/*
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]212 * run func(thread, core, package) in topology order
213 * skip non-present cpus
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]214 */
Len Brownd15cf7c2012-06-03 23:24:00 -0400[diff] [blame]215
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]216int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
217 struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]218{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]219 int retval, pkg_no, core_no, thread_no;
220
221 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
222 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
223 for (thread_no = 0; thread_no <
224 topo.num_threads_per_core; ++thread_no) {
225 struct thread_data *t;
226 struct core_data *c;
227 struct pkg_data *p;
228
229 t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
230
231 if (cpu_is_not_present(t->cpu_id))
232 continue;
233
234 c = GET_CORE(core_base, core_no, pkg_no);
235 p = GET_PKG(pkg_base, pkg_no);
236
237 retval = func(t, c, p);
238 if (retval)
239 return retval;
240 }
241 }
242 }
243 return 0;
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]244}
245
246int cpu_migrate(int cpu)
247{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]248 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
249 CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
250 if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]251 return -1;
252 else
253 return 0;
254}
255
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]256int get_msr(int cpu, off_t offset, unsigned long long *msr)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]257{
258 ssize_t retval;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]259 char pathname[32];
260 int fd;
261
262 sprintf(pathname, "/dev/cpu/%d/msr", cpu);
263 fd = open(pathname, O_RDONLY);
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]264 if (fd < 0)
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]265 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]266
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]267 retval = pread(fd, msr, sizeof *msr, offset);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]268 close(fd);
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]269
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]270 if (retval != sizeof *msr)
271 err(-1, "%s offset 0x%llx read failed", pathname, (unsigned long long)offset);
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]272
273 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]274}
275
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]276/*
277 * Example Format w/ field column widths:
278 *
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]279 * Package Core CPU Avg_MHz Bzy_MHz TSC_MHz SMI %Busy CPU_%c1 CPU_%c3 CPU_%c6 CPU_%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
280 * 123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]281 */
282
Len Browna829eb42011-02-10 23:36:34 -0500[diff] [blame]283void print_header(void)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]284{
285 if (show_pkg)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]286 outp += sprintf(outp, " Package");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]287 if (show_core)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]288 outp += sprintf(outp, " Core");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]289 if (show_cpu)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]290 outp += sprintf(outp, " CPU");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]291 if (has_aperf)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]292 outp += sprintf(outp, " Avg_MHz");
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]293 if (has_aperf)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]294 outp += sprintf(outp, " %%Busy");
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]295 if (has_aperf)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]296 outp += sprintf(outp, " Bzy_MHz");
297 outp += sprintf(outp, " TSC_MHz");
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]298
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]299 if (extra_delta_offset32)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]300 outp += sprintf(outp, " count 0x%03X", extra_delta_offset32);
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]301 if (extra_delta_offset64)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]302 outp += sprintf(outp, " COUNT 0x%03X", extra_delta_offset64);
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]303 if (extra_msr_offset32)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]304 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset32);
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]305 if (extra_msr_offset64)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]306 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset64);
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]307
308 if (!debug)
309 goto done;
310
311 if (do_smi)
312 outp += sprintf(outp, " SMI");
313
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]314 if (do_nhm_cstates)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]315 outp += sprintf(outp, " CPU%%c1");
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]316 if (do_nhm_cstates && !do_slm_cstates)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]317 outp += sprintf(outp, " CPU%%c3");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]318 if (do_nhm_cstates)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]319 outp += sprintf(outp, " CPU%%c6");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]320 if (do_snb_cstates)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]321 outp += sprintf(outp, " CPU%%c7");
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]322
323 if (do_dts)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]324 outp += sprintf(outp, " CoreTmp");
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]325 if (do_ptm)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]326 outp += sprintf(outp, " PkgTmp");
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]327
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]328 if (do_skl_residency) {
329 outp += sprintf(outp, " Totl%%C0");
330 outp += sprintf(outp, " Any%%C0");
331 outp += sprintf(outp, " GFX%%C0");
332 outp += sprintf(outp, " CPUGFX%%");
333 }
334
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]335 if (do_pc2)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]336 outp += sprintf(outp, " Pkg%%pc2");
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]337 if (do_pc3)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]338 outp += sprintf(outp, " Pkg%%pc3");
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]339 if (do_pc6)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]340 outp += sprintf(outp, " Pkg%%pc6");
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]341 if (do_pc7)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]342 outp += sprintf(outp, " Pkg%%pc7");
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]343 if (do_c8_c9_c10) {
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]344 outp += sprintf(outp, " Pkg%%pc8");
345 outp += sprintf(outp, " Pkg%%pc9");
346 outp += sprintf(outp, " Pk%%pc10");
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]347 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]348
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]349 if (do_rapl && !rapl_joules) {
350 if (do_rapl & RAPL_PKG)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]351 outp += sprintf(outp, " PkgWatt");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]352 if (do_rapl & RAPL_CORES)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]353 outp += sprintf(outp, " CorWatt");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]354 if (do_rapl & RAPL_GFX)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]355 outp += sprintf(outp, " GFXWatt");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]356 if (do_rapl & RAPL_DRAM)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]357 outp += sprintf(outp, " RAMWatt");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]358 if (do_rapl & RAPL_PKG_PERF_STATUS)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]359 outp += sprintf(outp, " PKG_%%");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]360 if (do_rapl & RAPL_DRAM_PERF_STATUS)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]361 outp += sprintf(outp, " RAM_%%");
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]362 } else if (do_rapl && rapl_joules) {
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]363 if (do_rapl & RAPL_PKG)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]364 outp += sprintf(outp, " Pkg_J");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]365 if (do_rapl & RAPL_CORES)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]366 outp += sprintf(outp, " Cor_J");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]367 if (do_rapl & RAPL_GFX)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]368 outp += sprintf(outp, " GFX_J");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]369 if (do_rapl & RAPL_DRAM)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]370 outp += sprintf(outp, " RAM_W");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]371 if (do_rapl & RAPL_PKG_PERF_STATUS)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]372 outp += sprintf(outp, " PKG_%%");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]373 if (do_rapl & RAPL_DRAM_PERF_STATUS)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]374 outp += sprintf(outp, " RAM_%%");
375 outp += sprintf(outp, " time");
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]376
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]377 }
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]378 done:
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]379 outp += sprintf(outp, "\n");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]380}
381
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]382int dump_counters(struct thread_data *t, struct core_data *c,
383 struct pkg_data *p)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]384{
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]385 outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]386
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]387 if (t) {
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]388 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
389 t->cpu_id, t->flags);
390 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
391 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
392 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
393 outp += sprintf(outp, "c1: %016llX\n", t->c1);
394 outp += sprintf(outp, "msr0x%x: %08llX\n",
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]395 extra_delta_offset32, t->extra_delta32);
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]396 outp += sprintf(outp, "msr0x%x: %016llX\n",
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]397 extra_delta_offset64, t->extra_delta64);
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]398 outp += sprintf(outp, "msr0x%x: %08llX\n",
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]399 extra_msr_offset32, t->extra_msr32);
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]400 outp += sprintf(outp, "msr0x%x: %016llX\n",
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]401 extra_msr_offset64, t->extra_msr64);
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]402 if (do_smi)
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]403 outp += sprintf(outp, "SMI: %08X\n", t->smi_count);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]404 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]405
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]406 if (c) {
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]407 outp += sprintf(outp, "core: %d\n", c->core_id);
408 outp += sprintf(outp, "c3: %016llX\n", c->c3);
409 outp += sprintf(outp, "c6: %016llX\n", c->c6);
410 outp += sprintf(outp, "c7: %016llX\n", c->c7);
411 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]412 }
413
414 if (p) {
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]415 outp += sprintf(outp, "package: %d\n", p->package_id);
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]416
417 outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
418 outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
419 outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
420 outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
421
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]422 outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]423 if (do_pc3)
424 outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
425 if (do_pc6)
426 outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
427 if (do_pc7)
428 outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]429 outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
430 outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
431 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
432 outp += sprintf(outp, "Joules PKG: %0X\n", p->energy_pkg);
433 outp += sprintf(outp, "Joules COR: %0X\n", p->energy_cores);
434 outp += sprintf(outp, "Joules GFX: %0X\n", p->energy_gfx);
435 outp += sprintf(outp, "Joules RAM: %0X\n", p->energy_dram);
436 outp += sprintf(outp, "Throttle PKG: %0X\n",
437 p->rapl_pkg_perf_status);
438 outp += sprintf(outp, "Throttle RAM: %0X\n",
439 p->rapl_dram_perf_status);
440 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]441 }
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]442
443 outp += sprintf(outp, "\n");
444
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]445 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]446}
447
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]448/*
449 * column formatting convention & formats
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]450 */
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]451int format_counters(struct thread_data *t, struct core_data *c,
452 struct pkg_data *p)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]453{
454 double interval_float;
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]455 char *fmt8;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]456
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]457 /* if showing only 1st thread in core and this isn't one, bail out */
458 if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
459 return 0;
460
461 /* if showing only 1st thread in pkg and this isn't one, bail out */
462 if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
463 return 0;
464
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]465 interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0;
466
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]467 /* topo columns, print blanks on 1st (average) line */
468 if (t == &average.threads) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]469 if (show_pkg)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]470 outp += sprintf(outp, " -");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]471 if (show_core)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]472 outp += sprintf(outp, " -");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]473 if (show_cpu)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]474 outp += sprintf(outp, " -");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]475 } else {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]476 if (show_pkg) {
477 if (p)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]478 outp += sprintf(outp, "%8d", p->package_id);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]479 else
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]480 outp += sprintf(outp, " -");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]481 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]482 if (show_core) {
483 if (c)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]484 outp += sprintf(outp, "%8d", c->core_id);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]485 else
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]486 outp += sprintf(outp, " -");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]487 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]488 if (show_cpu)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]489 outp += sprintf(outp, "%8d", t->cpu_id);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]490 }
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]491
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]492 /* Avg_MHz */
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]493 if (has_aperf)
494 outp += sprintf(outp, "%8.0f",
495 1.0 / units * t->aperf / interval_float);
496
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]497 /* %Busy */
498 if (has_aperf) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]499 if (!skip_c0)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]500 outp += sprintf(outp, "%8.2f", 100.0 * t->mperf/t->tsc);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]501 else
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]502 outp += sprintf(outp, "********");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]503 }
504
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]505 /* Bzy_MHz */
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]506 if (has_aperf)
507 outp += sprintf(outp, "%8.0f",
508 1.0 * t->tsc / units * t->aperf / t->mperf / interval_float);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]509
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]510 /* TSC_MHz */
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]511 outp += sprintf(outp, "%8.0f", 1.0 * t->tsc/units/interval_float);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]512
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]513 /* delta */
514 if (extra_delta_offset32)
515 outp += sprintf(outp, " %11llu", t->extra_delta32);
516
517 /* DELTA */
518 if (extra_delta_offset64)
519 outp += sprintf(outp, " %11llu", t->extra_delta64);
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]520 /* msr */
521 if (extra_msr_offset32)
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]522 outp += sprintf(outp, " 0x%08llx", t->extra_msr32);
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]523
Len Brown130ff302012-09-21 22:56:06 -0400[diff] [blame]524 /* MSR */
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]525 if (extra_msr_offset64)
526 outp += sprintf(outp, " 0x%016llx", t->extra_msr64);
Len Brown130ff302012-09-21 22:56:06 -0400[diff] [blame]527
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]528 if (!debug)
529 goto done;
530
531 /* SMI */
532 if (do_smi)
533 outp += sprintf(outp, "%8d", t->smi_count);
534
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]535 if (do_nhm_cstates) {
536 if (!skip_c1)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]537 outp += sprintf(outp, "%8.2f", 100.0 * t->c1/t->tsc);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]538 else
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]539 outp += sprintf(outp, "********");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]540 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]541
542 /* print per-core data only for 1st thread in core */
543 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
544 goto done;
545
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]546 if (do_nhm_cstates && !do_slm_cstates)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]547 outp += sprintf(outp, "%8.2f", 100.0 * c->c3/t->tsc);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]548 if (do_nhm_cstates)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]549 outp += sprintf(outp, "%8.2f", 100.0 * c->c6/t->tsc);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]550 if (do_snb_cstates)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]551 outp += sprintf(outp, "%8.2f", 100.0 * c->c7/t->tsc);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]552
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]553 if (do_dts)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]554 outp += sprintf(outp, "%8d", c->core_temp_c);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]555
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]556 /* print per-package data only for 1st core in package */
557 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
558 goto done;
559
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]560 /* PkgTmp */
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]561 if (do_ptm)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]562 outp += sprintf(outp, "%8d", p->pkg_temp_c);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]563
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]564 /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
565 if (do_skl_residency) {
566 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_wtd_core_c0/t->tsc);
567 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_core_c0/t->tsc);
568 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_gfxe_c0/t->tsc);
569 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_both_core_gfxe_c0/t->tsc);
570 }
571
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]572 if (do_pc2)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]573 outp += sprintf(outp, "%8.2f", 100.0 * p->pc2/t->tsc);
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]574 if (do_pc3)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]575 outp += sprintf(outp, "%8.2f", 100.0 * p->pc3/t->tsc);
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]576 if (do_pc6)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]577 outp += sprintf(outp, "%8.2f", 100.0 * p->pc6/t->tsc);
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]578 if (do_pc7)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]579 outp += sprintf(outp, "%8.2f", 100.0 * p->pc7/t->tsc);
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]580 if (do_c8_c9_c10) {
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]581 outp += sprintf(outp, "%8.2f", 100.0 * p->pc8/t->tsc);
582 outp += sprintf(outp, "%8.2f", 100.0 * p->pc9/t->tsc);
583 outp += sprintf(outp, "%8.2f", 100.0 * p->pc10/t->tsc);
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]584 }
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]585
586 /*
587 * If measurement interval exceeds minimum RAPL Joule Counter range,
588 * indicate that results are suspect by printing "**" in fraction place.
589 */
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]590 if (interval_float < rapl_joule_counter_range)
591 fmt8 = "%8.2f";
592 else
593 fmt8 = " %6.0f**";
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]594
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]595 if (do_rapl && !rapl_joules) {
596 if (do_rapl & RAPL_PKG)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]597 outp += sprintf(outp, fmt8, p->energy_pkg * rapl_energy_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]598 if (do_rapl & RAPL_CORES)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]599 outp += sprintf(outp, fmt8, p->energy_cores * rapl_energy_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]600 if (do_rapl & RAPL_GFX)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]601 outp += sprintf(outp, fmt8, p->energy_gfx * rapl_energy_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]602 if (do_rapl & RAPL_DRAM)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]603 outp += sprintf(outp, fmt8, p->energy_dram * rapl_energy_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]604 if (do_rapl & RAPL_PKG_PERF_STATUS)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]605 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]606 if (do_rapl & RAPL_DRAM_PERF_STATUS)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]607 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]608 } else if (do_rapl && rapl_joules) {
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]609 if (do_rapl & RAPL_PKG)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]610 outp += sprintf(outp, fmt8,
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]611 p->energy_pkg * rapl_energy_units);
612 if (do_rapl & RAPL_CORES)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]613 outp += sprintf(outp, fmt8,
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]614 p->energy_cores * rapl_energy_units);
615 if (do_rapl & RAPL_GFX)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]616 outp += sprintf(outp, fmt8,
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]617 p->energy_gfx * rapl_energy_units);
618 if (do_rapl & RAPL_DRAM)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]619 outp += sprintf(outp, fmt8,
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]620 p->energy_dram * rapl_energy_units);
621 if (do_rapl & RAPL_PKG_PERF_STATUS)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]622 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]623 if (do_rapl & RAPL_DRAM_PERF_STATUS)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]624 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]625
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]626 outp += sprintf(outp, fmt8, interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]627 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]628done:
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]629 outp += sprintf(outp, "\n");
630
631 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]632}
633
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]634void flush_stdout()
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]635{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]636 fputs(output_buffer, stdout);
Len Brownddac0d62012-11-30 01:01:40 -0500[diff] [blame]637 fflush(stdout);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]638 outp = output_buffer;
639}
640void flush_stderr()
641{
642 fputs(output_buffer, stderr);
643 outp = output_buffer;
644}
645void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
646{
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]647 static int printed;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]648
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]649 if (!printed || !summary_only)
650 print_header();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]651
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]652 if (topo.num_cpus > 1)
653 format_counters(&average.threads, &average.cores,
654 &average.packages);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]655
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]656 printed = 1;
657
658 if (summary_only)
659 return;
660
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]661 for_all_cpus(format_counters, t, c, p);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]662}
663
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]664#define DELTA_WRAP32(new, old) \
665 if (new > old) { \
666 old = new - old; \
667 } else { \
668 old = 0x100000000 + new - old; \
669 }
670
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]671void
672delta_package(struct pkg_data *new, struct pkg_data *old)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]673{
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]674
675 if (do_skl_residency) {
676 old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
677 old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
678 old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
679 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
680 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]681 old->pc2 = new->pc2 - old->pc2;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]682 if (do_pc3)
683 old->pc3 = new->pc3 - old->pc3;
684 if (do_pc6)
685 old->pc6 = new->pc6 - old->pc6;
686 if (do_pc7)
687 old->pc7 = new->pc7 - old->pc7;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]688 old->pc8 = new->pc8 - old->pc8;
689 old->pc9 = new->pc9 - old->pc9;
690 old->pc10 = new->pc10 - old->pc10;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]691 old->pkg_temp_c = new->pkg_temp_c;
692
693 DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
694 DELTA_WRAP32(new->energy_cores, old->energy_cores);
695 DELTA_WRAP32(new->energy_gfx, old->energy_gfx);
696 DELTA_WRAP32(new->energy_dram, old->energy_dram);
697 DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status);
698 DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]699}
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]700
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]701void
702delta_core(struct core_data *new, struct core_data *old)
703{
704 old->c3 = new->c3 - old->c3;
705 old->c6 = new->c6 - old->c6;
706 old->c7 = new->c7 - old->c7;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]707 old->core_temp_c = new->core_temp_c;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]708}
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]709
Len Brownc3ae3312012-06-13 21:31:46 -0400[diff] [blame]710/*
711 * old = new - old
712 */
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]713void
714delta_thread(struct thread_data *new, struct thread_data *old,
715 struct core_data *core_delta)
716{
717 old->tsc = new->tsc - old->tsc;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]718
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]719 /* check for TSC < 1 Mcycles over interval */
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]720 if (old->tsc < (1000 * 1000))
721 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
722 "You can disable all c-states by booting with \"idle=poll\"\n"
723 "or just the deep ones with \"processor.max_cstate=1\"");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]724
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]725 old->c1 = new->c1 - old->c1;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]726
Len Browna7296172015-01-23 01:33:58 -0500[diff] [blame]727 if (has_aperf) {
728 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
729 old->aperf = new->aperf - old->aperf;
730 old->mperf = new->mperf - old->mperf;
731 } else {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]732
Len Browna7296172015-01-23 01:33:58 -0500[diff] [blame]733 if (!aperf_mperf_unstable) {
734 fprintf(stderr, "%s: APERF or MPERF went backwards *\n", progname);
735 fprintf(stderr, "* Frequency results do not cover entire interval *\n");
736 fprintf(stderr, "* fix this by running Linux-2.6.30 or later *\n");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]737
Len Browna7296172015-01-23 01:33:58 -0500[diff] [blame]738 aperf_mperf_unstable = 1;
739 }
740 /*
741 * mperf delta is likely a huge "positive" number
742 * can not use it for calculating c0 time
743 */
744 skip_c0 = 1;
745 skip_c1 = 1;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]746 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]747 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]748
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]749
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]750 if (use_c1_residency_msr) {
751 /*
752 * Some models have a dedicated C1 residency MSR,
753 * which should be more accurate than the derivation below.
754 */
755 } else {
756 /*
757 * As counter collection is not atomic,
758 * it is possible for mperf's non-halted cycles + idle states
759 * to exceed TSC's all cycles: show c1 = 0% in that case.
760 */
761 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > old->tsc)
762 old->c1 = 0;
763 else {
764 /* normal case, derive c1 */
765 old->c1 = old->tsc - old->mperf - core_delta->c3
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]766 - core_delta->c6 - core_delta->c7;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]767 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]768 }
Len Brownc3ae3312012-06-13 21:31:46 -0400[diff] [blame]769
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]770 if (old->mperf == 0) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]771 if (debug > 1) fprintf(stderr, "cpu%d MPERF 0!\n", old->cpu_id);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]772 old->mperf = 1; /* divide by 0 protection */
773 }
774
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]775 old->extra_delta32 = new->extra_delta32 - old->extra_delta32;
776 old->extra_delta32 &= 0xFFFFFFFF;
777
778 old->extra_delta64 = new->extra_delta64 - old->extra_delta64;
779
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]780 /*
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]781 * Extra MSR is just a snapshot, simply copy latest w/o subtracting
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]782 */
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]783 old->extra_msr32 = new->extra_msr32;
784 old->extra_msr64 = new->extra_msr64;
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]785
786 if (do_smi)
787 old->smi_count = new->smi_count - old->smi_count;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]788}
789
790int delta_cpu(struct thread_data *t, struct core_data *c,
791 struct pkg_data *p, struct thread_data *t2,
792 struct core_data *c2, struct pkg_data *p2)
793{
794 /* calculate core delta only for 1st thread in core */
795 if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
796 delta_core(c, c2);
797
798 /* always calculate thread delta */
799 delta_thread(t, t2, c2); /* c2 is core delta */
800
801 /* calculate package delta only for 1st core in package */
802 if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
803 delta_package(p, p2);
804
805 return 0;
806}
807
808void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
809{
810 t->tsc = 0;
811 t->aperf = 0;
812 t->mperf = 0;
813 t->c1 = 0;
814
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]815 t->smi_count = 0;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]816 t->extra_delta32 = 0;
817 t->extra_delta64 = 0;
818
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]819 /* tells format_counters to dump all fields from this set */
820 t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
821
822 c->c3 = 0;
823 c->c6 = 0;
824 c->c7 = 0;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]825 c->core_temp_c = 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]826
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]827 p->pkg_wtd_core_c0 = 0;
828 p->pkg_any_core_c0 = 0;
829 p->pkg_any_gfxe_c0 = 0;
830 p->pkg_both_core_gfxe_c0 = 0;
831
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]832 p->pc2 = 0;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]833 if (do_pc3)
834 p->pc3 = 0;
835 if (do_pc6)
836 p->pc6 = 0;
837 if (do_pc7)
838 p->pc7 = 0;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]839 p->pc8 = 0;
840 p->pc9 = 0;
841 p->pc10 = 0;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]842
843 p->energy_pkg = 0;
844 p->energy_dram = 0;
845 p->energy_cores = 0;
846 p->energy_gfx = 0;
847 p->rapl_pkg_perf_status = 0;
848 p->rapl_dram_perf_status = 0;
849 p->pkg_temp_c = 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]850}
851int sum_counters(struct thread_data *t, struct core_data *c,
852 struct pkg_data *p)
853{
854 average.threads.tsc += t->tsc;
855 average.threads.aperf += t->aperf;
856 average.threads.mperf += t->mperf;
857 average.threads.c1 += t->c1;
858
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]859 average.threads.extra_delta32 += t->extra_delta32;
860 average.threads.extra_delta64 += t->extra_delta64;
861
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]862 /* sum per-core values only for 1st thread in core */
863 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
864 return 0;
865
866 average.cores.c3 += c->c3;
867 average.cores.c6 += c->c6;
868 average.cores.c7 += c->c7;
869
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]870 average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
871
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]872 /* sum per-pkg values only for 1st core in pkg */
873 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
874 return 0;
875
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]876 if (do_skl_residency) {
877 average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
878 average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
879 average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
880 average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
881 }
882
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]883 average.packages.pc2 += p->pc2;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]884 if (do_pc3)
885 average.packages.pc3 += p->pc3;
886 if (do_pc6)
887 average.packages.pc6 += p->pc6;
888 if (do_pc7)
889 average.packages.pc7 += p->pc7;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]890 average.packages.pc8 += p->pc8;
891 average.packages.pc9 += p->pc9;
892 average.packages.pc10 += p->pc10;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]893
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]894 average.packages.energy_pkg += p->energy_pkg;
895 average.packages.energy_dram += p->energy_dram;
896 average.packages.energy_cores += p->energy_cores;
897 average.packages.energy_gfx += p->energy_gfx;
898
899 average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
900
901 average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
902 average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]903 return 0;
904}
905/*
906 * sum the counters for all cpus in the system
907 * compute the weighted average
908 */
909void compute_average(struct thread_data *t, struct core_data *c,
910 struct pkg_data *p)
911{
912 clear_counters(&average.threads, &average.cores, &average.packages);
913
914 for_all_cpus(sum_counters, t, c, p);
915
916 average.threads.tsc /= topo.num_cpus;
917 average.threads.aperf /= topo.num_cpus;
918 average.threads.mperf /= topo.num_cpus;
919 average.threads.c1 /= topo.num_cpus;
920
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]921 average.threads.extra_delta32 /= topo.num_cpus;
922 average.threads.extra_delta32 &= 0xFFFFFFFF;
923
924 average.threads.extra_delta64 /= topo.num_cpus;
925
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]926 average.cores.c3 /= topo.num_cores;
927 average.cores.c6 /= topo.num_cores;
928 average.cores.c7 /= topo.num_cores;
929
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]930 if (do_skl_residency) {
931 average.packages.pkg_wtd_core_c0 /= topo.num_packages;
932 average.packages.pkg_any_core_c0 /= topo.num_packages;
933 average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
934 average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
935 }
936
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]937 average.packages.pc2 /= topo.num_packages;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]938 if (do_pc3)
939 average.packages.pc3 /= topo.num_packages;
940 if (do_pc6)
941 average.packages.pc6 /= topo.num_packages;
942 if (do_pc7)
943 average.packages.pc7 /= topo.num_packages;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]944
945 average.packages.pc8 /= topo.num_packages;
946 average.packages.pc9 /= topo.num_packages;
947 average.packages.pc10 /= topo.num_packages;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]948}
949
950static unsigned long long rdtsc(void)
951{
952 unsigned int low, high;
953
954 asm volatile("rdtsc" : "=a" (low), "=d" (high));
955
956 return low | ((unsigned long long)high) << 32;
957}
958
959
960/*
961 * get_counters(...)
962 * migrate to cpu
963 * acquire and record local counters for that cpu
964 */
965int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
966{
967 int cpu = t->cpu_id;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]968 unsigned long long msr;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]969
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]970 if (cpu_migrate(cpu)) {
971 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]972 return -1;
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]973 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]974
975 t->tsc = rdtsc(); /* we are running on local CPU of interest */
976
977 if (has_aperf) {
Len Brown9c63a652012-10-31 01:29:52 -0400[diff] [blame]978 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]979 return -3;
Len Brown9c63a652012-10-31 01:29:52 -0400[diff] [blame]980 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]981 return -4;
982 }
983
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]984 if (do_smi) {
985 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
986 return -5;
987 t->smi_count = msr & 0xFFFFFFFF;
988 }
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]989 if (extra_delta_offset32) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]990 if (get_msr(cpu, extra_delta_offset32, &msr))
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]991 return -5;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]992 t->extra_delta32 = msr & 0xFFFFFFFF;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]993 }
994
995 if (extra_delta_offset64)
996 if (get_msr(cpu, extra_delta_offset64, &t->extra_delta64))
997 return -5;
998
999 if (extra_msr_offset32) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1000 if (get_msr(cpu, extra_msr_offset32, &msr))
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]1001 return -5;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1002 t->extra_msr32 = msr & 0xFFFFFFFF;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]1003 }
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]1004
1005 if (extra_msr_offset64)
1006 if (get_msr(cpu, extra_msr_offset64, &t->extra_msr64))
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1007 return -5;
1008
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1009 if (use_c1_residency_msr) {
1010 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
1011 return -6;
1012 }
1013
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1014 /* collect core counters only for 1st thread in core */
1015 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1016 return 0;
1017
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1018 if (do_nhm_cstates && !do_slm_cstates) {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1019 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
1020 return -6;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1021 }
1022
1023 if (do_nhm_cstates) {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1024 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
1025 return -7;
1026 }
1027
1028 if (do_snb_cstates)
1029 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
1030 return -8;
1031
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1032 if (do_dts) {
1033 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
1034 return -9;
1035 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1036 }
1037
1038
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1039 /* collect package counters only for 1st core in package */
1040 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1041 return 0;
1042
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]1043 if (do_skl_residency) {
1044 if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
1045 return -10;
1046 if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
1047 return -11;
1048 if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
1049 return -12;
1050 if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
1051 return -13;
1052 }
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1053 if (do_pc3)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1054 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
1055 return -9;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1056 if (do_pc6)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1057 if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
1058 return -10;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1059 if (do_pc2)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1060 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
1061 return -11;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1062 if (do_pc7)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1063 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
1064 return -12;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]1065 if (do_c8_c9_c10) {
1066 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
1067 return -13;
1068 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
1069 return -13;
1070 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
1071 return -13;
1072 }
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1073 if (do_rapl & RAPL_PKG) {
1074 if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr))
1075 return -13;
1076 p->energy_pkg = msr & 0xFFFFFFFF;
1077 }
1078 if (do_rapl & RAPL_CORES) {
1079 if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr))
1080 return -14;
1081 p->energy_cores = msr & 0xFFFFFFFF;
1082 }
1083 if (do_rapl & RAPL_DRAM) {
1084 if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
1085 return -15;
1086 p->energy_dram = msr & 0xFFFFFFFF;
1087 }
1088 if (do_rapl & RAPL_GFX) {
1089 if (get_msr(cpu, MSR_PP1_ENERGY_STATUS, &msr))
1090 return -16;
1091 p->energy_gfx = msr & 0xFFFFFFFF;
1092 }
1093 if (do_rapl & RAPL_PKG_PERF_STATUS) {
1094 if (get_msr(cpu, MSR_PKG_PERF_STATUS, &msr))
1095 return -16;
1096 p->rapl_pkg_perf_status = msr & 0xFFFFFFFF;
1097 }
1098 if (do_rapl & RAPL_DRAM_PERF_STATUS) {
1099 if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr))
1100 return -16;
1101 p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
1102 }
1103 if (do_ptm) {
1104 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
1105 return -17;
1106 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1107 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1108 return 0;
1109}
1110
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1111/*
1112 * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
1113 * If you change the values, note they are used both in comparisons
1114 * (>= PCL__7) and to index pkg_cstate_limit_strings[].
1115 */
1116
1117#define PCLUKN 0 /* Unknown */
1118#define PCLRSV 1 /* Reserved */
1119#define PCL__0 2 /* PC0 */
1120#define PCL__1 3 /* PC1 */
1121#define PCL__2 4 /* PC2 */
1122#define PCL__3 5 /* PC3 */
1123#define PCL__4 6 /* PC4 */
1124#define PCL__6 7 /* PC6 */
1125#define PCL_6N 8 /* PC6 No Retention */
1126#define PCL_6R 9 /* PC6 Retention */
1127#define PCL__7 10 /* PC7 */
1128#define PCL_7S 11 /* PC7 Shrink */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]1129#define PCL__8 12 /* PC8 */
1130#define PCL__9 13 /* PC9 */
1131#define PCLUNL 14 /* Unlimited */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1132
1133int pkg_cstate_limit = PCLUKN;
1134char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]1135 "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "unlimited"};
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1136
1137int nhm_pkg_cstate_limits[8] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL};
1138int snb_pkg_cstate_limits[8] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL};
1139int hsw_pkg_cstate_limits[8] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCLRSV, PCLUNL};
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]1140int skl_pkg_cstate_limits[8] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9};
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1141int slv_pkg_cstate_limits[8] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7};
1142int amt_pkg_cstate_limits[8] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7};
1143int phi_pkg_cstate_limits[8] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL};
1144
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1145static void
1146dump_nhm_platform_info(void)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1147{
1148 unsigned long long msr;
1149 unsigned int ratio;
1150
Len Brown9c63a652012-10-31 01:29:52 -0400[diff] [blame]1151 get_msr(0, MSR_NHM_PLATFORM_INFO, &msr);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1152
Len Brown67920412013-01-31 15:22:15 -0500[diff] [blame]1153 fprintf(stderr, "cpu0: MSR_NHM_PLATFORM_INFO: 0x%08llx\n", msr);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1154
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1155 ratio = (msr >> 40) & 0xFF;
Len Brown8f61f352015-03-23 18:36:57 -0400[diff] [blame]1156 fprintf(stderr, "%d * %.0f = %.0f MHz max efficiency frequency\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1157 ratio, bclk, ratio * bclk);
1158
1159 ratio = (msr >> 8) & 0xFF;
Len Brown8f61f352015-03-23 18:36:57 -0400[diff] [blame]1160 fprintf(stderr, "%d * %.0f = %.0f MHz base frequency\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1161 ratio, bclk, ratio * bclk);
1162
Len Brown67920412013-01-31 15:22:15 -0500[diff] [blame]1163 get_msr(0, MSR_IA32_POWER_CTL, &msr);
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1164 fprintf(stderr, "cpu0: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
Len Brown67920412013-01-31 15:22:15 -0500[diff] [blame]1165 msr, msr & 0x2 ? "EN" : "DIS");
1166
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1167 return;
1168}
1169
1170static void
1171dump_hsw_turbo_ratio_limits(void)
1172{
1173 unsigned long long msr;
1174 unsigned int ratio;
1175
1176 get_msr(0, MSR_TURBO_RATIO_LIMIT2, &msr);
1177
1178 fprintf(stderr, "cpu0: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", msr);
1179
1180 ratio = (msr >> 8) & 0xFF;
1181 if (ratio)
1182 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 18 active cores\n",
1183 ratio, bclk, ratio * bclk);
1184
1185 ratio = (msr >> 0) & 0xFF;
1186 if (ratio)
1187 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 17 active cores\n",
1188 ratio, bclk, ratio * bclk);
1189 return;
1190}
1191
1192static void
1193dump_ivt_turbo_ratio_limits(void)
1194{
1195 unsigned long long msr;
1196 unsigned int ratio;
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1197
Len Brown12bb43c2015-04-13 16:08:18 -0400[diff] [blame]1198 get_msr(0, MSR_TURBO_RATIO_LIMIT1, &msr);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1199
Len Brown12bb43c2015-04-13 16:08:18 -0400[diff] [blame]1200 fprintf(stderr, "cpu0: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", msr);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1201
1202 ratio = (msr >> 56) & 0xFF;
1203 if (ratio)
1204 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 16 active cores\n",
1205 ratio, bclk, ratio * bclk);
1206
1207 ratio = (msr >> 48) & 0xFF;
1208 if (ratio)
1209 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 15 active cores\n",
1210 ratio, bclk, ratio * bclk);
1211
1212 ratio = (msr >> 40) & 0xFF;
1213 if (ratio)
1214 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 14 active cores\n",
1215 ratio, bclk, ratio * bclk);
1216
1217 ratio = (msr >> 32) & 0xFF;
1218 if (ratio)
1219 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 13 active cores\n",
1220 ratio, bclk, ratio * bclk);
1221
1222 ratio = (msr >> 24) & 0xFF;
1223 if (ratio)
1224 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 12 active cores\n",
1225 ratio, bclk, ratio * bclk);
1226
1227 ratio = (msr >> 16) & 0xFF;
1228 if (ratio)
1229 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 11 active cores\n",
1230 ratio, bclk, ratio * bclk);
1231
1232 ratio = (msr >> 8) & 0xFF;
1233 if (ratio)
1234 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 10 active cores\n",
1235 ratio, bclk, ratio * bclk);
1236
1237 ratio = (msr >> 0) & 0xFF;
1238 if (ratio)
1239 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 9 active cores\n",
1240 ratio, bclk, ratio * bclk);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1241 return;
1242}
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1243
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1244static void
1245dump_nhm_turbo_ratio_limits(void)
1246{
1247 unsigned long long msr;
1248 unsigned int ratio;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1249
Len Brown12bb43c2015-04-13 16:08:18 -0400[diff] [blame]1250 get_msr(0, MSR_TURBO_RATIO_LIMIT, &msr);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1251
Len Brown12bb43c2015-04-13 16:08:18 -0400[diff] [blame]1252 fprintf(stderr, "cpu0: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", msr);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1253
1254 ratio = (msr >> 56) & 0xFF;
1255 if (ratio)
1256 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 8 active cores\n",
1257 ratio, bclk, ratio * bclk);
1258
1259 ratio = (msr >> 48) & 0xFF;
1260 if (ratio)
1261 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 7 active cores\n",
1262 ratio, bclk, ratio * bclk);
1263
1264 ratio = (msr >> 40) & 0xFF;
1265 if (ratio)
1266 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 6 active cores\n",
1267 ratio, bclk, ratio * bclk);
1268
1269 ratio = (msr >> 32) & 0xFF;
1270 if (ratio)
1271 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 5 active cores\n",
1272 ratio, bclk, ratio * bclk);
1273
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1274 ratio = (msr >> 24) & 0xFF;
1275 if (ratio)
1276 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 4 active cores\n",
1277 ratio, bclk, ratio * bclk);
1278
1279 ratio = (msr >> 16) & 0xFF;
1280 if (ratio)
1281 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 3 active cores\n",
1282 ratio, bclk, ratio * bclk);
1283
1284 ratio = (msr >> 8) & 0xFF;
1285 if (ratio)
1286 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 2 active cores\n",
1287 ratio, bclk, ratio * bclk);
1288
1289 ratio = (msr >> 0) & 0xFF;
1290 if (ratio)
1291 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 1 active cores\n",
1292 ratio, bclk, ratio * bclk);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1293 return;
1294}
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]1295
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1296static void
1297dump_nhm_cst_cfg(void)
1298{
1299 unsigned long long msr;
1300
1301 get_msr(0, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
1302
1303#define SNB_C1_AUTO_UNDEMOTE (1UL << 27)
1304#define SNB_C3_AUTO_UNDEMOTE (1UL << 28)
1305
1306 fprintf(stderr, "cpu0: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x%08llx", msr);
1307
1308 fprintf(stderr, " (%s%s%s%s%slocked: pkg-cstate-limit=%d: %s)\n",
1309 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
1310 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
1311 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
1312 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
1313 (msr & (1 << 15)) ? "" : "UN",
1314 (unsigned int)msr & 7,
1315 pkg_cstate_limit_strings[pkg_cstate_limit]);
1316 return;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1317}
1318
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1319void free_all_buffers(void)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1320{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1321 CPU_FREE(cpu_present_set);
1322 cpu_present_set = NULL;
1323 cpu_present_set = 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1324
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1325 CPU_FREE(cpu_affinity_set);
1326 cpu_affinity_set = NULL;
1327 cpu_affinity_setsize = 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1328
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1329 free(thread_even);
1330 free(core_even);
1331 free(package_even);
1332
1333 thread_even = NULL;
1334 core_even = NULL;
1335 package_even = NULL;
1336
1337 free(thread_odd);
1338 free(core_odd);
1339 free(package_odd);
1340
1341 thread_odd = NULL;
1342 core_odd = NULL;
1343 package_odd = NULL;
1344
1345 free(output_buffer);
1346 output_buffer = NULL;
1347 outp = NULL;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1348}
1349
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1350/*
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]1351 * Open a file, and exit on failure
1352 */
1353FILE *fopen_or_die(const char *path, const char *mode)
1354{
1355 FILE *filep = fopen(path, "r");
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]1356 if (!filep)
1357 err(1, "%s: open failed", path);
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]1358 return filep;
1359}
1360
1361/*
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1362 * Parse a file containing a single int.
1363 */
1364int parse_int_file(const char *fmt, ...)
1365{
1366 va_list args;
1367 char path[PATH_MAX];
1368 FILE *filep;
1369 int value;
1370
1371 va_start(args, fmt);
1372 vsnprintf(path, sizeof(path), fmt, args);
1373 va_end(args);
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]1374 filep = fopen_or_die(path, "r");
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]1375 if (fscanf(filep, "%d", &value) != 1)
1376 err(1, "%s: failed to parse number from file", path);
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1377 fclose(filep);
1378 return value;
1379}
1380
1381/*
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1382 * cpu_is_first_sibling_in_core(cpu)
1383 * return 1 if given CPU is 1st HT sibling in the core
1384 */
1385int cpu_is_first_sibling_in_core(int cpu)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1386{
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1387 return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list", cpu);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1388}
1389
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1390/*
1391 * cpu_is_first_core_in_package(cpu)
1392 * return 1 if given CPU is 1st core in package
1393 */
1394int cpu_is_first_core_in_package(int cpu)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1395{
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1396 return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1397}
1398
1399int get_physical_package_id(int cpu)
1400{
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1401 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1402}
1403
1404int get_core_id(int cpu)
1405{
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1406 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1407}
1408
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1409int get_num_ht_siblings(int cpu)
1410{
1411 char path[80];
1412 FILE *filep;
1413 int sib1, sib2;
1414 int matches;
1415 char character;
1416
1417 sprintf(path, "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list", cpu);
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]1418 filep = fopen_or_die(path, "r");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1419 /*
1420 * file format:
1421 * if a pair of number with a character between: 2 siblings (eg. 1-2, or 1,4)
1422 * otherwinse 1 sibling (self).
1423 */
1424 matches = fscanf(filep, "%d%c%d\n", &sib1, &character, &sib2);
1425
1426 fclose(filep);
1427
1428 if (matches == 3)
1429 return 2;
1430 else
1431 return 1;
1432}
1433
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1434/*
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1435 * run func(thread, core, package) in topology order
1436 * skip non-present cpus
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1437 */
1438
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1439int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
1440 struct pkg_data *, struct thread_data *, struct core_data *,
1441 struct pkg_data *), struct thread_data *thread_base,
1442 struct core_data *core_base, struct pkg_data *pkg_base,
1443 struct thread_data *thread_base2, struct core_data *core_base2,
1444 struct pkg_data *pkg_base2)
1445{
1446 int retval, pkg_no, core_no, thread_no;
1447
1448 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
1449 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
1450 for (thread_no = 0; thread_no <
1451 topo.num_threads_per_core; ++thread_no) {
1452 struct thread_data *t, *t2;
1453 struct core_data *c, *c2;
1454 struct pkg_data *p, *p2;
1455
1456 t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
1457
1458 if (cpu_is_not_present(t->cpu_id))
1459 continue;
1460
1461 t2 = GET_THREAD(thread_base2, thread_no, core_no, pkg_no);
1462
1463 c = GET_CORE(core_base, core_no, pkg_no);
1464 c2 = GET_CORE(core_base2, core_no, pkg_no);
1465
1466 p = GET_PKG(pkg_base, pkg_no);
1467 p2 = GET_PKG(pkg_base2, pkg_no);
1468
1469 retval = func(t, c, p, t2, c2, p2);
1470 if (retval)
1471 return retval;
1472 }
1473 }
1474 }
1475 return 0;
1476}
1477
1478/*
1479 * run func(cpu) on every cpu in /proc/stat
1480 * return max_cpu number
1481 */
1482int for_all_proc_cpus(int (func)(int))
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1483{
1484 FILE *fp;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1485 int cpu_num;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1486 int retval;
1487
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]1488 fp = fopen_or_die(proc_stat, "r");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1489
1490 retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]1491 if (retval != 0)
1492 err(1, "%s: failed to parse format", proc_stat);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1493
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1494 while (1) {
1495 retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1496 if (retval != 1)
1497 break;
1498
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1499 retval = func(cpu_num);
1500 if (retval) {
1501 fclose(fp);
1502 return(retval);
1503 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1504 }
1505 fclose(fp);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1506 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1507}
1508
1509void re_initialize(void)
1510{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1511 free_all_buffers();
1512 setup_all_buffers();
1513 printf("turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1514}
1515
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1516
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1517/*
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1518 * count_cpus()
1519 * remember the last one seen, it will be the max
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1520 */
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1521int count_cpus(int cpu)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1522{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1523 if (topo.max_cpu_num < cpu)
1524 topo.max_cpu_num = cpu;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1525
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1526 topo.num_cpus += 1;
1527 return 0;
1528}
1529int mark_cpu_present(int cpu)
1530{
1531 CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]1532 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1533}
1534
1535void turbostat_loop()
1536{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1537 int retval;
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]1538 int restarted = 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1539
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1540restart:
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]1541 restarted++;
1542
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1543 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]1544 if (retval < -1) {
1545 exit(retval);
1546 } else if (retval == -1) {
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]1547 if (restarted > 1) {
1548 exit(retval);
1549 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1550 re_initialize();
1551 goto restart;
1552 }
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]1553 restarted = 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1554 gettimeofday(&tv_even, (struct timezone *)NULL);
1555
1556 while (1) {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1557 if (for_all_proc_cpus(cpu_is_not_present)) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1558 re_initialize();
1559 goto restart;
1560 }
1561 sleep(interval_sec);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1562 retval = for_all_cpus(get_counters, ODD_COUNTERS);
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]1563 if (retval < -1) {
1564 exit(retval);
1565 } else if (retval == -1) {
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]1566 re_initialize();
1567 goto restart;
1568 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1569 gettimeofday(&tv_odd, (struct timezone *)NULL);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1570 timersub(&tv_odd, &tv_even, &tv_delta);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1571 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
1572 compute_average(EVEN_COUNTERS);
1573 format_all_counters(EVEN_COUNTERS);
1574 flush_stdout();
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]1575 sleep(interval_sec);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1576 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]1577 if (retval < -1) {
1578 exit(retval);
1579 } else if (retval == -1) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1580 re_initialize();
1581 goto restart;
1582 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1583 gettimeofday(&tv_even, (struct timezone *)NULL);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1584 timersub(&tv_even, &tv_odd, &tv_delta);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1585 for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS);
1586 compute_average(ODD_COUNTERS);
1587 format_all_counters(ODD_COUNTERS);
1588 flush_stdout();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1589 }
1590}
1591
1592void check_dev_msr()
1593{
1594 struct stat sb;
1595
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]1596 if (stat("/dev/cpu/0/msr", &sb))
Len Browna21d38c2015-03-24 16:37:35 -0400[diff] [blame]1597 if (system("/sbin/modprobe msr > /dev/null 2>&1"))
1598 err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1599}
1600
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]1601void check_permissions()
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1602{
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]1603 struct __user_cap_header_struct cap_header_data;
1604 cap_user_header_t cap_header = &cap_header_data;
1605 struct __user_cap_data_struct cap_data_data;
1606 cap_user_data_t cap_data = &cap_data_data;
1607 extern int capget(cap_user_header_t hdrp, cap_user_data_t datap);
1608 int do_exit = 0;
1609
1610 /* check for CAP_SYS_RAWIO */
1611 cap_header->pid = getpid();
1612 cap_header->version = _LINUX_CAPABILITY_VERSION;
1613 if (capget(cap_header, cap_data) < 0)
1614 err(-6, "capget(2) failed");
1615
1616 if ((cap_data->effective & (1 << CAP_SYS_RAWIO)) == 0) {
1617 do_exit++;
1618 warnx("capget(CAP_SYS_RAWIO) failed,"
1619 " try \"# setcap cap_sys_rawio=ep %s\"", progname);
1620 }
1621
1622 /* test file permissions */
1623 if (euidaccess("/dev/cpu/0/msr", R_OK)) {
1624 do_exit++;
1625 warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
1626 }
1627
1628 /* if all else fails, thell them to be root */
1629 if (do_exit)
1630 if (getuid() != 0)
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]1631 warnx("... or simply run as root");
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]1632
1633 if (do_exit)
1634 exit(-6);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1635}
1636
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]1637/*
1638 * NHM adds support for additional MSRs:
1639 *
1640 * MSR_SMI_COUNT 0x00000034
1641 *
1642 * MSR_NHM_PLATFORM_INFO 0x000000ce
1643 * MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2
1644 *
1645 * MSR_PKG_C3_RESIDENCY 0x000003f8
1646 * MSR_PKG_C6_RESIDENCY 0x000003f9
1647 * MSR_CORE_C3_RESIDENCY 0x000003fc
1648 * MSR_CORE_C6_RESIDENCY 0x000003fd
1649 *
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1650 * Side effect:
1651 * sets global pkg_cstate_limit to decode MSR_NHM_SNB_PKG_CST_CFG_CTL
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]1652 */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1653int probe_nhm_msrs(unsigned int family, unsigned int model)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1654{
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1655 unsigned long long msr;
1656 int *pkg_cstate_limits;
1657
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1658 if (!genuine_intel)
1659 return 0;
1660
1661 if (family != 6)
1662 return 0;
1663
1664 switch (model) {
1665 case 0x1A: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
1666 case 0x1E: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
1667 case 0x1F: /* Core i7 and i5 Processor - Nehalem */
1668 case 0x25: /* Westmere Client - Clarkdale, Arrandale */
1669 case 0x2C: /* Westmere EP - Gulftown */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1670 case 0x2E: /* Nehalem-EX Xeon - Beckton */
1671 case 0x2F: /* Westmere-EX Xeon - Eagleton */
1672 pkg_cstate_limits = nhm_pkg_cstate_limits;
1673 break;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1674 case 0x2A: /* SNB */
1675 case 0x2D: /* SNB Xeon */
Len Brown553575f2011-11-18 03:32:01 -0500[diff] [blame]1676 case 0x3A: /* IVB */
Len Brown13006512012-09-26 18:11:31 -0400[diff] [blame]1677 case 0x3E: /* IVB Xeon */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1678 pkg_cstate_limits = snb_pkg_cstate_limits;
1679 break;
Len Brown70b43402013-01-08 01:26:07 -0500[diff] [blame]1680 case 0x3C: /* HSW */
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]1681 case 0x3F: /* HSX */
Len Brown70b43402013-01-08 01:26:07 -0500[diff] [blame]1682 case 0x45: /* HSW */
Len Brown149c2312013-03-15 10:58:02 -0400[diff] [blame]1683 case 0x46: /* HSW */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]1684 case 0x3D: /* BDW */
Len Brown48a06312015-02-10 15:38:04 -0500[diff] [blame]1685 case 0x47: /* BDW */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]1686 case 0x4F: /* BDX */
1687 case 0x56: /* BDX-DE */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]1688 case 0x4E: /* SKL */
1689 case 0x5E: /* SKL */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1690 pkg_cstate_limits = hsw_pkg_cstate_limits;
1691 break;
1692 case 0x37: /* BYT */
1693 case 0x4D: /* AVN */
1694 pkg_cstate_limits = slv_pkg_cstate_limits;
1695 break;
1696 case 0x4C: /* AMT */
1697 pkg_cstate_limits = amt_pkg_cstate_limits;
1698 break;
1699 case 0x57: /* PHI */
1700 pkg_cstate_limits = phi_pkg_cstate_limits;
1701 break;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1702 default:
1703 return 0;
1704 }
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1705 get_msr(0, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
1706
1707 pkg_cstate_limit = pkg_cstate_limits[msr & 0x7];
1708
1709 return 1;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1710}
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]1711int has_nhm_turbo_ratio_limit(unsigned int family, unsigned int model)
1712{
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]1713 switch (model) {
1714 /* Nehalem compatible, but do not include turbo-ratio limit support */
1715 case 0x2E: /* Nehalem-EX Xeon - Beckton */
1716 case 0x2F: /* Westmere-EX Xeon - Eagleton */
1717 return 0;
1718 default:
1719 return 1;
1720 }
1721}
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1722int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
1723{
1724 if (!genuine_intel)
1725 return 0;
1726
1727 if (family != 6)
1728 return 0;
1729
1730 switch (model) {
1731 case 0x3E: /* IVB Xeon */
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1732 case 0x3F: /* HSW Xeon */
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1733 return 1;
1734 default:
1735 return 0;
1736 }
1737}
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1738int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
1739{
1740 if (!genuine_intel)
1741 return 0;
1742
1743 if (family != 6)
1744 return 0;
1745
1746 switch (model) {
1747 case 0x3F: /* HSW Xeon */
1748 return 1;
1749 default:
1750 return 0;
1751 }
1752}
1753
1754static void
1755dump_cstate_pstate_config_info(family, model)
1756{
1757 if (!do_nhm_platform_info)
1758 return;
1759
1760 dump_nhm_platform_info();
1761
1762 if (has_hsw_turbo_ratio_limit(family, model))
1763 dump_hsw_turbo_ratio_limits();
1764
1765 if (has_ivt_turbo_ratio_limit(family, model))
1766 dump_ivt_turbo_ratio_limits();
1767
1768 if (has_nhm_turbo_ratio_limit(family, model))
1769 dump_nhm_turbo_ratio_limits();
1770
1771 dump_nhm_cst_cfg();
1772}
1773
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1774
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1775/*
1776 * print_epb()
1777 * Decode the ENERGY_PERF_BIAS MSR
1778 */
1779int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1780{
1781 unsigned long long msr;
1782 char *epb_string;
1783 int cpu;
1784
1785 if (!has_epb)
1786 return 0;
1787
1788 cpu = t->cpu_id;
1789
1790 /* EPB is per-package */
1791 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1792 return 0;
1793
1794 if (cpu_migrate(cpu)) {
1795 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
1796 return -1;
1797 }
1798
1799 if (get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr))
1800 return 0;
1801
1802 switch (msr & 0x7) {
1803 case ENERGY_PERF_BIAS_PERFORMANCE:
1804 epb_string = "performance";
1805 break;
1806 case ENERGY_PERF_BIAS_NORMAL:
1807 epb_string = "balanced";
1808 break;
1809 case ENERGY_PERF_BIAS_POWERSAVE:
1810 epb_string = "powersave";
1811 break;
1812 default:
1813 epb_string = "custom";
1814 break;
1815 }
1816 fprintf(stderr, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu, msr, epb_string);
1817
1818 return 0;
1819}
1820
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]1821/*
1822 * print_perf_limit()
1823 */
1824int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1825{
1826 unsigned long long msr;
1827 int cpu;
1828
1829 cpu = t->cpu_id;
1830
1831 /* per-package */
1832 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1833 return 0;
1834
1835 if (cpu_migrate(cpu)) {
1836 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
1837 return -1;
1838 }
1839
1840 if (do_core_perf_limit_reasons) {
1841 get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
1842 fprintf(stderr, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
1843 fprintf(stderr, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
Len Browne33cbe82015-03-13 16:30:57 -0400[diff] [blame]1844 (msr & 1 << 15) ? "bit15, " : "",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]1845 (msr & 1 << 14) ? "bit14, " : "",
Len Browne33cbe82015-03-13 16:30:57 -0400[diff] [blame]1846 (msr & 1 << 13) ? "Transitions, " : "",
1847 (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
1848 (msr & 1 << 11) ? "PkgPwrL2, " : "",
1849 (msr & 1 << 10) ? "PkgPwrL1, " : "",
1850 (msr & 1 << 9) ? "CorePwr, " : "",
1851 (msr & 1 << 8) ? "Amps, " : "",
1852 (msr & 1 << 6) ? "VR-Therm, " : "",
1853 (msr & 1 << 5) ? "Auto-HWP, " : "",
1854 (msr & 1 << 4) ? "Graphics, " : "",
1855 (msr & 1 << 2) ? "bit2, " : "",
1856 (msr & 1 << 1) ? "ThermStatus, " : "",
1857 (msr & 1 << 0) ? "PROCHOT, " : "");
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]1858 fprintf(stderr, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
Len Browne33cbe82015-03-13 16:30:57 -0400[diff] [blame]1859 (msr & 1 << 31) ? "bit31, " : "",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]1860 (msr & 1 << 30) ? "bit30, " : "",
Len Browne33cbe82015-03-13 16:30:57 -0400[diff] [blame]1861 (msr & 1 << 29) ? "Transitions, " : "",
1862 (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
1863 (msr & 1 << 27) ? "PkgPwrL2, " : "",
1864 (msr & 1 << 26) ? "PkgPwrL1, " : "",
1865 (msr & 1 << 25) ? "CorePwr, " : "",
1866 (msr & 1 << 24) ? "Amps, " : "",
1867 (msr & 1 << 22) ? "VR-Therm, " : "",
1868 (msr & 1 << 21) ? "Auto-HWP, " : "",
1869 (msr & 1 << 20) ? "Graphics, " : "",
1870 (msr & 1 << 18) ? "bit18, " : "",
1871 (msr & 1 << 17) ? "ThermStatus, " : "",
1872 (msr & 1 << 16) ? "PROCHOT, " : "");
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]1873
1874 }
1875 if (do_gfx_perf_limit_reasons) {
1876 get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
1877 fprintf(stderr, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
1878 fprintf(stderr, " (Active: %s%s%s%s%s%s%s%s)",
1879 (msr & 1 << 0) ? "PROCHOT, " : "",
1880 (msr & 1 << 1) ? "ThermStatus, " : "",
1881 (msr & 1 << 4) ? "Graphics, " : "",
1882 (msr & 1 << 6) ? "VR-Therm, " : "",
1883 (msr & 1 << 8) ? "Amps, " : "",
1884 (msr & 1 << 9) ? "GFXPwr, " : "",
1885 (msr & 1 << 10) ? "PkgPwrL1, " : "",
1886 (msr & 1 << 11) ? "PkgPwrL2, " : "");
1887 fprintf(stderr, " (Logged: %s%s%s%s%s%s%s%s)\n",
1888 (msr & 1 << 16) ? "PROCHOT, " : "",
1889 (msr & 1 << 17) ? "ThermStatus, " : "",
1890 (msr & 1 << 20) ? "Graphics, " : "",
1891 (msr & 1 << 22) ? "VR-Therm, " : "",
1892 (msr & 1 << 24) ? "Amps, " : "",
1893 (msr & 1 << 25) ? "GFXPwr, " : "",
1894 (msr & 1 << 26) ? "PkgPwrL1, " : "",
1895 (msr & 1 << 27) ? "PkgPwrL2, " : "");
1896 }
1897 if (do_ring_perf_limit_reasons) {
1898 get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
1899 fprintf(stderr, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
1900 fprintf(stderr, " (Active: %s%s%s%s%s%s)",
1901 (msr & 1 << 0) ? "PROCHOT, " : "",
1902 (msr & 1 << 1) ? "ThermStatus, " : "",
1903 (msr & 1 << 6) ? "VR-Therm, " : "",
1904 (msr & 1 << 8) ? "Amps, " : "",
1905 (msr & 1 << 10) ? "PkgPwrL1, " : "",
1906 (msr & 1 << 11) ? "PkgPwrL2, " : "");
1907 fprintf(stderr, " (Logged: %s%s%s%s%s%s)\n",
1908 (msr & 1 << 16) ? "PROCHOT, " : "",
1909 (msr & 1 << 17) ? "ThermStatus, " : "",
1910 (msr & 1 << 22) ? "VR-Therm, " : "",
1911 (msr & 1 << 24) ? "Amps, " : "",
1912 (msr & 1 << 26) ? "PkgPwrL1, " : "",
1913 (msr & 1 << 27) ? "PkgPwrL2, " : "");
1914 }
1915 return 0;
1916}
1917
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1918#define RAPL_POWER_GRANULARITY 0x7FFF /* 15 bit power granularity */
1919#define RAPL_TIME_GRANULARITY 0x3F /* 6 bit time granularity */
1920
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1921double get_tdp(model)
1922{
1923 unsigned long long msr;
1924
1925 if (do_rapl & RAPL_PKG_POWER_INFO)
1926 if (!get_msr(0, MSR_PKG_POWER_INFO, &msr))
1927 return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
1928
1929 switch (model) {
1930 case 0x37:
1931 case 0x4D:
1932 return 30.0;
1933 default:
1934 return 135.0;
1935 }
1936}
1937
1938
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1939/*
1940 * rapl_probe()
1941 *
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1942 * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1943 */
1944void rapl_probe(unsigned int family, unsigned int model)
1945{
1946 unsigned long long msr;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1947 unsigned int time_unit;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1948 double tdp;
1949
1950 if (!genuine_intel)
1951 return;
1952
1953 if (family != 6)
1954 return;
1955
1956 switch (model) {
1957 case 0x2A:
1958 case 0x3A:
Len Brown70b43402013-01-08 01:26:07 -0500[diff] [blame]1959 case 0x3C: /* HSW */
Len Brown70b43402013-01-08 01:26:07 -0500[diff] [blame]1960 case 0x45: /* HSW */
Len Brown149c2312013-03-15 10:58:02 -0400[diff] [blame]1961 case 0x46: /* HSW */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]1962 case 0x3D: /* BDW */
Len Brown48a06312015-02-10 15:38:04 -0500[diff] [blame]1963 case 0x47: /* BDW */
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1964 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1965 break;
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]1966 case 0x4E: /* SKL */
1967 case 0x5E: /* SKL */
1968 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
1969 break;
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]1970 case 0x3F: /* HSX */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]1971 case 0x4F: /* BDX */
1972 case 0x56: /* BDX-DE */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]1973 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]1974 break;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1975 case 0x2D:
1976 case 0x3E:
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]1977 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1978 break;
1979 case 0x37: /* BYT */
1980 case 0x4D: /* AVN */
1981 do_rapl = RAPL_PKG | RAPL_CORES ;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1982 break;
1983 default:
1984 return;
1985 }
1986
1987 /* units on package 0, verify later other packages match */
1988 if (get_msr(0, MSR_RAPL_POWER_UNIT, &msr))
1989 return;
1990
1991 rapl_power_units = 1.0 / (1 << (msr & 0xF));
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1992 if (model == 0x37)
1993 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
1994 else
1995 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1996
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1997 time_unit = msr >> 16 & 0xF;
1998 if (time_unit == 0)
1999 time_unit = 0xA;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2000
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2001 rapl_time_units = 1.0 / (1 << (time_unit));
2002
2003 tdp = get_tdp(model);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2004
2005 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2006 if (debug)
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2007 fprintf(stderr, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2008
2009 return;
2010}
2011
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2012void perf_limit_reasons_probe(family, model)
2013{
2014 if (!genuine_intel)
2015 return;
2016
2017 if (family != 6)
2018 return;
2019
2020 switch (model) {
2021 case 0x3C: /* HSW */
2022 case 0x45: /* HSW */
2023 case 0x46: /* HSW */
2024 do_gfx_perf_limit_reasons = 1;
2025 case 0x3F: /* HSX */
2026 do_core_perf_limit_reasons = 1;
2027 do_ring_perf_limit_reasons = 1;
2028 default:
2029 return;
2030 }
2031}
2032
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2033int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2034{
2035 unsigned long long msr;
2036 unsigned int dts;
2037 int cpu;
2038
2039 if (!(do_dts || do_ptm))
2040 return 0;
2041
2042 cpu = t->cpu_id;
2043
2044 /* DTS is per-core, no need to print for each thread */
2045 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
2046 return 0;
2047
2048 if (cpu_migrate(cpu)) {
2049 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
2050 return -1;
2051 }
2052
2053 if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
2054 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
2055 return 0;
2056
2057 dts = (msr >> 16) & 0x7F;
2058 fprintf(stderr, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
2059 cpu, msr, tcc_activation_temp - dts);
2060
2061#ifdef THERM_DEBUG
2062 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
2063 return 0;
2064
2065 dts = (msr >> 16) & 0x7F;
2066 dts2 = (msr >> 8) & 0x7F;
2067 fprintf(stderr, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
2068 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
2069#endif
2070 }
2071
2072
2073 if (do_dts) {
2074 unsigned int resolution;
2075
2076 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
2077 return 0;
2078
2079 dts = (msr >> 16) & 0x7F;
2080 resolution = (msr >> 27) & 0xF;
2081 fprintf(stderr, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
2082 cpu, msr, tcc_activation_temp - dts, resolution);
2083
2084#ifdef THERM_DEBUG
2085 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
2086 return 0;
2087
2088 dts = (msr >> 16) & 0x7F;
2089 dts2 = (msr >> 8) & 0x7F;
2090 fprintf(stderr, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
2091 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
2092#endif
2093 }
2094
2095 return 0;
2096}
2097
2098void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
2099{
2100 fprintf(stderr, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
2101 cpu, label,
2102 ((msr >> 15) & 1) ? "EN" : "DIS",
2103 ((msr >> 0) & 0x7FFF) * rapl_power_units,
2104 (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
2105 (((msr >> 16) & 1) ? "EN" : "DIS"));
2106
2107 return;
2108}
2109
2110int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2111{
2112 unsigned long long msr;
2113 int cpu;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2114
2115 if (!do_rapl)
2116 return 0;
2117
2118 /* RAPL counters are per package, so print only for 1st thread/package */
2119 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2120 return 0;
2121
2122 cpu = t->cpu_id;
2123 if (cpu_migrate(cpu)) {
2124 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
2125 return -1;
2126 }
2127
2128 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
2129 return -1;
2130
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2131 if (debug) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2132 fprintf(stderr, "cpu%d: MSR_RAPL_POWER_UNIT: 0x%08llx "
2133 "(%f Watts, %f Joules, %f sec.)\n", cpu, msr,
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2134 rapl_power_units, rapl_energy_units, rapl_time_units);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2135 }
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2136 if (do_rapl & RAPL_PKG_POWER_INFO) {
2137
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2138 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
2139 return -5;
2140
2141
2142 fprintf(stderr, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
2143 cpu, msr,
2144 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2145 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2146 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2147 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
2148
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2149 }
2150 if (do_rapl & RAPL_PKG) {
2151
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2152 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
2153 return -9;
2154
2155 fprintf(stderr, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
2156 cpu, msr, (msr >> 63) & 1 ? "": "UN");
2157
2158 print_power_limit_msr(cpu, msr, "PKG Limit #1");
2159 fprintf(stderr, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
2160 cpu,
2161 ((msr >> 47) & 1) ? "EN" : "DIS",
2162 ((msr >> 32) & 0x7FFF) * rapl_power_units,
2163 (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
2164 ((msr >> 48) & 1) ? "EN" : "DIS");
2165 }
2166
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]2167 if (do_rapl & RAPL_DRAM_POWER_INFO) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2168 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
2169 return -6;
2170
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2171 fprintf(stderr, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
2172 cpu, msr,
2173 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2174 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2175 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2176 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]2177 }
2178 if (do_rapl & RAPL_DRAM) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2179 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
2180 return -9;
2181 fprintf(stderr, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
2182 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2183
2184 print_power_limit_msr(cpu, msr, "DRAM Limit");
2185 }
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2186 if (do_rapl & RAPL_CORE_POLICY) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2187 if (debug) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2188 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
2189 return -7;
2190
2191 fprintf(stderr, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2192 }
2193 }
2194 if (do_rapl & RAPL_CORES) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2195 if (debug) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2196
2197 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
2198 return -9;
2199 fprintf(stderr, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
2200 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2201 print_power_limit_msr(cpu, msr, "Cores Limit");
2202 }
2203 }
2204 if (do_rapl & RAPL_GFX) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2205 if (debug) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2206 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
2207 return -8;
2208
2209 fprintf(stderr, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
2210
2211 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
2212 return -9;
2213 fprintf(stderr, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
2214 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2215 print_power_limit_msr(cpu, msr, "GFX Limit");
2216 }
2217 }
2218 return 0;
2219}
2220
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2221/*
2222 * SNB adds support for additional MSRs:
2223 *
2224 * MSR_PKG_C7_RESIDENCY 0x000003fa
2225 * MSR_CORE_C7_RESIDENCY 0x000003fe
2226 * MSR_PKG_C2_RESIDENCY 0x0000060d
2227 */
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2228
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2229int has_snb_msrs(unsigned int family, unsigned int model)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2230{
2231 if (!genuine_intel)
2232 return 0;
2233
2234 switch (model) {
2235 case 0x2A:
2236 case 0x2D:
Len Brown650a37f2012-06-03 23:34:44 -0400[diff] [blame]2237 case 0x3A: /* IVB */
Len Brown13006512012-09-26 18:11:31 -0400[diff] [blame]2238 case 0x3E: /* IVB Xeon */
Len Brown70b43402013-01-08 01:26:07 -0500[diff] [blame]2239 case 0x3C: /* HSW */
2240 case 0x3F: /* HSW */
2241 case 0x45: /* HSW */
Len Brown149c2312013-03-15 10:58:02 -0400[diff] [blame]2242 case 0x46: /* HSW */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]2243 case 0x3D: /* BDW */
Len Brown48a06312015-02-10 15:38:04 -0500[diff] [blame]2244 case 0x47: /* BDW */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]2245 case 0x4F: /* BDX */
2246 case 0x56: /* BDX-DE */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]2247 case 0x4E: /* SKL */
2248 case 0x5E: /* SKL */
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2249 return 1;
2250 }
2251 return 0;
2252}
2253
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2254/*
2255 * HSW adds support for additional MSRs:
2256 *
2257 * MSR_PKG_C8_RESIDENCY 0x00000630
2258 * MSR_PKG_C9_RESIDENCY 0x00000631
2259 * MSR_PKG_C10_RESIDENCY 0x00000632
2260 */
2261int has_hsw_msrs(unsigned int family, unsigned int model)
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]2262{
2263 if (!genuine_intel)
2264 return 0;
2265
2266 switch (model) {
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]2267 case 0x45: /* HSW */
2268 case 0x3D: /* BDW */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]2269 case 0x4E: /* SKL */
2270 case 0x5E: /* SKL */
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]2271 return 1;
2272 }
2273 return 0;
2274}
2275
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]2276/*
2277 * SKL adds support for additional MSRS:
2278 *
2279 * MSR_PKG_WEIGHTED_CORE_C0_RES 0x00000658
2280 * MSR_PKG_ANY_CORE_C0_RES 0x00000659
2281 * MSR_PKG_ANY_GFXE_C0_RES 0x0000065A
2282 * MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B
2283 */
2284int has_skl_msrs(unsigned int family, unsigned int model)
2285{
2286 if (!genuine_intel)
2287 return 0;
2288
2289 switch (model) {
2290 case 0x4E: /* SKL */
2291 case 0x5E: /* SKL */
2292 return 1;
2293 }
2294 return 0;
2295}
2296
2297
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]2298
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2299int is_slm(unsigned int family, unsigned int model)
2300{
2301 if (!genuine_intel)
2302 return 0;
2303 switch (model) {
2304 case 0x37: /* BYT */
2305 case 0x4D: /* AVN */
2306 return 1;
2307 }
2308 return 0;
2309}
2310
2311#define SLM_BCLK_FREQS 5
2312double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
2313
2314double slm_bclk(void)
2315{
2316 unsigned long long msr = 3;
2317 unsigned int i;
2318 double freq;
2319
2320 if (get_msr(0, MSR_FSB_FREQ, &msr))
2321 fprintf(stderr, "SLM BCLK: unknown\n");
2322
2323 i = msr & 0xf;
2324 if (i >= SLM_BCLK_FREQS) {
2325 fprintf(stderr, "SLM BCLK[%d] invalid\n", i);
2326 msr = 3;
2327 }
2328 freq = slm_freq_table[i];
2329
2330 fprintf(stderr, "SLM BCLK: %.1f Mhz\n", freq);
2331
2332 return freq;
2333}
2334
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2335double discover_bclk(unsigned int family, unsigned int model)
2336{
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2337 if (has_snb_msrs(family, model))
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2338 return 100.00;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2339 else if (is_slm(family, model))
2340 return slm_bclk();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2341 else
2342 return 133.33;
2343}
2344
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2345/*
2346 * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
2347 * the Thermal Control Circuit (TCC) activates.
2348 * This is usually equal to tjMax.
2349 *
2350 * Older processors do not have this MSR, so there we guess,
2351 * but also allow cmdline over-ride with -T.
2352 *
2353 * Several MSR temperature values are in units of degrees-C
2354 * below this value, including the Digital Thermal Sensor (DTS),
2355 * Package Thermal Management Sensor (PTM), and thermal event thresholds.
2356 */
2357int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2358{
2359 unsigned long long msr;
2360 unsigned int target_c_local;
2361 int cpu;
2362
2363 /* tcc_activation_temp is used only for dts or ptm */
2364 if (!(do_dts || do_ptm))
2365 return 0;
2366
2367 /* this is a per-package concept */
2368 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2369 return 0;
2370
2371 cpu = t->cpu_id;
2372 if (cpu_migrate(cpu)) {
2373 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
2374 return -1;
2375 }
2376
2377 if (tcc_activation_temp_override != 0) {
2378 tcc_activation_temp = tcc_activation_temp_override;
2379 fprintf(stderr, "cpu%d: Using cmdline TCC Target (%d C)\n",
2380 cpu, tcc_activation_temp);
2381 return 0;
2382 }
2383
2384 /* Temperature Target MSR is Nehalem and newer only */
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2385 if (!do_nhm_platform_info)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2386 goto guess;
2387
2388 if (get_msr(0, MSR_IA32_TEMPERATURE_TARGET, &msr))
2389 goto guess;
2390
Jean Delvare34821242014-05-01 11:40:19 +0200[diff] [blame]2391 target_c_local = (msr >> 16) & 0xFF;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2392
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2393 if (debug)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2394 fprintf(stderr, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
2395 cpu, msr, target_c_local);
2396
Jean Delvare34821242014-05-01 11:40:19 +0200[diff] [blame]2397 if (!target_c_local)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2398 goto guess;
2399
2400 tcc_activation_temp = target_c_local;
2401
2402 return 0;
2403
2404guess:
2405 tcc_activation_temp = TJMAX_DEFAULT;
2406 fprintf(stderr, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
2407 cpu, tcc_activation_temp);
2408
2409 return 0;
2410}
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2411void process_cpuid()
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2412{
2413 unsigned int eax, ebx, ecx, edx, max_level;
2414 unsigned int fms, family, model, stepping;
2415
2416 eax = ebx = ecx = edx = 0;
2417
Josh Triplett2b928652013-08-20 17:20:14 -0700[diff] [blame]2418 __get_cpuid(0, &max_level, &ebx, &ecx, &edx);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2419
2420 if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e)
2421 genuine_intel = 1;
2422
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2423 if (debug)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2424 fprintf(stderr, "CPUID(0): %.4s%.4s%.4s ",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2425 (char *)&ebx, (char *)&edx, (char *)&ecx);
2426
Josh Triplett2b928652013-08-20 17:20:14 -0700[diff] [blame]2427 __get_cpuid(1, &fms, &ebx, &ecx, &edx);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2428 family = (fms >> 8) & 0xf;
2429 model = (fms >> 4) & 0xf;
2430 stepping = fms & 0xf;
2431 if (family == 6 || family == 0xf)
2432 model += ((fms >> 16) & 0xf) << 4;
2433
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2434 if (debug)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2435 fprintf(stderr, "%d CPUID levels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
2436 max_level, family, model, stepping, family, model, stepping);
2437
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]2438 if (!(edx & (1 << 5)))
2439 errx(1, "CPUID: no MSR");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2440
2441 /*
2442 * check max extended function levels of CPUID.
2443 * This is needed to check for invariant TSC.
2444 * This check is valid for both Intel and AMD.
2445 */
2446 ebx = ecx = edx = 0;
Josh Triplett2b928652013-08-20 17:20:14 -0700[diff] [blame]2447 __get_cpuid(0x80000000, &max_level, &ebx, &ecx, &edx);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2448
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2449 if (max_level >= 0x80000007) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2450
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2451 /*
2452 * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
2453 * this check is valid for both Intel and AMD
2454 */
2455 __get_cpuid(0x80000007, &eax, &ebx, &ecx, &edx);
2456 has_invariant_tsc = edx & (1 << 8);
2457 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2458
2459 /*
2460 * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
2461 * this check is valid for both Intel and AMD
2462 */
2463
Josh Triplett2b928652013-08-20 17:20:14 -0700[diff] [blame]2464 __get_cpuid(0x6, &eax, &ebx, &ecx, &edx);
Thomas Renninger8209e052011-01-21 15:11:19 +0100[diff] [blame]2465 has_aperf = ecx & (1 << 0);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2466 do_dts = eax & (1 << 0);
2467 do_ptm = eax & (1 << 6);
2468 has_epb = ecx & (1 << 3);
2469
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2470 if (debug)
Len Browna7296172015-01-23 01:33:58 -0500[diff] [blame]2471 fprintf(stderr, "CPUID(6): %sAPERF, %sDTS, %sPTM, %sEPB\n",
2472 has_aperf ? "" : "No ",
2473 do_dts ? "" : "No ",
2474 do_ptm ? "" : "No ",
2475 has_epb ? "" : "No ");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2476
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2477 do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model);
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2478 do_snb_cstates = has_snb_msrs(family, model);
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2479 do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2);
2480 do_pc3 = (pkg_cstate_limit >= PCL__3);
2481 do_pc6 = (pkg_cstate_limit >= PCL__6);
2482 do_pc7 = do_snb_cstates && (pkg_cstate_limit >= PCL__7);
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2483 do_c8_c9_c10 = has_hsw_msrs(family, model);
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame^]2484 do_skl_residency = has_skl_msrs(family, model);
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2485 do_slm_cstates = is_slm(family, model);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2486 bclk = discover_bclk(family, model);
2487
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2488 rapl_probe(family, model);
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2489 perf_limit_reasons_probe(family, model);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2490
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2491 if (debug)
2492 dump_cstate_pstate_config_info();
2493
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2494 return;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2495}
2496
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2497void help()
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2498{
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2499 fprintf(stderr,
2500 "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
2501 "\n"
2502 "Turbostat forks the specified COMMAND and prints statistics\n"
2503 "when COMMAND completes.\n"
2504 "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
2505 "to print statistics, until interrupted.\n"
2506 "--debug run in \"debug\" mode\n"
2507 "--interval sec Override default 5-second measurement interval\n"
2508 "--help print this help message\n"
2509 "--counter msr print 32-bit counter at address \"msr\"\n"
2510 "--Counter msr print 64-bit Counter at address \"msr\"\n"
2511 "--msr msr print 32-bit value at address \"msr\"\n"
2512 "--MSR msr print 64-bit Value at address \"msr\"\n"
2513 "--version print version information\n"
2514 "\n"
2515 "For more help, run \"man turbostat\"\n");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2516}
2517
2518
2519/*
2520 * in /dev/cpu/ return success for names that are numbers
2521 * ie. filter out ".", "..", "microcode".
2522 */
2523int dir_filter(const struct dirent *dirp)
2524{
2525 if (isdigit(dirp->d_name[0]))
2526 return 1;
2527 else
2528 return 0;
2529}
2530
2531int open_dev_cpu_msr(int dummy1)
2532{
2533 return 0;
2534}
2535
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2536void topology_probe()
2537{
2538 int i;
2539 int max_core_id = 0;
2540 int max_package_id = 0;
2541 int max_siblings = 0;
2542 struct cpu_topology {
2543 int core_id;
2544 int physical_package_id;
2545 } *cpus;
2546
2547 /* Initialize num_cpus, max_cpu_num */
2548 topo.num_cpus = 0;
2549 topo.max_cpu_num = 0;
2550 for_all_proc_cpus(count_cpus);
2551 if (!summary_only && topo.num_cpus > 1)
2552 show_cpu = 1;
2553
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2554 if (debug > 1)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2555 fprintf(stderr, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
2556
2557 cpus = calloc(1, (topo.max_cpu_num + 1) * sizeof(struct cpu_topology));
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]2558 if (cpus == NULL)
2559 err(1, "calloc cpus");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2560
2561 /*
2562 * Allocate and initialize cpu_present_set
2563 */
2564 cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]2565 if (cpu_present_set == NULL)
2566 err(3, "CPU_ALLOC");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2567 cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
2568 CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
2569 for_all_proc_cpus(mark_cpu_present);
2570
2571 /*
2572 * Allocate and initialize cpu_affinity_set
2573 */
2574 cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]2575 if (cpu_affinity_set == NULL)
2576 err(3, "CPU_ALLOC");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2577 cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
2578 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
2579
2580
2581 /*
2582 * For online cpus
2583 * find max_core_id, max_package_id
2584 */
2585 for (i = 0; i <= topo.max_cpu_num; ++i) {
2586 int siblings;
2587
2588 if (cpu_is_not_present(i)) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2589 if (debug > 1)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2590 fprintf(stderr, "cpu%d NOT PRESENT\n", i);
2591 continue;
2592 }
2593 cpus[i].core_id = get_core_id(i);
2594 if (cpus[i].core_id > max_core_id)
2595 max_core_id = cpus[i].core_id;
2596
2597 cpus[i].physical_package_id = get_physical_package_id(i);
2598 if (cpus[i].physical_package_id > max_package_id)
2599 max_package_id = cpus[i].physical_package_id;
2600
2601 siblings = get_num_ht_siblings(i);
2602 if (siblings > max_siblings)
2603 max_siblings = siblings;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2604 if (debug > 1)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2605 fprintf(stderr, "cpu %d pkg %d core %d\n",
2606 i, cpus[i].physical_package_id, cpus[i].core_id);
2607 }
2608 topo.num_cores_per_pkg = max_core_id + 1;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2609 if (debug > 1)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2610 fprintf(stderr, "max_core_id %d, sizing for %d cores per package\n",
2611 max_core_id, topo.num_cores_per_pkg);
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]2612 if (debug && !summary_only && topo.num_cores_per_pkg > 1)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2613 show_core = 1;
2614
2615 topo.num_packages = max_package_id + 1;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2616 if (debug > 1)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2617 fprintf(stderr, "max_package_id %d, sizing for %d packages\n",
2618 max_package_id, topo.num_packages);
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]2619 if (debug && !summary_only && topo.num_packages > 1)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2620 show_pkg = 1;
2621
2622 topo.num_threads_per_core = max_siblings;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2623 if (debug > 1)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2624 fprintf(stderr, "max_siblings %d\n", max_siblings);
2625
2626 free(cpus);
2627}
2628
2629void
2630allocate_counters(struct thread_data **t, struct core_data **c, struct pkg_data **p)
2631{
2632 int i;
2633
2634 *t = calloc(topo.num_threads_per_core * topo.num_cores_per_pkg *
2635 topo.num_packages, sizeof(struct thread_data));
2636 if (*t == NULL)
2637 goto error;
2638
2639 for (i = 0; i < topo.num_threads_per_core *
2640 topo.num_cores_per_pkg * topo.num_packages; i++)
2641 (*t)[i].cpu_id = -1;
2642
2643 *c = calloc(topo.num_cores_per_pkg * topo.num_packages,
2644 sizeof(struct core_data));
2645 if (*c == NULL)
2646 goto error;
2647
2648 for (i = 0; i < topo.num_cores_per_pkg * topo.num_packages; i++)
2649 (*c)[i].core_id = -1;
2650
2651 *p = calloc(topo.num_packages, sizeof(struct pkg_data));
2652 if (*p == NULL)
2653 goto error;
2654
2655 for (i = 0; i < topo.num_packages; i++)
2656 (*p)[i].package_id = i;
2657
2658 return;
2659error:
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]2660 err(1, "calloc counters");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2661}
2662/*
2663 * init_counter()
2664 *
2665 * set cpu_id, core_num, pkg_num
2666 * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
2667 *
2668 * increment topo.num_cores when 1st core in pkg seen
2669 */
2670void init_counter(struct thread_data *thread_base, struct core_data *core_base,
2671 struct pkg_data *pkg_base, int thread_num, int core_num,
2672 int pkg_num, int cpu_id)
2673{
2674 struct thread_data *t;
2675 struct core_data *c;
2676 struct pkg_data *p;
2677
2678 t = GET_THREAD(thread_base, thread_num, core_num, pkg_num);
2679 c = GET_CORE(core_base, core_num, pkg_num);
2680 p = GET_PKG(pkg_base, pkg_num);
2681
2682 t->cpu_id = cpu_id;
2683 if (thread_num == 0) {
2684 t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
2685 if (cpu_is_first_core_in_package(cpu_id))
2686 t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
2687 }
2688
2689 c->core_id = core_num;
2690 p->package_id = pkg_num;
2691}
2692
2693
2694int initialize_counters(int cpu_id)
2695{
2696 int my_thread_id, my_core_id, my_package_id;
2697
2698 my_package_id = get_physical_package_id(cpu_id);
2699 my_core_id = get_core_id(cpu_id);
2700
2701 if (cpu_is_first_sibling_in_core(cpu_id)) {
2702 my_thread_id = 0;
2703 topo.num_cores++;
2704 } else {
2705 my_thread_id = 1;
2706 }
2707
2708 init_counter(EVEN_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
2709 init_counter(ODD_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
2710 return 0;
2711}
2712
2713void allocate_output_buffer()
2714{
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]2715 output_buffer = calloc(1, (1 + topo.num_cpus) * 1024);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2716 outp = output_buffer;
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]2717 if (outp == NULL)
2718 err(-1, "calloc output buffer");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2719}
2720
2721void setup_all_buffers(void)
2722{
2723 topology_probe();
2724 allocate_counters(&thread_even, &core_even, &package_even);
2725 allocate_counters(&thread_odd, &core_odd, &package_odd);
2726 allocate_output_buffer();
2727 for_all_proc_cpus(initialize_counters);
2728}
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]2729
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2730void turbostat_init()
2731{
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2732 check_dev_msr();
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]2733 check_permissions();
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2734 process_cpuid();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2735
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2736 setup_all_buffers();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2737
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2738 if (debug)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2739 for_all_cpus(print_epb, ODD_COUNTERS);
2740
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2741 if (debug)
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2742 for_all_cpus(print_perf_limit, ODD_COUNTERS);
2743
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2744 if (debug)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2745 for_all_cpus(print_rapl, ODD_COUNTERS);
2746
2747 for_all_cpus(set_temperature_target, ODD_COUNTERS);
2748
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2749 if (debug)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2750 for_all_cpus(print_thermal, ODD_COUNTERS);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2751}
2752
2753int fork_it(char **argv)
2754{
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2755 pid_t child_pid;
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]2756 int status;
Len Brownd15cf7c2012-06-03 23:24:00 -0400[diff] [blame]2757
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]2758 status = for_all_cpus(get_counters, EVEN_COUNTERS);
2759 if (status)
2760 exit(status);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2761 /* clear affinity side-effect of get_counters() */
2762 sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2763 gettimeofday(&tv_even, (struct timezone *)NULL);
2764
2765 child_pid = fork();
2766 if (!child_pid) {
2767 /* child */
2768 execvp(argv[0], argv);
2769 } else {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2770
2771 /* parent */
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]2772 if (child_pid == -1)
2773 err(1, "fork");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2774
2775 signal(SIGINT, SIG_IGN);
2776 signal(SIGQUIT, SIG_IGN);
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]2777 if (waitpid(child_pid, &status, 0) == -1)
2778 err(status, "waitpid");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2779 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2780 /*
2781 * n.b. fork_it() does not check for errors from for_all_cpus()
2782 * because re-starting is problematic when forking
2783 */
2784 for_all_cpus(get_counters, ODD_COUNTERS);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2785 gettimeofday(&tv_odd, (struct timezone *)NULL);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2786 timersub(&tv_odd, &tv_even, &tv_delta);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2787 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
2788 compute_average(EVEN_COUNTERS);
2789 format_all_counters(EVEN_COUNTERS);
2790 flush_stderr();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2791
Justin P. Mattock6eab04a2011-04-08 19:49:08 -0700[diff] [blame]2792 fprintf(stderr, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2793
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]2794 return status;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2795}
2796
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]2797int get_and_dump_counters(void)
2798{
2799 int status;
2800
2801 status = for_all_cpus(get_counters, ODD_COUNTERS);
2802 if (status)
2803 return status;
2804
2805 status = for_all_cpus(dump_counters, ODD_COUNTERS);
2806 if (status)
2807 return status;
2808
2809 flush_stdout();
2810
2811 return status;
2812}
2813
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2814void print_version() {
Len Browna21d38c2015-03-24 16:37:35 -0400[diff] [blame]2815 fprintf(stderr, "turbostat version 4.3 24 Mar, 2015"
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2816 " - Len Brown <lenb@kernel.org>\n");
2817}
2818
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2819void cmdline(int argc, char **argv)
2820{
2821 int opt;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2822 int option_index = 0;
2823 static struct option long_options[] = {
2824 {"Counter", required_argument, 0, 'C'},
2825 {"counter", required_argument, 0, 'c'},
2826 {"Dump", no_argument, 0, 'D'},
2827 {"debug", no_argument, 0, 'd'},
2828 {"interval", required_argument, 0, 'i'},
2829 {"help", no_argument, 0, 'h'},
2830 {"Joules", no_argument, 0, 'J'},
2831 {"MSR", required_argument, 0, 'M'},
2832 {"msr", required_argument, 0, 'm'},
2833 {"Package", no_argument, 0, 'p'},
2834 {"processor", no_argument, 0, 'p'},
2835 {"Summary", no_argument, 0, 'S'},
2836 {"TCC", required_argument, 0, 'T'},
2837 {"version", no_argument, 0, 'v' },
2838 {0, 0, 0, 0 }
2839 };
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2840
2841 progname = argv[0];
2842
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2843 while ((opt = getopt_long_only(argc, argv, "C:c:Ddhi:JM:m:PpST:v",
2844 long_options, &option_index)) != -1) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2845 switch (opt) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2846 case 'C':
2847 sscanf(optarg, "%x", &extra_delta_offset64);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2848 break;
Len Brownf9240812012-10-06 15:26:31 -0400[diff] [blame]2849 case 'c':
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]2850 sscanf(optarg, "%x", &extra_delta_offset32);
2851 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2852 case 'D':
2853 dump_only++;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]2854 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2855 case 'd':
2856 debug++;
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]2857 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2858 case 'h':
2859 default:
2860 help();
2861 exit(1);
2862 case 'i':
2863 interval_sec = atoi(optarg);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2864 break;
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]2865 case 'J':
2866 rapl_joules++;
2867 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2868 case 'M':
2869 sscanf(optarg, "%x", &extra_msr_offset64);
2870 break;
2871 case 'm':
2872 sscanf(optarg, "%x", &extra_msr_offset32);
2873 break;
2874 case 'P':
2875 show_pkg_only++;
2876 break;
2877 case 'p':
2878 show_core_only++;
2879 break;
2880 case 'S':
2881 summary_only++;
2882 break;
2883 case 'T':
2884 tcc_activation_temp_override = atoi(optarg);
2885 break;
2886 case 'v':
2887 print_version();
2888 exit(0);
2889 break;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2890 }
2891 }
2892}
2893
2894int main(int argc, char **argv)
2895{
2896 cmdline(argc, argv);
2897
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2898 if (debug)
2899 print_version();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2900
2901 turbostat_init();
2902
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]2903 /* dump counters and exit */
2904 if (dump_only)
2905 return get_and_dump_counters();
2906
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2907 /*
2908 * if any params left, it must be a command to fork
2909 */
2910 if (argc - optind)
2911 return fork_it(argv + optind);
2912 else
2913 turbostat_loop();
2914
2915 return 0;
2916}