blob: 64a327009f2e23b3d8ad52df5fd86564ae1c6ea5 [file] [log] [blame]
Luciano Coelhof5fc0f82009-08-06 16:25:28 +03001/*
2 * This file is part of wl1271
3 *
4 * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
5 * Copyright (C) 2008-2009 Nokia Corporation
6 *
7 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25#ifndef __WL1271_H__
26#define __WL1271_H__
27
28#include <linux/mutex.h>
29#include <linux/completion.h>
30#include <linux/spinlock.h>
31#include <linux/list.h>
32#include <linux/bitops.h>
33#include <net/mac80211.h>
34
Juuso Oikarinen2b60100b2009-10-13 12:47:39 +030035#include "wl1271_conf.h"
36
Luciano Coelhof5fc0f82009-08-06 16:25:28 +030037#define DRIVER_NAME "wl1271"
38#define DRIVER_PREFIX DRIVER_NAME ": "
39
40enum {
41 DEBUG_NONE = 0,
42 DEBUG_IRQ = BIT(0),
43 DEBUG_SPI = BIT(1),
44 DEBUG_BOOT = BIT(2),
45 DEBUG_MAILBOX = BIT(3),
46 DEBUG_NETLINK = BIT(4),
47 DEBUG_EVENT = BIT(5),
48 DEBUG_TX = BIT(6),
49 DEBUG_RX = BIT(7),
50 DEBUG_SCAN = BIT(8),
51 DEBUG_CRYPT = BIT(9),
52 DEBUG_PSM = BIT(10),
53 DEBUG_MAC80211 = BIT(11),
54 DEBUG_CMD = BIT(12),
55 DEBUG_ACX = BIT(13),
56 DEBUG_ALL = ~0,
57};
58
59#define DEBUG_LEVEL (DEBUG_NONE)
60
61#define DEBUG_DUMP_LIMIT 1024
62
63#define wl1271_error(fmt, arg...) \
64 printk(KERN_ERR DRIVER_PREFIX "ERROR " fmt "\n", ##arg)
65
66#define wl1271_warning(fmt, arg...) \
67 printk(KERN_WARNING DRIVER_PREFIX "WARNING " fmt "\n", ##arg)
68
69#define wl1271_notice(fmt, arg...) \
70 printk(KERN_INFO DRIVER_PREFIX fmt "\n", ##arg)
71
72#define wl1271_info(fmt, arg...) \
73 printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg)
74
75#define wl1271_debug(level, fmt, arg...) \
76 do { \
77 if (level & DEBUG_LEVEL) \
78 printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg); \
79 } while (0)
80
81#define wl1271_dump(level, prefix, buf, len) \
82 do { \
83 if (level & DEBUG_LEVEL) \
84 print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
85 DUMP_PREFIX_OFFSET, 16, 1, \
86 buf, \
87 min_t(size_t, len, DEBUG_DUMP_LIMIT), \
88 0); \
89 } while (0)
90
91#define wl1271_dump_ascii(level, prefix, buf, len) \
92 do { \
93 if (level & DEBUG_LEVEL) \
94 print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
95 DUMP_PREFIX_OFFSET, 16, 1, \
96 buf, \
97 min_t(size_t, len, DEBUG_DUMP_LIMIT), \
98 true); \
99 } while (0)
100
101#define WL1271_DEFAULT_RX_CONFIG (CFG_UNI_FILTER_EN | \
Juuso Oikarinenc87dec92009-10-08 21:56:31 +0300102 CFG_BSSID_FILTER_EN | \
103 CFG_MC_FILTER_EN)
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300104
105#define WL1271_DEFAULT_RX_FILTER (CFG_RX_RCTS_ACK | CFG_RX_PRSP_EN | \
106 CFG_RX_MGMT_EN | CFG_RX_DATA_EN | \
107 CFG_RX_CTL_EN | CFG_RX_BCN_EN | \
108 CFG_RX_AUTH_EN | CFG_RX_ASSOC_EN)
109
Juuso Oikarinend94cd292009-10-08 21:56:25 +0300110#define WL1271_DEFAULT_BASIC_RATE_SET (ACX_RATE_MASK_ALL)
111
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300112#define WL1271_FW_NAME "wl1271-fw.bin"
113#define WL1271_NVS_NAME "wl1271-nvs.bin"
114
Juuso Oikarinen545f1da2009-10-08 21:56:23 +0300115/*
116 * FIXME: for the wl1271, a busy word count of 1 here will result in a more
117 * optimal SPI interface. There is some SPI bug however, causing RXS time outs
118 * with this mode occasionally on boot, so lets have two for now.
119 */
120#define WL1271_BUSY_WORD_CNT 2
121#define WL1271_BUSY_WORD_LEN (WL1271_BUSY_WORD_CNT * sizeof(u32))
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300122
123#define WL1271_ELP_HW_STATE_ASLEEP 0
124#define WL1271_ELP_HW_STATE_IRQ 1
125
Juuso Oikarinend94cd292009-10-08 21:56:25 +0300126#define WL1271_DEFAULT_BEACON_INT 100
127#define WL1271_DEFAULT_DTIM_PERIOD 1
128
Juuso Oikarinenc87dec92009-10-08 21:56:31 +0300129#define ACX_TX_DESCRIPTORS 32
Juuso Oikarinenbe7078c2009-10-08 21:56:26 +0300130
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300131enum wl1271_state {
132 WL1271_STATE_OFF,
133 WL1271_STATE_ON,
134 WL1271_STATE_PLT,
135};
136
137enum wl1271_partition_type {
138 PART_DOWN,
139 PART_WORK,
140 PART_DRPW,
141
142 PART_TABLE_LEN
143};
144
145struct wl1271_partition {
146 u32 size;
147 u32 start;
148};
149
150struct wl1271_partition_set {
151 struct wl1271_partition mem;
152 struct wl1271_partition reg;
Juuso Oikarinen451de972009-10-12 15:08:46 +0300153 struct wl1271_partition mem2;
154 struct wl1271_partition mem3;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300155};
156
157struct wl1271;
158
159/* FIXME: I'm not sure about this structure name */
160struct wl1271_chip {
161 u32 id;
162 char fw_ver[21];
163};
164
165struct wl1271_stats {
166 struct acx_statistics *fw_stats;
167 unsigned long fw_stats_update;
168
169 unsigned int retry_count;
170 unsigned int excessive_retries;
171};
172
173struct wl1271_debugfs {
174 struct dentry *rootdir;
175 struct dentry *fw_statistics;
176
177 struct dentry *tx_internal_desc_overflow;
178
179 struct dentry *rx_out_of_mem;
180 struct dentry *rx_hdr_overflow;
181 struct dentry *rx_hw_stuck;
182 struct dentry *rx_dropped;
183 struct dentry *rx_fcs_err;
184 struct dentry *rx_xfr_hint_trig;
185 struct dentry *rx_path_reset;
186 struct dentry *rx_reset_counter;
187
188 struct dentry *dma_rx_requested;
189 struct dentry *dma_rx_errors;
190 struct dentry *dma_tx_requested;
191 struct dentry *dma_tx_errors;
192
193 struct dentry *isr_cmd_cmplt;
194 struct dentry *isr_fiqs;
195 struct dentry *isr_rx_headers;
196 struct dentry *isr_rx_mem_overflow;
197 struct dentry *isr_rx_rdys;
198 struct dentry *isr_irqs;
199 struct dentry *isr_tx_procs;
200 struct dentry *isr_decrypt_done;
201 struct dentry *isr_dma0_done;
202 struct dentry *isr_dma1_done;
203 struct dentry *isr_tx_exch_complete;
204 struct dentry *isr_commands;
205 struct dentry *isr_rx_procs;
206 struct dentry *isr_hw_pm_mode_changes;
207 struct dentry *isr_host_acknowledges;
208 struct dentry *isr_pci_pm;
209 struct dentry *isr_wakeups;
210 struct dentry *isr_low_rssi;
211
212 struct dentry *wep_addr_key_count;
213 struct dentry *wep_default_key_count;
214 /* skipping wep.reserved */
215 struct dentry *wep_key_not_found;
216 struct dentry *wep_decrypt_fail;
217 struct dentry *wep_packets;
218 struct dentry *wep_interrupt;
219
220 struct dentry *pwr_ps_enter;
221 struct dentry *pwr_elp_enter;
222 struct dentry *pwr_missing_bcns;
223 struct dentry *pwr_wake_on_host;
224 struct dentry *pwr_wake_on_timer_exp;
225 struct dentry *pwr_tx_with_ps;
226 struct dentry *pwr_tx_without_ps;
227 struct dentry *pwr_rcvd_beacons;
228 struct dentry *pwr_power_save_off;
229 struct dentry *pwr_enable_ps;
230 struct dentry *pwr_disable_ps;
231 struct dentry *pwr_fix_tsf_ps;
232 /* skipping cont_miss_bcns_spread for now */
233 struct dentry *pwr_rcvd_awake_beacons;
234
235 struct dentry *mic_rx_pkts;
236 struct dentry *mic_calc_failure;
237
238 struct dentry *aes_encrypt_fail;
239 struct dentry *aes_decrypt_fail;
240 struct dentry *aes_encrypt_packets;
241 struct dentry *aes_decrypt_packets;
242 struct dentry *aes_encrypt_interrupt;
243 struct dentry *aes_decrypt_interrupt;
244
245 struct dentry *event_heart_beat;
246 struct dentry *event_calibration;
247 struct dentry *event_rx_mismatch;
248 struct dentry *event_rx_mem_empty;
249 struct dentry *event_rx_pool;
250 struct dentry *event_oom_late;
251 struct dentry *event_phy_transmit_error;
252 struct dentry *event_tx_stuck;
253
254 struct dentry *ps_pspoll_timeouts;
255 struct dentry *ps_upsd_timeouts;
256 struct dentry *ps_upsd_max_sptime;
257 struct dentry *ps_upsd_max_apturn;
258 struct dentry *ps_pspoll_max_apturn;
259 struct dentry *ps_pspoll_utilization;
260 struct dentry *ps_upsd_utilization;
261
262 struct dentry *rxpipe_rx_prep_beacon_drop;
263 struct dentry *rxpipe_descr_host_int_trig_rx_data;
264 struct dentry *rxpipe_beacon_buffer_thres_host_int_trig_rx_data;
265 struct dentry *rxpipe_missed_beacon_host_int_trig_rx_data;
266 struct dentry *rxpipe_tx_xfr_host_int_trig_rx_data;
267
268 struct dentry *tx_queue_len;
269
270 struct dentry *retry_count;
271 struct dentry *excessive_retries;
272};
273
274#define NUM_TX_QUEUES 4
275#define NUM_RX_PKT_DESC 8
276
277/* FW status registers */
278struct wl1271_fw_status {
279 u32 intr;
280 u8 fw_rx_counter;
281 u8 drv_rx_counter;
282 u8 reserved;
283 u8 tx_results_counter;
284 u32 rx_pkt_descs[NUM_RX_PKT_DESC];
285 u32 tx_released_blks[NUM_TX_QUEUES];
286 u32 fw_localtime;
287 u32 padding[2];
288} __attribute__ ((packed));
289
290struct wl1271_rx_mem_pool_addr {
291 u32 addr;
292 u32 addr_extra;
293};
294
295struct wl1271 {
296 struct ieee80211_hw *hw;
297 bool mac80211_registered;
298
299 struct spi_device *spi;
300
301 void (*set_power)(bool enable);
302 int irq;
303
304 spinlock_t wl_lock;
305
306 enum wl1271_state state;
307 struct mutex mutex;
308
Juuso Oikarinen451de972009-10-12 15:08:46 +0300309 struct wl1271_partition_set part;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300310
311 struct wl1271_chip chip;
312
313 int cmd_box_addr;
314 int event_box_addr;
315
316 u8 *fw;
317 size_t fw_len;
318 u8 *nvs;
319 size_t nvs_len;
320
321 u8 bssid[ETH_ALEN];
322 u8 mac_addr[ETH_ALEN];
323 u8 bss_type;
324 u8 ssid[IW_ESSID_MAX_SIZE + 1];
325 u8 ssid_len;
326 u8 listen_int;
327 int channel;
328
329 struct wl1271_acx_mem_map *target_mem_map;
330
331 /* Accounting for allocated / available TX blocks on HW */
332 u32 tx_blocks_freed[NUM_TX_QUEUES];
333 u32 tx_blocks_available;
334 u8 tx_results_count;
335
336 /* Transmitted TX packets counter for chipset interface */
337 int tx_packets_count;
338
339 /* Time-offset between host and chipset clocks */
340 int time_offset;
341
342 /* Session counter for the chipset */
343 int session_counter;
344
345 /* Frames scheduled for transmission, not handled yet */
346 struct sk_buff_head tx_queue;
347 bool tx_queue_stopped;
348
349 struct work_struct tx_work;
Juuso Oikarinenc87dec92009-10-08 21:56:31 +0300350
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300351 struct work_struct filter_work;
Juuso Oikarinenc87dec92009-10-08 21:56:31 +0300352 struct wl1271_filter_params *filter_params;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300353
354 /* Pending TX frames */
Juuso Oikarinenbe7078c2009-10-08 21:56:26 +0300355 struct sk_buff *tx_frames[ACX_TX_DESCRIPTORS];
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300356
Juuso Oikarinenac4e4ce2009-10-08 21:56:19 +0300357 /* Security sequence number counters */
358 u8 tx_security_last_seq;
359 u16 tx_security_seq_16;
360 u32 tx_security_seq_32;
361
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300362 /* FW Rx counter */
363 u32 rx_counter;
364
365 /* Rx memory pool address */
366 struct wl1271_rx_mem_pool_addr rx_mem_pool_addr;
367
368 /* The target interrupt mask */
369 struct work_struct irq_work;
370
371 /* The mbox event mask */
372 u32 event_mask;
373
374 /* Mailbox pointers */
375 u32 mbox_ptr[2];
376
377 /* Are we currently scanning */
378 bool scanning;
379
380 /* Our association ID */
381 u16 aid;
382
Juuso Oikarinend94cd292009-10-08 21:56:25 +0300383 /* currently configured rate set */
384 u32 basic_rate_set;
385
Juuso Oikarinen8a5a37a2009-10-08 21:56:24 +0300386 /* The current band */
387 enum ieee80211_band band;
388
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300389 /* Default key (for WEP) */
390 u32 default_key;
391
392 unsigned int rx_config;
393 unsigned int rx_filter;
394
395 /* is firmware in elp mode */
396 bool elp;
397
398 struct completion *elp_compl;
Juuso Oikarinen37b70a82009-10-08 21:56:21 +0300399 struct delayed_work elp_work;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300400
401 /* we can be in psm, but not in elp, we have to differentiate */
402 bool psm;
403
404 /* PSM mode requested */
405 bool psm_requested;
406
407 /* in dBm */
408 int power_level;
409
410 struct wl1271_stats stats;
411 struct wl1271_debugfs debugfs;
412
413 u32 buffer_32;
414 u32 buffer_cmd;
Juuso Oikarinen545f1da2009-10-08 21:56:23 +0300415 u32 buffer_busyword[WL1271_BUSY_WORD_CNT];
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300416 struct wl1271_rx_descriptor *rx_descriptor;
417
418 struct wl1271_fw_status *fw_status;
419 struct wl1271_tx_hw_res_if *tx_res_if;
Juuso Oikarinenb771eee2009-10-08 21:56:34 +0300420
421 struct ieee80211_vif *vif;
Luciano Coelhod6e19d132009-10-12 15:08:43 +0300422
423 /* Used for a workaround to send disconnect before rejoining */
424 bool joined;
Juuso Oikarinen2b60100b2009-10-13 12:47:39 +0300425
426 /* Current chipset configuration */
427 struct conf_drv_settings conf;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300428};
429
430int wl1271_plt_start(struct wl1271 *wl);
431int wl1271_plt_stop(struct wl1271 *wl);
432
433#define JOIN_TIMEOUT 5000 /* 5000 milliseconds to join */
434
435#define SESSION_COUNTER_MAX 7 /* maximum value for the session counter */
436
437#define WL1271_DEFAULT_POWER_LEVEL 0
438
439#define WL1271_TX_QUEUE_MAX_LENGTH 20
440
441/* WL1271 needs a 200ms sleep after power on */
442#define WL1271_POWER_ON_SLEEP 200 /* in miliseconds */
443
444#endif