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Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001/*
2 * Copyright (c) 2004 Sam Leffler, Errno Consulting
3 * Copyright (c) 2004 Video54 Technologies, Inc.
4 * Copyright (c) 2008 Atheros Communications Inc.
5 *
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 */
18
19#ifndef RC_H
20#define RC_H
21
22#include "ath9k.h"
23/*
24 * Interface definitions for transmit rate control modules for the
25 * Atheros driver.
26 *
27 * A rate control module is responsible for choosing the transmit rate
28 * for each data frame. Management+control frames are always sent at
29 * a fixed rate.
30 *
31 * Only one module may be present at a time; the driver references
32 * rate control interfaces by symbol name. If multiple modules are
33 * to be supported we'll need to switch to a registration-based scheme
34 * as is currently done, for example, for authentication modules.
35 *
36 * An instance of the rate control module is attached to each device
37 * at attach time and detached when the device is destroyed. The module
38 * may associate data with each device and each node (station). Both
39 * sets of storage are opaque except for the size of the per-node storage
40 * which must be provided when the module is attached.
41 *
42 * The rate control module is notified for each state transition and
43 * station association/reassociation. Otherwise it is queried for a
44 * rate for each outgoing frame and provided status from each transmitted
45 * frame. Any ancillary processing is the responsibility of the module
46 * (e.g. if periodic processing is required then the module should setup
47 * it's own timer).
48 *
49 * In addition to the transmit rate for each frame the module must also
50 * indicate the number of attempts to make at the specified rate. If this
51 * number is != ATH_TXMAXTRY then an additional callback is made to setup
52 * additional transmit state. The rate control code is assumed to write
53 * this additional data directly to the transmit descriptor.
54 */
55
56struct ath_softc;
57
58#define TRUE 1
59#define FALSE 0
60
61#define ATH_RATE_MAX 30
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070062
63enum ieee80211_fixed_rate_mode {
64 IEEE80211_FIXED_RATE_NONE = 0,
65 IEEE80211_FIXED_RATE_MCS = 1 /* HT rates */
66};
67
68/*
69 * Use the hal os glue code to get ms time
70 */
71#define IEEE80211_RATE_IDX_ENTRY(val, idx) (((val&(0xff<<(idx*8)))>>(idx*8)))
72
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070073#define WLAN_PHY_HT_20_SS WLAN_RC_PHY_HT_20_SS
74#define WLAN_PHY_HT_20_DS WLAN_RC_PHY_HT_20_DS
75#define WLAN_PHY_HT_20_DS_HGI WLAN_RC_PHY_HT_20_DS_HGI
76#define WLAN_PHY_HT_40_SS WLAN_RC_PHY_HT_40_SS
77#define WLAN_PHY_HT_40_SS_HGI WLAN_RC_PHY_HT_40_SS_HGI
78#define WLAN_PHY_HT_40_DS WLAN_RC_PHY_HT_40_DS
79#define WLAN_PHY_HT_40_DS_HGI WLAN_RC_PHY_HT_40_DS_HGI
80
81#define WLAN_PHY_OFDM PHY_OFDM
82#define WLAN_PHY_CCK PHY_CCK
83
84#define TRUE_20 0x2
85#define TRUE_40 0x4
86#define TRUE_2040 (TRUE_20|TRUE_40)
87#define TRUE_ALL (TRUE_2040|TRUE)
88
89enum {
90 WLAN_RC_PHY_HT_20_SS = 4,
91 WLAN_RC_PHY_HT_20_DS,
92 WLAN_RC_PHY_HT_40_SS,
93 WLAN_RC_PHY_HT_40_DS,
94 WLAN_RC_PHY_HT_20_SS_HGI,
95 WLAN_RC_PHY_HT_20_DS_HGI,
96 WLAN_RC_PHY_HT_40_SS_HGI,
97 WLAN_RC_PHY_HT_40_DS_HGI,
98 WLAN_RC_PHY_MAX
99};
100
Sujith5701ed82008-08-26 08:11:26 +0530101#define WLAN_RC_PHY_DS(_phy) ((_phy == WLAN_RC_PHY_HT_20_DS) \
102 || (_phy == WLAN_RC_PHY_HT_40_DS) \
103 || (_phy == WLAN_RC_PHY_HT_20_DS_HGI) \
104 || (_phy == WLAN_RC_PHY_HT_40_DS_HGI))
105#define WLAN_RC_PHY_40(_phy) ((_phy == WLAN_RC_PHY_HT_40_SS) \
106 || (_phy == WLAN_RC_PHY_HT_40_DS) \
107 || (_phy == WLAN_RC_PHY_HT_40_SS_HGI) \
108 || (_phy == WLAN_RC_PHY_HT_40_DS_HGI))
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700109#define WLAN_RC_PHY_SGI(_phy) ((_phy == WLAN_RC_PHY_HT_20_SS_HGI) \
Sujith5701ed82008-08-26 08:11:26 +0530110 || (_phy == WLAN_RC_PHY_HT_20_DS_HGI) \
111 || (_phy == WLAN_RC_PHY_HT_40_SS_HGI) \
112 || (_phy == WLAN_RC_PHY_HT_40_DS_HGI))
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700113
114#define WLAN_RC_PHY_HT(_phy) (_phy >= WLAN_RC_PHY_HT_20_SS)
115
116/* Returns the capflag mode */
117#define WLAN_RC_CAP_MODE(capflag) (((capflag & WLAN_RC_HT_FLAG) ? \
118 (capflag & WLAN_RC_40_FLAG) ? TRUE_40 : TRUE_20 : TRUE))
119
120/* Return TRUE if flag supports HT20 && client supports HT20 or
121 * return TRUE if flag supports HT40 && client supports HT40.
122 * This is used becos some rates overlap between HT20/HT40.
123 */
124
125#define WLAN_RC_PHY_HT_VALID(flag, capflag) (((flag & TRUE_20) && !(capflag \
126 & WLAN_RC_40_FLAG)) || ((flag & TRUE_40) && \
127 (capflag & WLAN_RC_40_FLAG)))
128
129#define WLAN_RC_DS_FLAG (0x01)
130#define WLAN_RC_40_FLAG (0x02)
131#define WLAN_RC_SGI_FLAG (0x04)
132#define WLAN_RC_HT_FLAG (0x08)
133
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700134#define RATE_TABLE_SIZE 64
135
Sujith5701ed82008-08-26 08:11:26 +0530136/**
137 * struct ath_rate_table - Rate Control table
138 * @valid: valid for use in rate control
139 * @valid_single_stream: valid for use in rate control for
140 * single stream operation
141 * @phy: CCK/OFDM
142 * @ratekbps: rate in Kbits per second
143 * @user_ratekbps: user rate in Kbits per second
144 * @ratecode: rate that goes into HW descriptors
145 * @short_preamble: Mask for enabling short preamble in ratecode for CCK
146 * @dot11rate: value that goes into supported
147 * rates info element of MLME
148 * @ctrl_rate: Index of next lower basic rate, used for duration computation
149 * @max_4ms_framelen: maximum frame length(bytes) for tx duration
150 * @probe_interval: interval for rate control to probe for other rates
151 * @rssi_reduce_interval: interval for rate control to reduce rssi
152 * @initial_ratemax: initial ratemax value used in ath_rc_sib_update()
153 */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700154struct ath_rate_table {
155 int rate_cnt;
156 struct {
Sujith5701ed82008-08-26 08:11:26 +0530157 int valid;
158 int valid_single_stream;
159 u8 phy;
160 u32 ratekbps;
161 u32 user_ratekbps;
162 u8 ratecode;
163 u8 short_preamble;
164 u8 dot11rate;
165 u8 ctrl_rate;
166 int8_t rssi_ack_validmin;
167 int8_t rssi_ack_deltamin;
168 u8 base_index;
169 u8 cw40index;
170 u8 sgi_index;
171 u8 ht_index;
172 u32 max_4ms_framelen;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700173 } info[RATE_TABLE_SIZE];
Sujith5701ed82008-08-26 08:11:26 +0530174 u32 probe_interval;
175 u32 rssi_reduce_interval;
176 u8 initial_ratemax;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700177};
178
179#define ATH_RC_PROBE_ALLOWED 0x00000001
180#define ATH_RC_MINRATE_LASTRATE 0x00000002
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700181
182struct ath_rc_series {
Sujith5701ed82008-08-26 08:11:26 +0530183 u8 rix;
184 u8 tries;
185 u8 flags;
186 u32 max_4ms_framelen;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700187};
188
189/* rcs_flags definition */
190#define ATH_RC_DS_FLAG 0x01
191#define ATH_RC_CW40_FLAG 0x02 /* CW 40 */
192#define ATH_RC_SGI_FLAG 0x04 /* Short Guard Interval */
193#define ATH_RC_HT_FLAG 0x08 /* HT */
194#define ATH_RC_RTSCTS_FLAG 0x10 /* RTS-CTS */
195
196/*
197 * State structures for new rate adaptation code
198 */
199#define MAX_TX_RATE_TBL 64
200#define MAX_TX_RATE_PHY 48
201
202struct ath_tx_ratectrl_state {
Sujith5701ed82008-08-26 08:11:26 +0530203 int8_t rssi_thres; /* required rssi for this rate (dB) */
204 u8 per; /* recent estimate of packet error rate (%) */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700205};
206
Sujith256b77592008-11-18 09:03:12 +0530207struct ath_rateset {
208 u8 rs_nrates;
209 u8 rs_rates[ATH_RATE_MAX];
210};
211
212/* per-device state */
213struct ath_rate_softc {
214 /* phy tables that contain rate control data */
215 const void *hw_rate_table[ATH9K_MODE_MAX];
216
217 /* -1 or index of fixed rate */
218 int fixedrix;
219};
220
Sujith5701ed82008-08-26 08:11:26 +0530221/**
Sujith256b77592008-11-18 09:03:12 +0530222 * struct ath_rate_node - Rate Control priv data
Sujith5701ed82008-08-26 08:11:26 +0530223 * @state: RC state
224 * @rssi_last: last ACK rssi
225 * @rssi_last_lookup: last ACK rssi used for lookup
226 * @rssi_last_prev: previous last ACK rssi
227 * @rssi_last_prev2: 2nd previous last ACK rssi
228 * @rssi_sum_cnt: count of rssi_sum for averaging
229 * @rssi_sum_rate: rate that we are averaging
230 * @rssi_sum: running sum of rssi for averaging
231 * @probe_rate: rate we are probing at
232 * @rssi_time: msec timestamp for last ack rssi
233 * @rssi_down_time: msec timestamp for last down step
234 * @probe_time: msec timestamp for last probe
235 * @hw_maxretry_pktcnt: num of packets since we got HW max retry error
236 * @max_valid_rate: maximum number of valid rate
237 * @per_down_time: msec timestamp for last PER down step
238 * @valid_phy_ratecnt: valid rate count
239 * @rate_max_phy: phy index for the max rate
240 * @probe_interval: interval for ratectrl to probe for other rates
Sujith256b77592008-11-18 09:03:12 +0530241 * @prev_data_rix: rate idx of last data frame
242 * @ht_cap: HT capabilities
243 * @single_stream: When TRUE, only single TX stream possible
244 * @neg_rates: Negotatied rates
245 * @neg_ht_rates: Negotiated HT rates
Sujith5701ed82008-08-26 08:11:26 +0530246 */
Sujith256b77592008-11-18 09:03:12 +0530247
248/* per-node state */
249struct ath_rate_node {
Sujith5701ed82008-08-26 08:11:26 +0530250 int8_t rssi_last;
251 int8_t rssi_last_lookup;
252 int8_t rssi_last_prev;
253 int8_t rssi_last_prev2;
254 int32_t rssi_sum_cnt;
255 int32_t rssi_sum_rate;
256 int32_t rssi_sum;
257 u8 rate_table_size;
258 u8 probe_rate;
Sujith5701ed82008-08-26 08:11:26 +0530259 u8 hw_maxretry_pktcnt;
260 u8 max_valid_rate;
261 u8 valid_rate_index[MAX_TX_RATE_TBL];
Sujith256b77592008-11-18 09:03:12 +0530262 u8 ht_cap;
263 u8 single_stream;
Sujith5701ed82008-08-26 08:11:26 +0530264 u8 valid_phy_ratecnt[WLAN_RC_PHY_MAX];
265 u8 valid_phy_rateidx[WLAN_RC_PHY_MAX][MAX_TX_RATE_TBL];
266 u8 rc_phy_mode;
267 u8 rate_max_phy;
Sujith256b77592008-11-18 09:03:12 +0530268 u32 rssi_time;
269 u32 rssi_down_time;
270 u32 probe_time;
271 u32 per_down_time;
Sujith5701ed82008-08-26 08:11:26 +0530272 u32 probe_interval;
Sujith5701ed82008-08-26 08:11:26 +0530273 u32 prev_data_rix;
Sujith256b77592008-11-18 09:03:12 +0530274 struct ath_tx_ratectrl_state state[MAX_TX_RATE_TBL];
Sujith5701ed82008-08-26 08:11:26 +0530275 struct ath_rateset neg_rates;
Sujith5701ed82008-08-26 08:11:26 +0530276 struct ath_rateset neg_ht_rates;
Sujith5701ed82008-08-26 08:11:26 +0530277 struct ath_rate_softc *asc;
278 struct ath_vap *avp;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700279};
280
281/* Driver data of ieee80211_tx_info */
282struct ath_tx_info_priv {
283 struct ath_rc_series rcs[4];
284 struct ath_tx_status tx;
285 int n_frames;
286 int n_bad_frames;
287 u8 min_rate;
288};
289
290/*
291 * Attach/detach a rate control module.
292 */
293struct ath_rate_softc *ath_rate_attach(struct ath_hal *ah);
294void ath_rate_detach(struct ath_rate_softc *asc);
295
296/*
297 * Update/reset rate control state for 802.11 state transitions.
298 * Important mostly as the analog to ath_rate_newassoc when operating
299 * in station mode.
300 */
301void ath_rc_node_update(struct ieee80211_hw *hw, struct ath_rate_node *rc_priv);
302void ath_rate_newstate(struct ath_softc *sc, struct ath_vap *avp);
303
304/*
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700305 * Return rate index for given Dot11 Rate.
306 */
307u8 ath_rate_findrateix(struct ath_softc *sc,
Sujith5701ed82008-08-26 08:11:26 +0530308 u8 dot11_rate);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700309
310/* Routines to register/unregister rate control algorithm */
311int ath_rate_control_register(void);
312void ath_rate_control_unregister(void);
313
314#endif /* RC_H */