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Jeeja KPe4e2d2f2015-10-07 11:31:52 +01001/*
2 * skl-topology.c - Implements Platform component ALSA controls/widget
3 * handlers.
4 *
5 * Copyright (C) 2014-2015 Intel Corp
6 * Author: Jeeja KP <jeeja.kp@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as version 2, as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 */
18
19#include <linux/slab.h>
20#include <linux/types.h>
21#include <linux/firmware.h>
22#include <sound/soc.h>
23#include <sound/soc-topology.h>
24#include "skl-sst-dsp.h"
25#include "skl-sst-ipc.h"
26#include "skl-topology.h"
27#include "skl.h"
28#include "skl-tplg-interface.h"
29
Jeeja KPf7590d42015-10-07 11:31:53 +010030#define SKL_CH_FIXUP_MASK (1 << 0)
31#define SKL_RATE_FIXUP_MASK (1 << 1)
32#define SKL_FMT_FIXUP_MASK (1 << 2)
33
Jeeja KPe4e2d2f2015-10-07 11:31:52 +010034/*
35 * SKL DSP driver modelling uses only few DAPM widgets so for rest we will
36 * ignore. This helpers checks if the SKL driver handles this widget type
37 */
38static int is_skl_dsp_widget_type(struct snd_soc_dapm_widget *w)
39{
40 switch (w->id) {
41 case snd_soc_dapm_dai_link:
42 case snd_soc_dapm_dai_in:
43 case snd_soc_dapm_aif_in:
44 case snd_soc_dapm_aif_out:
45 case snd_soc_dapm_dai_out:
46 case snd_soc_dapm_switch:
47 return false;
48 default:
49 return true;
50 }
51}
52
53/*
54 * Each pipelines needs memory to be allocated. Check if we have free memory
55 * from available pool. Then only add this to pool
56 * This is freed when pipe is deleted
57 * Note: DSP does actual memory management we only keep track for complete
58 * pool
59 */
60static bool skl_tplg_alloc_pipe_mem(struct skl *skl,
61 struct skl_module_cfg *mconfig)
62{
63 struct skl_sst *ctx = skl->skl_sst;
64
65 if (skl->resource.mem + mconfig->pipe->memory_pages >
66 skl->resource.max_mem) {
67 dev_err(ctx->dev,
68 "%s: module_id %d instance %d\n", __func__,
69 mconfig->id.module_id,
70 mconfig->id.instance_id);
71 dev_err(ctx->dev,
72 "exceeds ppl memory available %d mem %d\n",
73 skl->resource.max_mem, skl->resource.mem);
74 return false;
75 }
76
77 skl->resource.mem += mconfig->pipe->memory_pages;
78 return true;
79}
80
81/*
82 * Pipeline needs needs DSP CPU resources for computation, this is
83 * quantified in MCPS (Million Clocks Per Second) required for module/pipe
84 *
85 * Each pipelines needs mcps to be allocated. Check if we have mcps for this
86 * pipe. This adds the mcps to driver counter
87 * This is removed on pipeline delete
88 */
89static bool skl_tplg_alloc_pipe_mcps(struct skl *skl,
90 struct skl_module_cfg *mconfig)
91{
92 struct skl_sst *ctx = skl->skl_sst;
93
94 if (skl->resource.mcps + mconfig->mcps > skl->resource.max_mcps) {
95 dev_err(ctx->dev,
96 "%s: module_id %d instance %d\n", __func__,
97 mconfig->id.module_id, mconfig->id.instance_id);
98 dev_err(ctx->dev,
99 "exceeds ppl memory available %d > mem %d\n",
100 skl->resource.max_mcps, skl->resource.mcps);
101 return false;
102 }
103
104 skl->resource.mcps += mconfig->mcps;
105 return true;
106}
107
108/*
109 * Free the mcps when tearing down
110 */
111static void
112skl_tplg_free_pipe_mcps(struct skl *skl, struct skl_module_cfg *mconfig)
113{
114 skl->resource.mcps -= mconfig->mcps;
115}
116
117/*
118 * Free the memory when tearing down
119 */
120static void
121skl_tplg_free_pipe_mem(struct skl *skl, struct skl_module_cfg *mconfig)
122{
123 skl->resource.mem -= mconfig->pipe->memory_pages;
124}
125
Jeeja KPf7590d42015-10-07 11:31:53 +0100126
127static void skl_dump_mconfig(struct skl_sst *ctx,
128 struct skl_module_cfg *mcfg)
129{
130 dev_dbg(ctx->dev, "Dumping config\n");
131 dev_dbg(ctx->dev, "Input Format:\n");
132 dev_dbg(ctx->dev, "channels = %d\n", mcfg->in_fmt.channels);
133 dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->in_fmt.s_freq);
134 dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->in_fmt.ch_cfg);
135 dev_dbg(ctx->dev, "valid bit depth = %d\n",
136 mcfg->in_fmt.valid_bit_depth);
137 dev_dbg(ctx->dev, "Output Format:\n");
138 dev_dbg(ctx->dev, "channels = %d\n", mcfg->out_fmt.channels);
139 dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->out_fmt.s_freq);
140 dev_dbg(ctx->dev, "valid bit depth = %d\n",
141 mcfg->out_fmt.valid_bit_depth);
142 dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->out_fmt.ch_cfg);
143}
144
145static void skl_tplg_update_params(struct skl_module_fmt *fmt,
146 struct skl_pipe_params *params, int fixup)
147{
148 if (fixup & SKL_RATE_FIXUP_MASK)
149 fmt->s_freq = params->s_freq;
150 if (fixup & SKL_CH_FIXUP_MASK)
151 fmt->channels = params->ch;
152 if (fixup & SKL_FMT_FIXUP_MASK)
153 fmt->valid_bit_depth = params->s_fmt;
154}
155
156/*
157 * A pipeline may have modules which impact the pcm parameters, like SRC,
158 * channel converter, format converter.
159 * We need to calculate the output params by applying the 'fixup'
160 * Topology will tell driver which type of fixup is to be applied by
161 * supplying the fixup mask, so based on that we calculate the output
162 *
163 * Now In FE the pcm hw_params is source/target format. Same is applicable
164 * for BE with its hw_params invoked.
165 * here based on FE, BE pipeline and direction we calculate the input and
166 * outfix and then apply that for a module
167 */
168static void skl_tplg_update_params_fixup(struct skl_module_cfg *m_cfg,
169 struct skl_pipe_params *params, bool is_fe)
170{
171 int in_fixup, out_fixup;
172 struct skl_module_fmt *in_fmt, *out_fmt;
173
174 in_fmt = &m_cfg->in_fmt;
175 out_fmt = &m_cfg->out_fmt;
176
177 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
178 if (is_fe) {
179 in_fixup = m_cfg->params_fixup;
180 out_fixup = (~m_cfg->converter) &
181 m_cfg->params_fixup;
182 } else {
183 out_fixup = m_cfg->params_fixup;
184 in_fixup = (~m_cfg->converter) &
185 m_cfg->params_fixup;
186 }
187 } else {
188 if (is_fe) {
189 out_fixup = m_cfg->params_fixup;
190 in_fixup = (~m_cfg->converter) &
191 m_cfg->params_fixup;
192 } else {
193 in_fixup = m_cfg->params_fixup;
194 out_fixup = (~m_cfg->converter) &
195 m_cfg->params_fixup;
196 }
197 }
198
199 skl_tplg_update_params(in_fmt, params, in_fixup);
200 skl_tplg_update_params(out_fmt, params, out_fixup);
201}
202
203/*
204 * A module needs input and output buffers, which are dependent upon pcm
205 * params, so once we have calculate params, we need buffer calculation as
206 * well.
207 */
208static void skl_tplg_update_buffer_size(struct skl_sst *ctx,
209 struct skl_module_cfg *mcfg)
210{
211 int multiplier = 1;
212
213 if (mcfg->m_type == SKL_MODULE_TYPE_SRCINT)
214 multiplier = 5;
215
216 mcfg->ibs = (mcfg->in_fmt.s_freq / 1000) *
217 (mcfg->in_fmt.channels) *
218 (mcfg->in_fmt.bit_depth >> 3) *
219 multiplier;
220
221 mcfg->obs = (mcfg->out_fmt.s_freq / 1000) *
222 (mcfg->out_fmt.channels) *
223 (mcfg->out_fmt.bit_depth >> 3) *
224 multiplier;
225}
226
227static void skl_tplg_update_module_params(struct snd_soc_dapm_widget *w,
228 struct skl_sst *ctx)
229{
230 struct skl_module_cfg *m_cfg = w->priv;
231 struct skl_pipe_params *params = m_cfg->pipe->p_params;
232 int p_conn_type = m_cfg->pipe->conn_type;
233 bool is_fe;
234
235 if (!m_cfg->params_fixup)
236 return;
237
238 dev_dbg(ctx->dev, "Mconfig for widget=%s BEFORE updation\n",
239 w->name);
240
241 skl_dump_mconfig(ctx, m_cfg);
242
243 if (p_conn_type == SKL_PIPE_CONN_TYPE_FE)
244 is_fe = true;
245 else
246 is_fe = false;
247
248 skl_tplg_update_params_fixup(m_cfg, params, is_fe);
249 skl_tplg_update_buffer_size(ctx, m_cfg);
250
251 dev_dbg(ctx->dev, "Mconfig for widget=%s AFTER updation\n",
252 w->name);
253
254 skl_dump_mconfig(ctx, m_cfg);
255}
256
Jeeja KPe4e2d2f2015-10-07 11:31:52 +0100257/*
258 * A pipe can have multiple modules, each of them will be a DAPM widget as
259 * well. While managing a pipeline we need to get the list of all the
260 * widgets in a pipelines, so this helper - skl_tplg_get_pipe_widget() helps
261 * to get the SKL type widgets in that pipeline
262 */
263static int skl_tplg_alloc_pipe_widget(struct device *dev,
264 struct snd_soc_dapm_widget *w, struct skl_pipe *pipe)
265{
266 struct skl_module_cfg *src_module = NULL;
267 struct snd_soc_dapm_path *p = NULL;
268 struct skl_pipe_module *p_module = NULL;
269
270 p_module = devm_kzalloc(dev, sizeof(*p_module), GFP_KERNEL);
271 if (!p_module)
272 return -ENOMEM;
273
274 p_module->w = w;
275 list_add_tail(&p_module->node, &pipe->w_list);
276
277 snd_soc_dapm_widget_for_each_sink_path(w, p) {
278 if ((p->sink->priv == NULL)
279 && (!is_skl_dsp_widget_type(w)))
280 continue;
281
282 if ((p->sink->priv != NULL) && p->connect
283 && is_skl_dsp_widget_type(p->sink)) {
284
285 src_module = p->sink->priv;
286 if (pipe->ppl_id == src_module->pipe->ppl_id)
287 skl_tplg_alloc_pipe_widget(dev,
288 p->sink, pipe);
289 }
290 }
291 return 0;
292}
293
294/*
295 * Inside a pipe instance, we can have various modules. These modules need
296 * to instantiated in DSP by invoking INIT_MODULE IPC, which is achieved by
297 * skl_init_module() routine, so invoke that for all modules in a pipeline
298 */
299static int
300skl_tplg_init_pipe_modules(struct skl *skl, struct skl_pipe *pipe)
301{
302 struct skl_pipe_module *w_module;
303 struct snd_soc_dapm_widget *w;
304 struct skl_module_cfg *mconfig;
305 struct skl_sst *ctx = skl->skl_sst;
306 int ret = 0;
307
308 list_for_each_entry(w_module, &pipe->w_list, node) {
309 w = w_module->w;
310 mconfig = w->priv;
311
312 /* check resource available */
313 if (!skl_tplg_alloc_pipe_mcps(skl, mconfig))
314 return -ENOMEM;
315
Jeeja KPf7590d42015-10-07 11:31:53 +0100316 /*
317 * apply fix/conversion to module params based on
318 * FE/BE params
319 */
320 skl_tplg_update_module_params(w, ctx);
Jeeja KPe4e2d2f2015-10-07 11:31:52 +0100321 ret = skl_init_module(ctx, mconfig, NULL);
322 if (ret < 0)
323 return ret;
324 }
325
326 return 0;
327}
Vinod Kould93f8e52015-10-07 11:31:54 +0100328
329/*
330 * Mixer module represents a pipeline. So in the Pre-PMU event of mixer we
331 * need create the pipeline. So we do following:
332 * - check the resources
333 * - Create the pipeline
334 * - Initialize the modules in pipeline
335 * - finally bind all modules together
336 */
337static int skl_tplg_mixer_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w,
338 struct skl *skl)
339{
340 int ret;
341 struct skl_module_cfg *mconfig = w->priv;
342 struct skl_pipe_module *w_module;
343 struct skl_pipe *s_pipe = mconfig->pipe;
344 struct skl_module_cfg *src_module = NULL, *dst_module;
345 struct skl_sst *ctx = skl->skl_sst;
346
347 /* check resource available */
348 if (!skl_tplg_alloc_pipe_mcps(skl, mconfig))
349 return -EBUSY;
350
351 if (!skl_tplg_alloc_pipe_mem(skl, mconfig))
352 return -ENOMEM;
353
354 /*
355 * Create a list of modules for pipe.
356 * This list contains modules from source to sink
357 */
358 ret = skl_create_pipeline(ctx, mconfig->pipe);
359 if (ret < 0)
360 return ret;
361
362 /*
363 * we create a w_list of all widgets in that pipe. This list is not
364 * freed on PMD event as widgets within a pipe are static. This
365 * saves us cycles to get widgets in pipe every time.
366 *
367 * So if we have already initialized all the widgets of a pipeline
368 * we skip, so check for list_empty and create the list if empty
369 */
370 if (list_empty(&s_pipe->w_list)) {
371 ret = skl_tplg_alloc_pipe_widget(ctx->dev, w, s_pipe);
372 if (ret < 0)
373 return ret;
374 }
375
376 /* Init all pipe modules from source to sink */
377 ret = skl_tplg_init_pipe_modules(skl, s_pipe);
378 if (ret < 0)
379 return ret;
380
381 /* Bind modules from source to sink */
382 list_for_each_entry(w_module, &s_pipe->w_list, node) {
383 dst_module = w_module->w->priv;
384
385 if (src_module == NULL) {
386 src_module = dst_module;
387 continue;
388 }
389
390 ret = skl_bind_modules(ctx, src_module, dst_module);
391 if (ret < 0)
392 return ret;
393
394 src_module = dst_module;
395 }
396
397 return 0;
398}
399
Jeeja KP8724ff12015-10-27 09:22:52 +0900400static int skl_tplg_bind_sinks(struct snd_soc_dapm_widget *w,
401 struct skl *skl,
402 struct skl_module_cfg *src_mconfig)
Vinod Kould93f8e52015-10-07 11:31:54 +0100403{
404 struct snd_soc_dapm_path *p;
Jeeja KP8724ff12015-10-27 09:22:52 +0900405 struct snd_soc_dapm_widget *sink = NULL;
406 struct skl_module_cfg *sink_mconfig;
Vinod Kould93f8e52015-10-07 11:31:54 +0100407 struct skl_sst *ctx = skl->skl_sst;
Jeeja KP8724ff12015-10-27 09:22:52 +0900408 int ret;
Vinod Kould93f8e52015-10-07 11:31:54 +0100409
Jeeja KP8724ff12015-10-27 09:22:52 +0900410 snd_soc_dapm_widget_for_each_sink_path(w, p) {
Vinod Kould93f8e52015-10-07 11:31:54 +0100411 if (!p->connect)
412 continue;
413
414 dev_dbg(ctx->dev, "%s: src widget=%s\n", __func__, w->name);
415 dev_dbg(ctx->dev, "%s: sink widget=%s\n", __func__, p->sink->name);
416
Jeeja KP8724ff12015-10-27 09:22:52 +0900417 sink = p->sink;
Vinod Kould93f8e52015-10-07 11:31:54 +0100418 /*
419 * here we will check widgets in sink pipelines, so that
420 * can be any widgets type and we are only interested if
421 * they are ones used for SKL so check that first
422 */
423 if ((p->sink->priv != NULL) &&
424 is_skl_dsp_widget_type(p->sink)) {
425
426 sink = p->sink;
Vinod Kould93f8e52015-10-07 11:31:54 +0100427 sink_mconfig = sink->priv;
428
429 /* Bind source to sink, mixin is always source */
430 ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig);
431 if (ret)
432 return ret;
433
434 /* Start sinks pipe first */
435 if (sink_mconfig->pipe->state != SKL_PIPE_STARTED) {
Jeeja KPd1730c32015-10-27 09:22:53 +0900436 if (sink_mconfig->pipe->conn_type !=
437 SKL_PIPE_CONN_TYPE_FE)
438 ret = skl_run_pipe(ctx,
439 sink_mconfig->pipe);
Vinod Kould93f8e52015-10-07 11:31:54 +0100440 if (ret)
441 return ret;
442 }
Vinod Kould93f8e52015-10-07 11:31:54 +0100443 }
444 }
445
Jeeja KP8724ff12015-10-27 09:22:52 +0900446 if (!sink)
447 return skl_tplg_bind_sinks(sink, skl, src_mconfig);
448
449 return 0;
450}
451
452/*
453 * A PGA represents a module in a pipeline. So in the Pre-PMU event of PGA
454 * we need to do following:
455 * - Bind to sink pipeline
456 * Since the sink pipes can be running and we don't get mixer event on
457 * connect for already running mixer, we need to find the sink pipes
458 * here and bind to them. This way dynamic connect works.
459 * - Start sink pipeline, if not running
460 * - Then run current pipe
461 */
462static int skl_tplg_pga_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w,
463 struct skl *skl)
464{
465 struct skl_module_cfg *src_mconfig;
466 struct skl_sst *ctx = skl->skl_sst;
467 int ret = 0;
468
469 src_mconfig = w->priv;
470
471 /*
472 * find which sink it is connected to, bind with the sink,
473 * if sink is not started, start sink pipe first, then start
474 * this pipe
475 */
476 ret = skl_tplg_bind_sinks(w, skl, src_mconfig);
477 if (ret)
478 return ret;
479
Vinod Kould93f8e52015-10-07 11:31:54 +0100480 /* Start source pipe last after starting all sinks */
Jeeja KPd1730c32015-10-27 09:22:53 +0900481 if (src_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE)
482 return skl_run_pipe(ctx, src_mconfig->pipe);
Vinod Kould93f8e52015-10-07 11:31:54 +0100483
484 return 0;
485}
486
Jeeja KP8724ff12015-10-27 09:22:52 +0900487static struct snd_soc_dapm_widget *skl_get_src_dsp_widget(
488 struct snd_soc_dapm_widget *w, struct skl *skl)
489{
490 struct snd_soc_dapm_path *p;
491 struct snd_soc_dapm_widget *src_w = NULL;
492 struct skl_sst *ctx = skl->skl_sst;
493
494 snd_soc_dapm_widget_for_each_source_path(w, p) {
495 src_w = p->source;
496 if (!p->connect)
497 continue;
498
499 dev_dbg(ctx->dev, "sink widget=%s\n", w->name);
500 dev_dbg(ctx->dev, "src widget=%s\n", p->source->name);
501
502 /*
503 * here we will check widgets in sink pipelines, so that can
504 * be any widgets type and we are only interested if they are
505 * ones used for SKL so check that first
506 */
507 if ((p->source->priv != NULL) &&
508 is_skl_dsp_widget_type(p->source)) {
509 return p->source;
510 }
511 }
512
513 if (src_w != NULL)
514 return skl_get_src_dsp_widget(src_w, skl);
515
516 return NULL;
517}
518
Vinod Kould93f8e52015-10-07 11:31:54 +0100519/*
520 * in the Post-PMU event of mixer we need to do following:
521 * - Check if this pipe is running
522 * - if not, then
523 * - bind this pipeline to its source pipeline
524 * if source pipe is already running, this means it is a dynamic
525 * connection and we need to bind only to that pipe
526 * - start this pipeline
527 */
528static int skl_tplg_mixer_dapm_post_pmu_event(struct snd_soc_dapm_widget *w,
529 struct skl *skl)
530{
531 int ret = 0;
Vinod Kould93f8e52015-10-07 11:31:54 +0100532 struct snd_soc_dapm_widget *source, *sink;
533 struct skl_module_cfg *src_mconfig, *sink_mconfig;
534 struct skl_sst *ctx = skl->skl_sst;
535 int src_pipe_started = 0;
536
537 sink = w;
538 sink_mconfig = sink->priv;
539
540 /*
541 * If source pipe is already started, that means source is driving
542 * one more sink before this sink got connected, Since source is
543 * started, bind this sink to source and start this pipe.
544 */
Jeeja KP8724ff12015-10-27 09:22:52 +0900545 source = skl_get_src_dsp_widget(w, skl);
546 if (source != NULL) {
547 src_mconfig = source->priv;
548 sink_mconfig = sink->priv;
549 src_pipe_started = 1;
Vinod Kould93f8e52015-10-07 11:31:54 +0100550
551 /*
Jeeja KP8724ff12015-10-27 09:22:52 +0900552 * check pipe state, then no need to bind or start the
553 * pipe
Vinod Kould93f8e52015-10-07 11:31:54 +0100554 */
Jeeja KP8724ff12015-10-27 09:22:52 +0900555 if (src_mconfig->pipe->state != SKL_PIPE_STARTED)
556 src_pipe_started = 0;
Vinod Kould93f8e52015-10-07 11:31:54 +0100557 }
558
559 if (src_pipe_started) {
560 ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig);
561 if (ret)
562 return ret;
563
Jeeja KPd1730c32015-10-27 09:22:53 +0900564 if (sink_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE)
565 ret = skl_run_pipe(ctx, sink_mconfig->pipe);
Vinod Kould93f8e52015-10-07 11:31:54 +0100566 }
567
568 return ret;
569}
570
571/*
572 * in the Pre-PMD event of mixer we need to do following:
573 * - Stop the pipe
574 * - find the source connections and remove that from dapm_path_list
575 * - unbind with source pipelines if still connected
576 */
577static int skl_tplg_mixer_dapm_pre_pmd_event(struct snd_soc_dapm_widget *w,
578 struct skl *skl)
579{
Vinod Kould93f8e52015-10-07 11:31:54 +0100580 struct skl_module_cfg *src_mconfig, *sink_mconfig;
Jeeja KPce1b5552015-10-27 09:22:51 +0900581 int ret = 0, i;
Vinod Kould93f8e52015-10-07 11:31:54 +0100582 struct skl_sst *ctx = skl->skl_sst;
583
Jeeja KPce1b5552015-10-27 09:22:51 +0900584 sink_mconfig = w->priv;
Vinod Kould93f8e52015-10-07 11:31:54 +0100585
586 /* Stop the pipe */
587 ret = skl_stop_pipe(ctx, sink_mconfig->pipe);
588 if (ret)
589 return ret;
590
Jeeja KPce1b5552015-10-27 09:22:51 +0900591 for (i = 0; i < sink_mconfig->max_in_queue; i++) {
592 if (sink_mconfig->m_in_pin[i].pin_state == SKL_PIN_BIND_DONE) {
593 src_mconfig = sink_mconfig->m_in_pin[i].tgt_mcfg;
594 if (!src_mconfig)
595 continue;
596 /*
597 * If path_found == 1, that means pmd for source
598 * pipe has not occurred, source is connected to
599 * some other sink. so its responsibility of sink
600 * to unbind itself from source.
601 */
602 ret = skl_stop_pipe(ctx, src_mconfig->pipe);
603 if (ret < 0)
604 return ret;
Vinod Kould93f8e52015-10-07 11:31:54 +0100605
Jeeja KPce1b5552015-10-27 09:22:51 +0900606 ret = skl_unbind_modules(ctx,
607 src_mconfig, sink_mconfig);
Vinod Kould93f8e52015-10-07 11:31:54 +0100608 }
609 }
610
Vinod Kould93f8e52015-10-07 11:31:54 +0100611 return ret;
612}
613
614/*
615 * in the Post-PMD event of mixer we need to do following:
616 * - Free the mcps used
617 * - Free the mem used
618 * - Unbind the modules within the pipeline
619 * - Delete the pipeline (modules are not required to be explicitly
620 * deleted, pipeline delete is enough here
621 */
622static int skl_tplg_mixer_dapm_post_pmd_event(struct snd_soc_dapm_widget *w,
623 struct skl *skl)
624{
625 struct skl_module_cfg *mconfig = w->priv;
626 struct skl_pipe_module *w_module;
627 struct skl_module_cfg *src_module = NULL, *dst_module;
628 struct skl_sst *ctx = skl->skl_sst;
629 struct skl_pipe *s_pipe = mconfig->pipe;
630 int ret = 0;
631
632 skl_tplg_free_pipe_mcps(skl, mconfig);
633
634 list_for_each_entry(w_module, &s_pipe->w_list, node) {
635 dst_module = w_module->w->priv;
636
637 if (src_module == NULL) {
638 src_module = dst_module;
639 continue;
640 }
641
642 ret = skl_unbind_modules(ctx, src_module, dst_module);
643 if (ret < 0)
644 return ret;
645
646 src_module = dst_module;
647 }
648
649 ret = skl_delete_pipe(ctx, mconfig->pipe);
650 skl_tplg_free_pipe_mem(skl, mconfig);
651
652 return ret;
653}
654
655/*
656 * in the Post-PMD event of PGA we need to do following:
657 * - Free the mcps used
658 * - Stop the pipeline
659 * - In source pipe is connected, unbind with source pipelines
660 */
661static int skl_tplg_pga_dapm_post_pmd_event(struct snd_soc_dapm_widget *w,
662 struct skl *skl)
663{
Vinod Kould93f8e52015-10-07 11:31:54 +0100664 struct skl_module_cfg *src_mconfig, *sink_mconfig;
Jeeja KPce1b5552015-10-27 09:22:51 +0900665 int ret = 0, i;
Vinod Kould93f8e52015-10-07 11:31:54 +0100666 struct skl_sst *ctx = skl->skl_sst;
667
Jeeja KPce1b5552015-10-27 09:22:51 +0900668 src_mconfig = w->priv;
Vinod Kould93f8e52015-10-07 11:31:54 +0100669
670 skl_tplg_free_pipe_mcps(skl, src_mconfig);
671 /* Stop the pipe since this is a mixin module */
672 ret = skl_stop_pipe(ctx, src_mconfig->pipe);
673 if (ret)
674 return ret;
675
Jeeja KPce1b5552015-10-27 09:22:51 +0900676 for (i = 0; i < src_mconfig->max_out_queue; i++) {
677 if (src_mconfig->m_out_pin[i].pin_state == SKL_PIN_BIND_DONE) {
678 sink_mconfig = src_mconfig->m_out_pin[i].tgt_mcfg;
679 if (!sink_mconfig)
680 continue;
681 /*
682 * This is a connecter and if path is found that means
683 * unbind between source and sink has not happened yet
684 */
685 ret = skl_stop_pipe(ctx, sink_mconfig->pipe);
686 if (ret < 0)
687 return ret;
688 ret = skl_unbind_modules(ctx, src_mconfig,
689 sink_mconfig);
Vinod Kould93f8e52015-10-07 11:31:54 +0100690 }
691 }
692
Vinod Kould93f8e52015-10-07 11:31:54 +0100693 return ret;
694}
695
696/*
697 * In modelling, we assume there will be ONLY one mixer in a pipeline. If
698 * mixer is not required then it is treated as static mixer aka vmixer with
699 * a hard path to source module
700 * So we don't need to check if source is started or not as hard path puts
701 * dependency on each other
702 */
703static int skl_tplg_vmixer_event(struct snd_soc_dapm_widget *w,
704 struct snd_kcontrol *k, int event)
705{
706 struct snd_soc_dapm_context *dapm = w->dapm;
707 struct skl *skl = get_skl_ctx(dapm->dev);
708
709 switch (event) {
710 case SND_SOC_DAPM_PRE_PMU:
711 return skl_tplg_mixer_dapm_pre_pmu_event(w, skl);
712
713 case SND_SOC_DAPM_POST_PMD:
714 return skl_tplg_mixer_dapm_post_pmd_event(w, skl);
715 }
716
717 return 0;
718}
719
720/*
721 * In modelling, we assume there will be ONLY one mixer in a pipeline. If a
722 * second one is required that is created as another pipe entity.
723 * The mixer is responsible for pipe management and represent a pipeline
724 * instance
725 */
726static int skl_tplg_mixer_event(struct snd_soc_dapm_widget *w,
727 struct snd_kcontrol *k, int event)
728{
729 struct snd_soc_dapm_context *dapm = w->dapm;
730 struct skl *skl = get_skl_ctx(dapm->dev);
731
732 switch (event) {
733 case SND_SOC_DAPM_PRE_PMU:
734 return skl_tplg_mixer_dapm_pre_pmu_event(w, skl);
735
736 case SND_SOC_DAPM_POST_PMU:
737 return skl_tplg_mixer_dapm_post_pmu_event(w, skl);
738
739 case SND_SOC_DAPM_PRE_PMD:
740 return skl_tplg_mixer_dapm_pre_pmd_event(w, skl);
741
742 case SND_SOC_DAPM_POST_PMD:
743 return skl_tplg_mixer_dapm_post_pmd_event(w, skl);
744 }
745
746 return 0;
747}
748
749/*
750 * In modelling, we assumed rest of the modules in pipeline are PGA. But we
751 * are interested in last PGA (leaf PGA) in a pipeline to disconnect with
752 * the sink when it is running (two FE to one BE or one FE to two BE)
753 * scenarios
754 */
755static int skl_tplg_pga_event(struct snd_soc_dapm_widget *w,
756 struct snd_kcontrol *k, int event)
757
758{
759 struct snd_soc_dapm_context *dapm = w->dapm;
760 struct skl *skl = get_skl_ctx(dapm->dev);
761
762 switch (event) {
763 case SND_SOC_DAPM_PRE_PMU:
764 return skl_tplg_pga_dapm_pre_pmu_event(w, skl);
765
766 case SND_SOC_DAPM_POST_PMD:
767 return skl_tplg_pga_dapm_post_pmd_event(w, skl);
768 }
769
770 return 0;
771}
Vinod Koulcfb0a872015-10-07 11:31:55 +0100772
773/*
774 * The FE params are passed by hw_params of the DAI.
775 * On hw_params, the params are stored in Gateway module of the FE and we
776 * need to calculate the format in DSP module configuration, that
777 * conversion is done here
778 */
779int skl_tplg_update_pipe_params(struct device *dev,
780 struct skl_module_cfg *mconfig,
781 struct skl_pipe_params *params)
782{
783 struct skl_pipe *pipe = mconfig->pipe;
784 struct skl_module_fmt *format = NULL;
785
786 memcpy(pipe->p_params, params, sizeof(*params));
787
788 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK)
789 format = &mconfig->in_fmt;
790 else
791 format = &mconfig->out_fmt;
792
793 /* set the hw_params */
794 format->s_freq = params->s_freq;
795 format->channels = params->ch;
796 format->valid_bit_depth = skl_get_bit_depth(params->s_fmt);
797
798 /*
799 * 16 bit is 16 bit container whereas 24 bit is in 32 bit
800 * container so update bit depth accordingly
801 */
802 switch (format->valid_bit_depth) {
803 case SKL_DEPTH_16BIT:
804 format->bit_depth = format->valid_bit_depth;
805 break;
806
807 case SKL_DEPTH_24BIT:
Jeeja KP6654f392015-10-27 09:22:46 +0900808 case SKL_DEPTH_32BIT:
Vinod Koulcfb0a872015-10-07 11:31:55 +0100809 format->bit_depth = SKL_DEPTH_32BIT;
810 break;
811
812 default:
813 dev_err(dev, "Invalid bit depth %x for pipe\n",
814 format->valid_bit_depth);
815 return -EINVAL;
816 }
817
818 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
819 mconfig->ibs = (format->s_freq / 1000) *
820 (format->channels) *
821 (format->bit_depth >> 3);
822 } else {
823 mconfig->obs = (format->s_freq / 1000) *
824 (format->channels) *
825 (format->bit_depth >> 3);
826 }
827
828 return 0;
829}
830
831/*
832 * Query the module config for the FE DAI
833 * This is used to find the hw_params set for that DAI and apply to FE
834 * pipeline
835 */
836struct skl_module_cfg *
837skl_tplg_fe_get_cpr_module(struct snd_soc_dai *dai, int stream)
838{
839 struct snd_soc_dapm_widget *w;
840 struct snd_soc_dapm_path *p = NULL;
841
842 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
843 w = dai->playback_widget;
Subhransu S. Prustyf0900eb2015-10-22 23:22:36 +0530844 snd_soc_dapm_widget_for_each_sink_path(w, p) {
Vinod Koulcfb0a872015-10-07 11:31:55 +0100845 if (p->connect && p->sink->power &&
Jeeja KPa28f51d2015-10-27 09:22:44 +0900846 !is_skl_dsp_widget_type(p->sink))
Vinod Koulcfb0a872015-10-07 11:31:55 +0100847 continue;
848
849 if (p->sink->priv) {
850 dev_dbg(dai->dev, "set params for %s\n",
851 p->sink->name);
852 return p->sink->priv;
853 }
854 }
855 } else {
856 w = dai->capture_widget;
Subhransu S. Prustyf0900eb2015-10-22 23:22:36 +0530857 snd_soc_dapm_widget_for_each_source_path(w, p) {
Vinod Koulcfb0a872015-10-07 11:31:55 +0100858 if (p->connect && p->source->power &&
Jeeja KPa28f51d2015-10-27 09:22:44 +0900859 !is_skl_dsp_widget_type(p->source))
Vinod Koulcfb0a872015-10-07 11:31:55 +0100860 continue;
861
862 if (p->source->priv) {
863 dev_dbg(dai->dev, "set params for %s\n",
864 p->source->name);
865 return p->source->priv;
866 }
867 }
868 }
869
870 return NULL;
871}
872
873static u8 skl_tplg_be_link_type(int dev_type)
874{
875 int ret;
876
877 switch (dev_type) {
878 case SKL_DEVICE_BT:
879 ret = NHLT_LINK_SSP;
880 break;
881
882 case SKL_DEVICE_DMIC:
883 ret = NHLT_LINK_DMIC;
884 break;
885
886 case SKL_DEVICE_I2S:
887 ret = NHLT_LINK_SSP;
888 break;
889
890 case SKL_DEVICE_HDALINK:
891 ret = NHLT_LINK_HDA;
892 break;
893
894 default:
895 ret = NHLT_LINK_INVALID;
896 break;
897 }
898
899 return ret;
900}
901
902/*
903 * Fill the BE gateway parameters
904 * The BE gateway expects a blob of parameters which are kept in the ACPI
905 * NHLT blob, so query the blob for interface type (i2s/pdm) and instance.
906 * The port can have multiple settings so pick based on the PCM
907 * parameters
908 */
909static int skl_tplg_be_fill_pipe_params(struct snd_soc_dai *dai,
910 struct skl_module_cfg *mconfig,
911 struct skl_pipe_params *params)
912{
913 struct skl_pipe *pipe = mconfig->pipe;
914 struct nhlt_specific_cfg *cfg;
915 struct skl *skl = get_skl_ctx(dai->dev);
916 int link_type = skl_tplg_be_link_type(mconfig->dev_type);
917
918 memcpy(pipe->p_params, params, sizeof(*params));
919
Jeeja KPb30c2752015-10-27 09:22:48 +0900920 if (link_type == NHLT_LINK_HDA)
921 return 0;
922
Vinod Koulcfb0a872015-10-07 11:31:55 +0100923 /* update the blob based on virtual bus_id*/
924 cfg = skl_get_ep_blob(skl, mconfig->vbus_id, link_type,
925 params->s_fmt, params->ch,
926 params->s_freq, params->stream);
927 if (cfg) {
928 mconfig->formats_config.caps_size = cfg->size;
Jeeja KPbc032812015-10-22 23:22:35 +0530929 mconfig->formats_config.caps = (u32 *) &cfg->caps;
Vinod Koulcfb0a872015-10-07 11:31:55 +0100930 } else {
931 dev_err(dai->dev, "Blob NULL for id %x type %d dirn %d\n",
932 mconfig->vbus_id, link_type,
933 params->stream);
934 dev_err(dai->dev, "PCM: ch %d, freq %d, fmt %d\n",
935 params->ch, params->s_freq, params->s_fmt);
936 return -EINVAL;
937 }
938
939 return 0;
940}
941
942static int skl_tplg_be_set_src_pipe_params(struct snd_soc_dai *dai,
943 struct snd_soc_dapm_widget *w,
944 struct skl_pipe_params *params)
945{
946 struct snd_soc_dapm_path *p;
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +0530947 int ret = -EIO;
Vinod Koulcfb0a872015-10-07 11:31:55 +0100948
Subhransu S. Prustyf0900eb2015-10-22 23:22:36 +0530949 snd_soc_dapm_widget_for_each_source_path(w, p) {
Vinod Koulcfb0a872015-10-07 11:31:55 +0100950 if (p->connect && is_skl_dsp_widget_type(p->source) &&
951 p->source->priv) {
952
Jeeja KP9a03cb42015-10-27 09:22:54 +0900953 ret = skl_tplg_be_fill_pipe_params(dai,
954 p->source->priv, params);
955 if (ret < 0)
956 return ret;
Vinod Koulcfb0a872015-10-07 11:31:55 +0100957 } else {
Jeeja KP9a03cb42015-10-27 09:22:54 +0900958 ret = skl_tplg_be_set_src_pipe_params(dai,
959 p->source, params);
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +0530960 if (ret < 0)
961 return ret;
Vinod Koulcfb0a872015-10-07 11:31:55 +0100962 }
963 }
964
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +0530965 return ret;
Vinod Koulcfb0a872015-10-07 11:31:55 +0100966}
967
968static int skl_tplg_be_set_sink_pipe_params(struct snd_soc_dai *dai,
969 struct snd_soc_dapm_widget *w, struct skl_pipe_params *params)
970{
971 struct snd_soc_dapm_path *p = NULL;
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +0530972 int ret = -EIO;
Vinod Koulcfb0a872015-10-07 11:31:55 +0100973
Subhransu S. Prustyf0900eb2015-10-22 23:22:36 +0530974 snd_soc_dapm_widget_for_each_sink_path(w, p) {
Vinod Koulcfb0a872015-10-07 11:31:55 +0100975 if (p->connect && is_skl_dsp_widget_type(p->sink) &&
976 p->sink->priv) {
977
Jeeja KP9a03cb42015-10-27 09:22:54 +0900978 ret = skl_tplg_be_fill_pipe_params(dai,
979 p->sink->priv, params);
980 if (ret < 0)
981 return ret;
Vinod Koulcfb0a872015-10-07 11:31:55 +0100982 } else {
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +0530983 ret = skl_tplg_be_set_sink_pipe_params(
Vinod Koulcfb0a872015-10-07 11:31:55 +0100984 dai, p->sink, params);
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +0530985 if (ret < 0)
986 return ret;
Vinod Koulcfb0a872015-10-07 11:31:55 +0100987 }
988 }
989
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +0530990 return ret;
Vinod Koulcfb0a872015-10-07 11:31:55 +0100991}
992
993/*
994 * BE hw_params can be a source parameters (capture) or sink parameters
995 * (playback). Based on sink and source we need to either find the source
996 * list or the sink list and set the pipeline parameters
997 */
998int skl_tplg_be_update_params(struct snd_soc_dai *dai,
999 struct skl_pipe_params *params)
1000{
1001 struct snd_soc_dapm_widget *w;
1002
1003 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1004 w = dai->playback_widget;
1005
1006 return skl_tplg_be_set_src_pipe_params(dai, w, params);
1007
1008 } else {
1009 w = dai->capture_widget;
1010
1011 return skl_tplg_be_set_sink_pipe_params(dai, w, params);
1012 }
1013
1014 return 0;
1015}
Vinod Koul3af36702015-10-07 11:31:56 +01001016
1017static const struct snd_soc_tplg_widget_events skl_tplg_widget_ops[] = {
1018 {SKL_MIXER_EVENT, skl_tplg_mixer_event},
1019 {SKL_VMIXER_EVENT, skl_tplg_vmixer_event},
1020 {SKL_PGA_EVENT, skl_tplg_pga_event},
1021};
1022
1023/*
1024 * The topology binary passes the pin info for a module so initialize the pin
1025 * info passed into module instance
1026 */
Jeeja KP6abca1d2015-10-22 23:22:42 +05301027static void skl_fill_module_pin_info(struct skl_dfw_module_pin *dfw_pin,
1028 struct skl_module_pin *m_pin,
1029 bool is_dynamic, int max_pin)
Vinod Koul3af36702015-10-07 11:31:56 +01001030{
1031 int i;
1032
1033 for (i = 0; i < max_pin; i++) {
Jeeja KP6abca1d2015-10-22 23:22:42 +05301034 m_pin[i].id.module_id = dfw_pin[i].module_id;
1035 m_pin[i].id.instance_id = dfw_pin[i].instance_id;
Vinod Koul3af36702015-10-07 11:31:56 +01001036 m_pin[i].in_use = false;
Jeeja KP6abca1d2015-10-22 23:22:42 +05301037 m_pin[i].is_dynamic = is_dynamic;
Jeeja KP4f745702015-10-27 09:22:49 +09001038 m_pin[i].pin_state = SKL_PIN_UNBIND;
Vinod Koul3af36702015-10-07 11:31:56 +01001039 }
1040}
1041
1042/*
1043 * Add pipeline from topology binary into driver pipeline list
1044 *
1045 * If already added we return that instance
1046 * Otherwise we create a new instance and add into driver list
1047 */
1048static struct skl_pipe *skl_tplg_add_pipe(struct device *dev,
1049 struct skl *skl, struct skl_dfw_pipe *dfw_pipe)
1050{
1051 struct skl_pipeline *ppl;
1052 struct skl_pipe *pipe;
1053 struct skl_pipe_params *params;
1054
1055 list_for_each_entry(ppl, &skl->ppl_list, node) {
1056 if (ppl->pipe->ppl_id == dfw_pipe->pipe_id)
1057 return ppl->pipe;
1058 }
1059
1060 ppl = devm_kzalloc(dev, sizeof(*ppl), GFP_KERNEL);
1061 if (!ppl)
1062 return NULL;
1063
1064 pipe = devm_kzalloc(dev, sizeof(*pipe), GFP_KERNEL);
1065 if (!pipe)
1066 return NULL;
1067
1068 params = devm_kzalloc(dev, sizeof(*params), GFP_KERNEL);
1069 if (!params)
1070 return NULL;
1071
1072 pipe->ppl_id = dfw_pipe->pipe_id;
1073 pipe->memory_pages = dfw_pipe->memory_pages;
1074 pipe->pipe_priority = dfw_pipe->pipe_priority;
1075 pipe->conn_type = dfw_pipe->conn_type;
1076 pipe->state = SKL_PIPE_INVALID;
1077 pipe->p_params = params;
1078 INIT_LIST_HEAD(&pipe->w_list);
1079
1080 ppl->pipe = pipe;
1081 list_add(&ppl->node, &skl->ppl_list);
1082
1083 return ppl->pipe;
1084}
1085
1086/*
1087 * Topology core widget load callback
1088 *
1089 * This is used to save the private data for each widget which gives
1090 * information to the driver about module and pipeline parameters which DSP
1091 * FW expects like ids, resource values, formats etc
1092 */
1093static int skl_tplg_widget_load(struct snd_soc_component *cmpnt,
Jeeja KPb663a8c2015-10-07 11:31:57 +01001094 struct snd_soc_dapm_widget *w,
1095 struct snd_soc_tplg_dapm_widget *tplg_w)
Vinod Koul3af36702015-10-07 11:31:56 +01001096{
1097 int ret;
1098 struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt);
1099 struct skl *skl = ebus_to_skl(ebus);
1100 struct hdac_bus *bus = ebus_to_hbus(ebus);
1101 struct skl_module_cfg *mconfig;
1102 struct skl_pipe *pipe;
Jeeja KPb663a8c2015-10-07 11:31:57 +01001103 struct skl_dfw_module *dfw_config =
1104 (struct skl_dfw_module *)tplg_w->priv.data;
Vinod Koul3af36702015-10-07 11:31:56 +01001105
1106 if (!tplg_w->priv.size)
1107 goto bind_event;
1108
1109 mconfig = devm_kzalloc(bus->dev, sizeof(*mconfig), GFP_KERNEL);
1110
1111 if (!mconfig)
1112 return -ENOMEM;
1113
1114 w->priv = mconfig;
1115 mconfig->id.module_id = dfw_config->module_id;
1116 mconfig->id.instance_id = dfw_config->instance_id;
1117 mconfig->mcps = dfw_config->max_mcps;
1118 mconfig->ibs = dfw_config->ibs;
1119 mconfig->obs = dfw_config->obs;
1120 mconfig->core_id = dfw_config->core_id;
1121 mconfig->max_in_queue = dfw_config->max_in_queue;
1122 mconfig->max_out_queue = dfw_config->max_out_queue;
1123 mconfig->is_loadable = dfw_config->is_loadable;
1124 mconfig->in_fmt.channels = dfw_config->in_fmt.channels;
1125 mconfig->in_fmt.s_freq = dfw_config->in_fmt.freq;
1126 mconfig->in_fmt.bit_depth = dfw_config->in_fmt.bit_depth;
Jeeja KPb663a8c2015-10-07 11:31:57 +01001127 mconfig->in_fmt.valid_bit_depth =
1128 dfw_config->in_fmt.valid_bit_depth;
Vinod Koul3af36702015-10-07 11:31:56 +01001129 mconfig->in_fmt.ch_cfg = dfw_config->in_fmt.ch_cfg;
1130 mconfig->out_fmt.channels = dfw_config->out_fmt.channels;
1131 mconfig->out_fmt.s_freq = dfw_config->out_fmt.freq;
1132 mconfig->out_fmt.bit_depth = dfw_config->out_fmt.bit_depth;
Jeeja KPb663a8c2015-10-07 11:31:57 +01001133 mconfig->out_fmt.valid_bit_depth =
1134 dfw_config->out_fmt.valid_bit_depth;
Vinod Koul3af36702015-10-07 11:31:56 +01001135 mconfig->out_fmt.ch_cfg = dfw_config->out_fmt.ch_cfg;
1136 mconfig->params_fixup = dfw_config->params_fixup;
1137 mconfig->converter = dfw_config->converter;
1138 mconfig->m_type = dfw_config->module_type;
1139 mconfig->vbus_id = dfw_config->vbus_id;
1140
1141 pipe = skl_tplg_add_pipe(bus->dev, skl, &dfw_config->pipe);
1142 if (pipe)
1143 mconfig->pipe = pipe;
1144
1145 mconfig->dev_type = dfw_config->dev_type;
1146 mconfig->hw_conn_type = dfw_config->hw_conn_type;
1147 mconfig->time_slot = dfw_config->time_slot;
1148 mconfig->formats_config.caps_size = dfw_config->caps.caps_size;
1149
Jeeja KPb663a8c2015-10-07 11:31:57 +01001150 mconfig->m_in_pin = devm_kzalloc(bus->dev,
1151 (mconfig->max_in_queue) *
1152 sizeof(*mconfig->m_in_pin),
1153 GFP_KERNEL);
Vinod Koul3af36702015-10-07 11:31:56 +01001154 if (!mconfig->m_in_pin)
1155 return -ENOMEM;
1156
Jeeja KP6abca1d2015-10-22 23:22:42 +05301157 mconfig->m_out_pin = devm_kzalloc(bus->dev, (mconfig->max_out_queue) *
1158 sizeof(*mconfig->m_out_pin),
1159 GFP_KERNEL);
Vinod Koul3af36702015-10-07 11:31:56 +01001160 if (!mconfig->m_out_pin)
1161 return -ENOMEM;
1162
Jeeja KP6abca1d2015-10-22 23:22:42 +05301163 skl_fill_module_pin_info(dfw_config->in_pin, mconfig->m_in_pin,
1164 dfw_config->is_dynamic_in_pin,
1165 mconfig->max_in_queue);
1166
1167 skl_fill_module_pin_info(dfw_config->out_pin, mconfig->m_out_pin,
1168 dfw_config->is_dynamic_out_pin,
1169 mconfig->max_out_queue);
1170
Vinod Koul3af36702015-10-07 11:31:56 +01001171
1172 if (mconfig->formats_config.caps_size == 0)
1173 goto bind_event;
1174
1175 mconfig->formats_config.caps = (u32 *)devm_kzalloc(bus->dev,
Jeeja KPb663a8c2015-10-07 11:31:57 +01001176 mconfig->formats_config.caps_size, GFP_KERNEL);
Vinod Koul3af36702015-10-07 11:31:56 +01001177
1178 if (mconfig->formats_config.caps == NULL)
1179 return -ENOMEM;
1180
1181 memcpy(mconfig->formats_config.caps, dfw_config->caps.caps,
Jeeja KPb663a8c2015-10-07 11:31:57 +01001182 dfw_config->caps.caps_size);
Vinod Koul3af36702015-10-07 11:31:56 +01001183
1184bind_event:
1185 if (tplg_w->event_type == 0) {
Vinod Koul3373f712015-10-07 16:39:38 +01001186 dev_dbg(bus->dev, "ASoC: No event handler required\n");
Vinod Koul3af36702015-10-07 11:31:56 +01001187 return 0;
1188 }
1189
1190 ret = snd_soc_tplg_widget_bind_event(w, skl_tplg_widget_ops,
Jeeja KPb663a8c2015-10-07 11:31:57 +01001191 ARRAY_SIZE(skl_tplg_widget_ops),
1192 tplg_w->event_type);
Vinod Koul3af36702015-10-07 11:31:56 +01001193
1194 if (ret) {
1195 dev_err(bus->dev, "%s: No matching event handlers found for %d\n",
1196 __func__, tplg_w->event_type);
1197 return -EINVAL;
1198 }
1199
1200 return 0;
1201}
1202
1203static struct snd_soc_tplg_ops skl_tplg_ops = {
1204 .widget_load = skl_tplg_widget_load,
1205};
1206
1207/* This will be read from topology manifest, currently defined here */
1208#define SKL_MAX_MCPS 30000000
1209#define SKL_FW_MAX_MEM 1000000
1210
1211/*
1212 * SKL topology init routine
1213 */
1214int skl_tplg_init(struct snd_soc_platform *platform, struct hdac_ext_bus *ebus)
1215{
1216 int ret;
1217 const struct firmware *fw;
1218 struct hdac_bus *bus = ebus_to_hbus(ebus);
1219 struct skl *skl = ebus_to_skl(ebus);
1220
1221 ret = request_firmware(&fw, "dfw_sst.bin", bus->dev);
1222 if (ret < 0) {
Jeeja KPb663a8c2015-10-07 11:31:57 +01001223 dev_err(bus->dev, "tplg fw %s load failed with %d\n",
Vinod Koul3af36702015-10-07 11:31:56 +01001224 "dfw_sst.bin", ret);
1225 return ret;
1226 }
1227
1228 /*
1229 * The complete tplg for SKL is loaded as index 0, we don't use
1230 * any other index
1231 */
Jeeja KPb663a8c2015-10-07 11:31:57 +01001232 ret = snd_soc_tplg_component_load(&platform->component,
1233 &skl_tplg_ops, fw, 0);
Vinod Koul3af36702015-10-07 11:31:56 +01001234 if (ret < 0) {
1235 dev_err(bus->dev, "tplg component load failed%d\n", ret);
1236 return -EINVAL;
1237 }
1238
1239 skl->resource.max_mcps = SKL_MAX_MCPS;
1240 skl->resource.max_mem = SKL_FW_MAX_MEM;
1241
1242 return 0;
1243}